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71. 发明授权

US6163051A High breakdown voltage semiconductor device 失效
标题翻译：高击穿电压半导体器件
公开(公告)号：US6163051A
公开(公告)日：2000-12-19
申请号：US154041
申请日：1998-09-16
申请人： Akio Nakagawa , Tomoko Matsudai , Hideyuki Funaki , Norio Yasuhara
发明人： Akio Nakagawa , Tomoko Matsudai , Hideyuki Funaki , Norio Yasuhara
IPC分类号： H01L21/331 , H01L29/06 , H01L29/739 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/66325 , H01L29/0696 , H01L29/7394 , H01L29/7398
摘要： A high breakdown voltage semiconductor device comprising a first base region of a first conductivity type, a second base region of a second conductivity type, which is formed in a surface region of the first base region, a first gate insulation film formed on an inner wall of a first LOCOS groove formed passing through the second base region to reach the first base region, a first gate electrode formed on the first gate insulation film, a first source region of a first conductivity type, which is formed in a surface region of the second base region around the first LOCOS groove in such a manner as to contact with the first gate insulating film, a first drain region formed in a surface region of the first base region in such a manner as to be spaced apart from the second base region, a source electrode formed on the first source region and on the second base region, and a drain electrode formed on the first drain region.
摘要翻译：一种高耐压电压半导体器件，包括第一导电类型的第一基极区域和形成在第一基极区域的表面区域中的第二导电类型的第二基极区域，形成在内壁上的第一栅极绝缘膜形成为穿过第二基极区域以到达第一基极区域的第一LOCOS沟槽，形成在第一栅极绝缘膜上的第一栅极电极，形成在第一栅极绝缘膜的表面区域中的第一导电类型的第一源极区域，第二基区，以与第一栅极绝缘膜接触的方式围绕第一LOCOS沟槽;第一漏极区，形成在第一基极区域的表面区域中，以与第二基极区域隔开; 形成在第一源极区域和第二基极区域上的源电极以及形成在第一漏极区域上的漏电极。

72. 发明授权

US5994740A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US5994740A
公开(公告)日：1999-11-30
申请号：US972148
申请日：1997-11-17
申请人： Akio Nakagawa , Yoshihiro Yamaguchi , Tomoko Matsudai
发明人： Akio Nakagawa , Yoshihiro Yamaguchi , Tomoko Matsudai
IPC分类号： H01L21/84 , H01L27/12 , H01L27/01 , H01L31/0392
CPC分类号： H01L21/84 , H01L27/1203
摘要： An n.sup.- -type silicon active layer having a thickness of 6 .mu.m or less is formed on a silicon substrate via a silicon oxide film. An npn bipolar transistor with a low withstand voltage and an IGBT with a high withstand voltage are formed in the active layer. The two devices are insulated and isolated from each other through a trench. The bipolar transistor has an n-type well layer formed in the surface of the active layer. A p-type well layer is formed in the surface of the n-type well layer. The thickness of the n-type well layer under the p-type well layer is set to be 1 .mu.m or more. A first n.sup.+ -type diffusion layer is formed in the surface of the n-type well layer. A p.sup.+ -type diffusion layer and a second n.sup.+ -type diffusion layer are formed in the surface of the p-type well layer. The n-type well layer and the first n.sup.+ -type diffusion layer serve as a collector region. The p-type well layer and the p.sup.+ -type diffusion layer serve as a base region. The second n.sup.+ -type diffusion layer serves as an emitter region.
摘要翻译：通过氧化硅膜在硅衬底上形成厚度为6μm以下的n型硅有源层。在有源层中形成具有低耐压的npn双极晶体管和具有高耐压的IGBT。两个器件通过沟槽彼此绝缘和隔离。双极晶体管在有源层的表面形成有n型阱层。 p型阱层形成于n型阱层的表面。 p型阱层下面的n型阱层的厚度设定为1μm以上。在n型阱层的表面形成第一n +型扩散层。在p型阱层的表面形成p +型扩散层和第n +型扩散层。 n型阱层和第一n +型扩散层用作集电极区域。 p型阱层和p +型扩散层用作基极区域。第二n +型扩散层用作发射极区域。

73. 发明授权

US5438220A High breakdown voltage semiconductor device 失效
标题翻译：高击穿电压半导体器件
公开(公告)号：US5438220A
公开(公告)日：1995-08-01
申请号：US085056
申请日：1993-07-02
申请人： Akio Nakagawa , Norio Yasuhara , Tomoko Matsudai , Yoshihiro Yamaguchi , Ichiro Omura , Hideyuki Funaki
发明人： Akio Nakagawa , Norio Yasuhara , Tomoko Matsudai , Yoshihiro Yamaguchi , Ichiro Omura , Hideyuki Funaki
IPC分类号： H01L21/336 , H01L21/74 , H01L21/762 , H01L27/06 , H01L27/092 , H01L27/12 , H01L29/06 , H01L29/08 , H01L29/40 , H01L29/739 , H01L29/74 , H01L29/745 , H01L29/749 , H01L29/78 , H01L29/786 , H01L29/861
CPC分类号： H01L29/404 , H01L21/74 , H01L21/76264 , H01L21/76297 , H01L27/0623 , H01L27/0922 , H01L27/1203 , H01L29/0834 , H01L29/402 , H01L29/405 , H01L29/407 , H01L29/408 , H01L29/66772 , H01L29/7394 , H01L29/7436 , H01L29/7455 , H01L29/749 , H01L29/7824 , H01L29/7835 , H01L29/78624 , H01L29/8611 , H01L21/76275 , H01L21/76286 , H01L29/78603 , H01L2924/0002
摘要： A high breakdown voltage semiconductor device includes a semiconductor substrate, an insulating layer formed on the semiconductor substrate, an active layer formed on the insulating layer and made of a high resistance semiconductor of a first conductivity type, a first impurity region of the first conductivity type formed in the active layer, and a second impurity region of a second conductivity type formed in the active layer and spaced apart from the first impurity region by a predetermined distance. The first impurity region is formed of diffusion layers. The diffusion layers are superimposed one upon another and differ in diffusion depth or diffusion window width, or both.
摘要翻译：高耐压半导体器件包括半导体衬底，形成在半导体衬底上的绝缘层，形成在绝缘层上并由第一导电类型的高电阻半导体形成的有源层，第一导电类型的第一杂质区形成在有源层中的第二杂质区和形成在有源层中并与第一杂质区隔开预定距离的第二导电类型的第二杂质区。第一杂质区由扩散层形成。扩散层彼此叠加并且扩散深度或扩散窗宽度不同，或两者均不同。

74. 发明授权

US5428228A Method of operating thyristor with insulated gates 失效
标题翻译：用绝缘栅极操作晶闸管的方法
公开(公告)号：US5428228A
公开(公告)日：1995-06-27
申请号：US164756
申请日：1993-12-10
申请人： Tsuneo Ogura , Kiminori Watanabe , Akio Nakagawa , Yoshihiro Yamaguchi , Norio Yasuhara , Tomoko Matsudai , Shigeru Hasegawa , Kazuya Nakayama
发明人： Tsuneo Ogura , Kiminori Watanabe , Akio Nakagawa , Yoshihiro Yamaguchi , Norio Yasuhara , Tomoko Matsudai , Shigeru Hasegawa , Kazuya Nakayama
IPC分类号： H01L27/06 , H01L29/74 , H01L29/745 , H01L29/749 , H01L29/747
CPC分类号： H01L27/0617 , H01L29/7436 , H01L29/7455 , H01L29/749
摘要： A thyristor with insulated gates includes turn-off and turn-on MOSFETs. The turn-on MOSFET has a turn-on gate employing a p-type base as a channel and extending over an n-type base and an n-type emitter. The turn-off MOSFET has n-type drain and source layers formed in a p-type base layer, and a turn-off gate extending over the drain and source layers. The n-type drain layer is short-circuited with the p-type base layer via a drain electrode. The drain electrode is formed near an n-type emitter layer. When the thyristor is to be turned off, the first voltage is applied to the turn-on gate, and the second voltage is applied to the turn-off gate while the first voltage is applied to the turn-on gate. After the application of the second voltage continues for a predetermined period of time, the application of the first voltage to the turn-on gate is stopped. With this operation, the thyristor can be turned off even with a large current.
摘要翻译：具有绝缘栅极的晶闸管包括关断和导通MOSFET。导通MOSFET具有采用p型基极作为沟道并在n型基极和n型发射极上延伸的导通栅极。关断MOSFET具有形成在p型基极层中的n型漏极和源极层，以及在漏极和源极层上延伸的截止栅极。 n型漏极层经由漏电极与p型基极层短路。在n型发射极层附近形成漏电极。当晶闸管关断时，第一电压被施加到导通栅极，并且第二电压被施加到关断栅极，同时第一电压被施加到导通栅极。在第二电压的施加持续预定时间段之后，停止向导通门施加第一电压。通过这种操作，即使使用大电流，晶闸管也可以关闭。

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