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71. 发明申请

US20080003720A1 Wafer-level bonding for mechanically reinforced ultra-thin die 有权
标题翻译：用于机械增强超薄模具的晶圆级粘接
公开(公告)号：US20080003720A1
公开(公告)日：2008-01-03
申请号：US11479835
申请日：2006-06-30
申请人： Daoqiang Lu , John Tang
发明人： Daoqiang Lu , John Tang
IPC分类号： H01L21/78
CPC分类号： H01L21/78 , H01L21/50 , H01L23/3735 , H01L23/433 , H01L24/31 , H01L25/16 , H01L2224/16225 , H01L2224/274 , H01L2224/29111 , H01L2224/2929 , H01L2224/29299 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2924/00011 , H01L2924/00013 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01075 , H01L2924/01078 , H01L2924/0132 , H01L2924/01327 , H01L2924/09701 , H01L2924/14 , H01L2924/1423 , H01L2924/15311 , H01L2924/1579 , H01L2924/16152 , H01L2924/351 , H01L2924/00 , H01L2224/29099 , H01L2224/29199 , H01L2224/0401
摘要： An embodiment of the present invention is a technique to fabricate a package. A metal sheet having trenches is formed. A thinned wafer supported by a wafer support substrate (WSS) is formed. The metal sheet is bonded to the WSS-supported thinned wafer to form a metal bonded thinned wafer. The thinned wafer is diced to the trenches into die assemblies.
摘要翻译：本发明的一个实施例是一种制造包装的技术。形成具有沟槽的金属片。形成由晶片支撑基板（WSS）支撑的薄的晶片。将金属片接合到WSS支撑的薄化晶片上以形成金属结合的薄化晶片。将薄的晶片切割成沟槽进入模具组件。

72. 发明申请

US20080003719A1 Wafer-level assembly of heat spreaders for dual IHS packages 有权
标题翻译：用于双IHS封装的散热器的晶圆级组装
公开(公告)号：US20080003719A1
公开(公告)日：2008-01-03
申请号：US11479740
申请日：2006-06-30
申请人： Daoqiang Lu , Rajashree Baskaran , Chuan Hu
发明人： Daoqiang Lu , Rajashree Baskaran , Chuan Hu
IPC分类号： H01L21/00
CPC分类号： H01L23/3675 , H01L21/4882 , H01L21/6835 , H01L23/42 , H01L24/27 , H01L2221/68309 , H01L2221/68359 , H01L2224/0401 , H01L2224/04026 , H01L2224/16 , H01L2224/16225 , H01L2224/274 , H01L2224/29111 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2924/01029 , H01L2924/01079 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/15311 , H01L2924/16152 , H01L2924/351 , H01L2924/00
摘要： An embodiment of the present invention is a technique to fabricate a package. A heat spreader (HS) array on a HS support substrate is formed. The HS array has a plurality of heat spreaders. A diced wafer supported by a wafer support substrate (WSS) is formed. The diced wafer has a plurality of thin dice. The thin dice in the diced wafer are bonded to the heat spreaders in the HS array to form HS-bonded thin dice between the HS support substrate and the WSS.
摘要翻译：本发明的一个实施例是一种制造包装的技术。形成HS支撑基板上的散热器（HS）阵列。 HS阵列具有多个散热器。形成由晶片支撑基板（WSS）支撑的切割晶片。切割晶片具有多个薄骰子。切割晶片中的薄骰子结合到HS阵列中的散热器上，以在HS支撑衬底和WSS之间形成HS结合的薄骰子。

73. 发明申请

US20080003717A1 ELECTRONIC ASSEMBLY WITH STACKED IC'S USING TWO OR MORE DIFFERENT CONNECTION TECHNOLOGIES AND METHODS OF MANUFACTURE 有权
标题翻译：具有使用两种或多种不同连接技术的堆叠IC的电子组件及其制造方法
公开(公告)号：US20080003717A1
公开(公告)日：2008-01-03
申请号：US11427917
申请日：2006-06-30
申请人： Qing A. Zhou , Daoqiang Lu , Wei Shi , Jiangqi He
发明人： Qing A. Zhou , Daoqiang Lu , Wei Shi , Jiangqi He
IPC分类号： H01L21/00
CPC分类号： H01L24/81 , H01L24/17 , H01L24/73 , H01L25/0652 , H01L25/0657 , H01L25/18 , H01L25/50 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/13099 , H01L2224/1403 , H01L2224/141 , H01L2224/16145 , H01L2224/1703 , H01L2224/48091 , H01L2224/49171 , H01L2224/4943 , H01L2224/731 , H01L2224/73207 , H01L2224/81194 , H01L2224/81801 , H01L2225/06513 , H01L2225/06517 , H01L2225/06555 , H01L2225/06562 , H01L2225/06586 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/014 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： An integrated circuit (“IC”) package having two or more dice stacked on a substrate and electrically coupled using two or more different connection technologies may improve high-speed input/output (“I/O”) bandwidth. In an embodiment, one die is a processor and at least one other die is a dynamic random access memory (“DRAM”). One or more of the dice may be thinned and placed between the substrate and a portion of one or more of the other dice, which may be horizontally offset. One or more of the dice may be embedded in the substrate. The dice may be coupled to each other and to the substrate using a combination of controlled-collapse chip connection (“C4”) and wirebonding connection technologies. Methods of fabrication, and application of the package to an electronic assembly and to an electronic system, are also described.
摘要翻译：具有堆叠在基板上并且使用两种或更多种不同连接技术电耦合的两个或多个骰子的集成电路（“IC”）封装可以改善高速输入/输出（“I / O”）带宽。在一个实施例中，一个管芯是处理器，并且至少一个其它管芯是动态随机存取存储器（“DRAM”）。一个或多个骰子可以变薄并且放置在基底和可以水平偏移的另一个骰子中的一个或多个的一部分之间。一个或多个骰子可以嵌入在基底中。骰子可以使用控制崩溃芯片连接（“C4”）和引线键合连接技术的组合彼此耦合到基板。还描述了制造方法以及将包装应用于电子组件和电子系统。

74. 发明申请

US20070297713A1 CHIP-TO-CHIP OPTICAL INTERCONNECT 有权
标题翻译：芯片间光纤互连
公开(公告)号：US20070297713A1
公开(公告)日：2007-12-27
申请号：US11452820
申请日：2006-06-13
申请人： Daoqiang Lu , Jiamiao Tang , Jiangqi He , Edward A. Zarbock
发明人： Daoqiang Lu , Jiamiao Tang , Jiangqi He , Edward A. Zarbock
IPC分类号： G02B6/12
CPC分类号： G02B6/4232 , G02B6/421 , G02B6/4214 , G02B6/4246
摘要： A chip-to-chip optical interconnect includes a substrate, an optoelectronic die, and a waveguide structure. The substrate includes an optical via passing through the substrate. The optoelectronic die is disposed on the substrate and aligned to optically communicate through the optical via. A waveguide structure is positioned proximate to the substrate and aligned with the optical via to communicate optical signals with the optoelectronic die through the optical via.
摘要翻译：芯片到芯片的光学互连包括衬底，光电管芯和波导结构。衬底包括穿过衬底的光学通孔。光电管芯设置在衬底上并对准以通过光通孔光学连通。波导结构被定位在靠近基板并与光通孔对齐以通过光通孔与光电管芯通信光信号。

75. 发明申请

US20070223865A1 Optical interconnect with passive optical alignment 有权
标题翻译：具有无源光学对准的光学互连
公开(公告)号：US20070223865A1
公开(公告)日：2007-09-27
申请号：US11386149
申请日：2006-03-22
申请人： Daoqiang Lu , Henning Braunisch , Bram Leader , Mark Trobough
发明人： Daoqiang Lu , Henning Braunisch , Bram Leader , Mark Trobough
IPC分类号： G02B6/36
CPC分类号： G02B6/4292 , G02B6/3885 , G02B6/423 , H01L2224/16225
摘要： A coupler is passively aligned over a substrate, wherein the coupler is laterally aligned to an optoelectronic (OE) device coupled to the substrate. The coupler is placed on the substrate, wherein the coupler is vertically aligned to the OE device. The coupler is fixed to the substrate.
摘要翻译：耦合器在衬底上被动对准，其中耦合器横向对准耦合到衬底的光电子（OE）器件。耦合器被放置在基板上，其中耦合器垂直对准OE设备。耦合器固定在基板上。

76. 发明申请

US20070158807A1 Edge interconnects for die stacking 审中-公开
标题翻译：边缘互连用于芯片堆叠
公开(公告)号：US20070158807A1
公开(公告)日：2007-07-12
申请号：US11322297
申请日：2005-12-29
申请人： Daoqiang Lu , Wei Shi , Qing Zhou , Jiangqi He
发明人： Daoqiang Lu , Wei Shi , Qing Zhou , Jiangqi He
IPC分类号： H01L23/02
CPC分类号： H01L25/0657 , H01L25/50 , H01L2224/24145 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/73265 , H01L2225/06513 , H01L2225/06517 , H01L2225/06524 , H01L2225/06551 , H01L2225/06582 , H01L2924/01079 , H01L2924/15311 , H01L2924/00014
摘要： Electronic devices and methods for fabricating electronic devices are described. One embodiment includes an electronic device having a first die, the first die having a top surface, a bottom surface, and a plurality of side surfaces. The first die also includes a plurality of metal pads on the top surface extending to an outer edge of the top surface, and a plurality of metal pads on the bottom surface extending to an outer edge of the bottom surface. The first die also includes a plurality of metal regions along the side surfaces, wherein each of the metal regions extends between one of the metal pads on the top surface and one of the metal pads on the bottom surface. Other embodiments are described and claimed.
摘要翻译：描述了用于制造电子设备的电子设备和方法。一个实施例包括具有第一管芯的电子器件，第一管芯具有顶表面，底表面和多个侧表面。第一管芯还包括在顶表面上延伸到顶表面的外边缘的多个金属焊盘，以及在底表面上延伸到底表面的外边缘的多个金属焊盘。第一管芯还包括沿着侧表面的多个金属区域，其中每个金属区域在顶表面上的金属焊盘之一和底表面上的金属焊盘中的一个之间延伸。描述和要求保护其他实施例。

77. 发明申请

US20070140627A1 Passively aligned optical-electrical interface with microlenses 有权
标题翻译：被动对准的光电接口与微透镜
公开(公告)号：US20070140627A1
公开(公告)日：2007-06-21
申请号：US11313534
申请日：2005-12-21
申请人： Daoqiang Lu
发明人： Daoqiang Lu
IPC分类号： G02B6/36
CPC分类号： G02B6/4249 , G02B6/4206 , G02B6/4231
摘要： An optical-electrical interface for interfacing optical signals with electrical signals. The optical-electrical interface includes an alignment interface for receiving an external waveguide connector from a first side. The alignment interface includes an alignment structure to mate with a corresponding alignment structure of the external waveguide connector to passively align the external waveguide connector. A first microlens is disposed on the first side of the alignment interface. A second microlens is disposed on a second side of the alignment interface. An optical path passes through the alignment interface between the first microlens and the second microlens. A conductor is disposed on the second side of the alignment interface.
摘要翻译：用于将光信号与电信号对接的光电接口。光电接口包括用于从第一侧接收外部波导连接器的对准接口。对准接口包括对准结构，以与外部波导连接器的对应对准结构配合，以被动对准外部波导连接器。第一微透镜设置在对准界面的第一侧上。第二微透镜设置在对准界面的第二侧上。光路穿过第一微透镜和第二微透镜之间的对准界面。导体布置在对准界面的第二侧上。

78. 发明申请

US20070127865A1 OPTICAL DEVICES AND METHODS TO CONSTRUCT THE SAME 审中-公开
标题翻译：光学装置及其构造方法
公开(公告)号：US20070127865A1
公开(公告)日：2007-06-07
申请号：US11671775
申请日：2007-02-06
申请人： Daoqiang Lu , Gilroy Vandentop
发明人： Daoqiang Lu , Gilroy Vandentop
IPC分类号： G02B6/12
CPC分类号： G02B6/423 , G02B6/4232
摘要： Optical devices and methods for constructing the same are disclosed. An example optical device includes an optical transmitter, a photodetector and a waveguide optically coupling the optical transmitter and the photodetector. It also includes a substrate having a first cavity to receive the optical transmitter and a second cavity to receive the second transmitter. The first and second cavities are located and dimensioned to passively align the optical transmitter, the waveguide and the photodetector when the transmitter is inserted into the first cavity and the photodetector is inserted into the second cavity.
摘要翻译：公开了用于构造它们的光学器件和方法。一种示例性光学装置包括光发射器，光电检测器和光学耦合光发射器和光电检测器的波导。其还包括具有用于接收光发射器的第一腔体和用于接收第二发射器的第二腔体的衬底。第一和第二空腔的位置和尺寸被定位成当发射器被插入到第一空腔中并且光电检测器被插入到第二腔中时被动对准光发射器，波导和光电检测器。

79. 发明申请

US20060291771A1 Methods and apparatus to mount a waveguide to a substrate 有权
标题翻译：将波导安装到基板的方法和装置
公开(公告)号：US20060291771A1
公开(公告)日：2006-12-28
申请号：US11166577
申请日：2005-06-24
申请人： Henning Braunisch , Daoqiang Lu , Nathaniel Arbizu
发明人： Henning Braunisch , Daoqiang Lu , Nathaniel Arbizu
IPC分类号： G02B6/26 , G02B6/12 , G02B6/30 , G02B6/36 , G02B6/42
CPC分类号： G02B6/4224 , G02B6/4204 , G02B6/4214 , G02B6/4239 , G02B6/4249 , H01L2224/14 , H01L2224/16225
摘要： Methods and apparatus to mount an optical waveguide to a substrate are disclosed. A disclosed method involves providing a substrate having a first layer and a second layer. The first layer includes at least one alignment fiducial and the second layer covers the at least one fiducial. At least a portion of the second layer is removed to render the fiducial visible and a waveguide is automatically aligned with the first fiducial. The waveguide is then fixed to the substrate.
摘要翻译：公开了将光波导安装到衬底的方法和装置。所公开的方法涉及提供具有第一层和第二层的衬底。第一层包括至少一个对准基准，第二层覆盖至少一个基准。去除第二层的至少一部分以使基准可见，并且波导自动与第一基准对准。然后将波导固定到基板。

80. 发明申请

US20060244148A1 Solder deposition on wafer backside for thin-die thermal interface material 有权
标题翻译：用于薄模热界面材料的晶片背面上的焊料沉积
公开(公告)号：US20060244148A1
公开(公告)日：2006-11-02
申请号：US11116554
申请日：2005-04-28
申请人： Daoqiang Lu
发明人： Daoqiang Lu
IPC分类号： H01L21/48 , H01L23/52
CPC分类号： H01L21/4871 , H01L21/6836 , H01L21/78 , H01L24/27 , H01L24/29 , H01L24/31 , H01L24/75 , H01L24/83 , H01L2221/68327 , H01L2224/0401 , H01L2224/04026 , H01L2224/16 , H01L2224/274 , H01L2224/29101 , H01L2224/29109 , H01L2224/29111 , H01L2224/29144 , H01L2224/2919 , H01L2224/73253 , H01L2224/83193 , H01L2224/83801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01023 , H01L2924/01029 , H01L2924/01049 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/01327 , H01L2924/0133 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/16152 , H01L2924/19043 , H01L2924/01047 , H01L2924/3512 , H01L2924/00 , H01L2924/00014
摘要： A solder is deposited on the backside of a wafer. The wafer can be pre-deposited with a barrier layer such as a titanium base and other materials. Deposition is carried out by electroplating, electroless plating, chemical vapor deposition, and physical vapor deposition. The solder-deposited die is bonded with a heat spreader that did not require a pre-deposited solder.
摘要翻译：焊料沉积在晶片的背面。晶片可以预先沉积有阻挡层，例如钛基和其它材料。通过电镀，化学镀，化学气相沉积和物理气相沉积进行沉积。焊料沉积的模具与不需要预沉积焊料的散热器结合。

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