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61. 发明授权

US10644650B2 Amplifier configuration for load-line enhancement 有权
公开(公告)号：US10644650B2
公开(公告)日：2020-05-05
申请号：US16138811
申请日：2018-09-21
申请人： Qualcomm Incorporated
发明人： Ibrahim Ramez Chamas
IPC分类号： H03F3/45 , H03F1/02 , H03F3/213
CPC分类号： H03F1/0211 , H03F1/0261 , H03F3/213 , H03F3/45188 , H03F3/45215 , H03F3/45242 , H03F2200/267 , H03F2200/387 , H03F2200/507 , H03F2203/45022 , H03F2203/45156 , H03F2203/45316 , H03F2203/45374 , H03F2203/45396 , H03F2203/45638 , H03F2203/45731
摘要： Amplifier configuration for load-line enhancement is described herein. In some implementations, an apparatus includes an amplifier. The amplifier includes at least one plus transistor stack, at least one minus transistor stack, and at least one inductor. The at least one plus transistor stack is coupled to a plus amplifier node and a plus input node. The at least one minus transistor stack is coupled to a minus amplifier node and a minus input node. The at least one inductor is coupled between the plus amplifier node and the minus amplifier node, with the at least one inductor including an inter-inductor node. The amplifier also includes a minus power switch coupled between the minus amplifier node and one or more supply voltages and an inductor power switch coupled between the inter-inductor node and at least one supply voltage.

62. 发明申请

US20190187493A1 BREAKDOWN VOLTAGE ENHANCEMENT TECHNIQUES FOR A HIGH SPEED AMPLIFIER 审中-公开
公开(公告)号：US20190187493A1
公开(公告)日：2019-06-20
申请号：US16227867
申请日：2018-12-20
申请人： Fmax Technologies, Inc.
发明人： Iain Ross Mactaggart
IPC分类号： G02F1/01 , H03F1/08 , H03F3/45 , H03F3/217
CPC分类号： G02F1/0121 , H03F1/083 , H03F3/217 , H03F3/45085 , H03F2203/45151 , H03F2203/45316 , H03F2203/45374
摘要： Techniques for providing a modulation driver signal are disclosed. In an example, a modulation driver can include a first transistor configured to receive a first input signal having a first voltage swing, a second transistor coupled in series with the first transistor, and a third transistor configured to limit a third voltage swing across the second transistor. The second transistor can be configured to provide a representation of the first input signal as a first output signal of the modulator driver. The first output signal can have a second voltage swing greater than the first voltage swing.

63. 发明授权

US09935616B2 Programmable resistive elements as variable tuning elements 有权
公开(公告)号：US09935616B2
公开(公告)日：2018-04-03
申请号：US15340729
申请日：2016-11-01
申请人： FREESCALE SEMICONDUCTOR, INC.
发明人： Michael A. Sadd , Anirban Roy
IPC分类号： H01L23/522 , H03J5/02 , G11C29/02 , G11C29/28 , G11C29/50 , H01L23/525 , H01L23/528 , H01L23/532 , H01L27/06 , G11C5/14 , H03K19/003
CPC分类号： H03J5/02 , G02F2203/48 , G11C5/147 , G11C29/021 , G11C29/28 , G11C29/50008 , H01L23/5228 , H01L23/525 , H01L23/528 , H01L23/53271 , H01L27/0629 , H03F3/45183 , H03F2203/45048 , H03F2203/45372 , H03F2203/45374 , H03F2203/45396 , H03F2203/45674 , H03F2203/45686 , H03F2203/45702 , H03F2203/45726 , H03K19/00369
摘要： The present disclosure provides circuit and method embodiments for calibrating a signal of an integrated circuit. A programmable resistive element is coupled in series with a node of the integrated circuit, where at least part of the integrated circuit is formed in at least one front end of line (FEOL) device level. The programmable resistive element is formed in at least one back end of line (BEOL) wiring level, and the programmable resistive element is in a non-volatile resistive state that is variable across a plurality of non-volatile resistive states in response to a program signal applied to the programmable resistive element.

64. 发明授权

US09515635B1 Programmable resistive elements as variable tuning elements 有权
标题翻译：可编程电阻元件作为可变调谐元件
公开(公告)号：US09515635B1
公开(公告)日：2016-12-06
申请号：US14807157
申请日：2015-07-23
申请人： FREESCALE SEMICONDUCTOR, INC.
发明人： Michael A. Sadd , Anirban Roy
IPC分类号： H03J5/02
CPC分类号： H03J5/02 , G02F2203/48 , G11C5/147 , G11C29/021 , G11C29/28 , G11C29/50008 , H01L23/5228 , H01L23/525 , H01L23/528 , H01L23/53271 , H01L27/0629 , H03F3/45183 , H03F2203/45048 , H03F2203/45372 , H03F2203/45374 , H03F2203/45396 , H03F2203/45674 , H03F2203/45686 , H03F2203/45702 , H03F2203/45726 , H03K19/00369
摘要： The present disclosure provides circuit and method embodiments for calibrating a signal of an integrated circuit. A programmable resistive element is coupled in series with a node of the integrated circuit, where at least part of the integrated circuit is formed in at least one front end of line (FEOL) device level. The programmable resistive element is formed in at least one back end of line (BEOL) wiring level, and the programmable resistive element is in a non-volatile resistive state that is variable across a plurality of non-volatile resistive states in response to a program signal applied to the programmable resistive element.
摘要翻译：本公开提供用于校准集成电路的信号的电路和方法实施例。可编程电阻元件与集成电路的节点串联耦合，其中集成电路的至少一部分形成在至少一个前端（FEOL）器件级中。可编程电阻元件形成在线路（BEOL）布线级中的至少一个后端，并且可编程电阻元件处于非易失性电阻状态，其响应于程序在多个非易失性电阻状态下变化信号施加到可编程电阻元件。

65. 发明授权

US09425743B2 Buffer amplifier and trans-impedance amplifier including the same 有权
标题翻译：缓冲放大器和跨阻放大器包括相同
公开(公告)号：US09425743B2
公开(公告)日：2016-08-23
申请号：US14565939
申请日：2014-12-10
申请人： Electronics and Telecommunications Research Institute
发明人： Young Ho Kim , Sang Soo Lee
IPC分类号： H03F3/45 , H03F1/02 , H03F1/56 , H03F1/32 , H03F1/08
CPC分类号： H03F1/0205 , H03F1/086 , H03F1/3205 , H03F1/3211 , H03F1/56 , H03F3/45183 , H03F3/45197 , H03F3/45748 , H03F2200/387 , H03F2200/405 , H03F2200/453 , H03F2203/45112 , H03F2203/45296 , H03F2203/45301 , H03F2203/45374 , H03F2203/45644 , H03F2203/45652 , H03F2203/45702
摘要： Provided is a buffer amplifier. The buffer amplifier includes: a replica bias unit dividing an internal power voltage received from an internal power node to generate a bias voltage; an input unit including a first differential amplifier comparing a first differential input signal with the bias voltage to output a first internal signal and a second differential amplifier comparing a second differential input signal with the bias voltage to output a second internal signal; and an output unit including a third differential amplifier comparing the first internal signal with the second internal signal to output a first differential output signal and a second differential output signal.
摘要翻译：提供了一个缓冲放大器。缓冲放大器包括：复制偏置单元，分割从内部功率节点接收的内部电力电压以产生偏置电压; 输入单元，包括：第一差分放大器，将第一差分输入信号与偏置电压进行比较以输出第一内部信号;以及第二差分放大器，将第二差分输入信号与偏置电压进行比较，以输出第二内部信号; 以及输出单元，其包括将所述第一内部信号与所述第二内部信号进行比较的第三差分放大器，以输出第一差分输出信号和第二差分输出信号。

66. 发明授权

US09264080B2 Reducing second order distortion in an amplifier 有权
标题翻译：降低放大器中的二阶失真
公开(公告)号：US09264080B2
公开(公告)日：2016-02-16
申请号：US14170107
申请日：2014-01-31
申请人： SILICON LABORATORIES INC.
发明人： Mark May
IPC分类号： H04B1/30 , H04B1/10
CPC分类号： H04B1/1018 , H03F1/3205 , H03F1/3211 , H03F3/195 , H03F3/45183 , H03F3/45753 , H03F2200/294 , H03F2200/375 , H03F2200/411 , H03F2203/45212 , H03F2203/45372 , H03F2203/45374 , H03F2203/45391 , H03F2203/45396 , H03F2203/45702 , H03F2203/45726
摘要： In an embodiment, an apparatus includes a component of a receiver path to receive and process an incoming signal. At least one element of the component is controllable based on a DC output of the component, to compensate for a second order intermodulation product of the apparatus. As one example, the component is a differential amplifier including a first transistor and a second transistor.
摘要翻译：在一个实施例中，装置包括用于接收和处理输入信号的接收机路径的组件。组件的至少一个元件可以基于组件的DC输出进行控制，以补偿设备的二阶互调产物。作为一个示例，该部件是包括第一晶体管和第二晶体管的差分放大器。

67. 发明授权

US09246459B2 Variable gain amplifier 有权
标题翻译：可变增益放大器
公开(公告)号：US09246459B2
公开(公告)日：2016-01-26
申请号：US14450001
申请日：2014-08-01
申请人： Fujitsu Limited
发明人： Shuo-Chun Kao , Nikola Nedovic
IPC分类号： H03F3/45 , H03G3/00 , H03G1/00
CPC分类号： H03G3/00 , H03F3/45 , H03F3/45071 , H03F3/45183 , H03F3/45197 , H03F3/45206 , H03F2203/45008 , H03F2203/45372 , H03F2203/45374 , H03F2203/45562 , H03F2203/45644 , H03F2203/45702 , H03G1/0029
摘要： A method may include applying an input differential voltage to input terminals of an amplifier, a first input terminal coupled to a gate of a first transistor and a second input terminal coupled to a gate of a second transistor. The method may also include varying a gain of the amplifier by varying at least one of: a resistance of a first resistor, the first resistor coupled between a source of the first transistor and a source of the second transistor; and a resistance of a second resistor, the second resistor coupled between a source of a third transistor and a source of a fourth transistor; wherein: the third transistor is coupled at its drain to the drain of the first transistor; and the fourth transistor is coupled at its drain to the drain of the second transistor and a gate of the third transistor and coupled at its gate to the drain of the third transistor.
摘要翻译：方法可以包括将输入差分电压施加到放大器的输入端，耦合到第一晶体管的栅极的第一输入端和耦合到第二晶体管的栅极的第二输入端。该方法还可以包括通过改变以下至少一个来改变放大器的增益：第一电阻器的电阻，耦合在第一晶体管的源极和第二晶体管的源极之间的第一电阻器; 以及第二电阻器的电阻，所述第二电阻器耦合在第三晶体管的源极和第四晶体管的源极之间; 其中：所述第三晶体管在其漏极耦合到所述第一晶体管的漏极; 并且第四晶体管在其漏极耦合到第二晶体管的漏极和第三晶体管的栅极，并在其栅极处耦合到第三晶体管的漏极。

68. 发明授权

US08964825B2 Analog signal current integrators with tunable peaking function 有权
标题翻译：具有可调谐峰值功能的模拟信号电流积分器
公开(公告)号：US08964825B2
公开(公告)日：2015-02-24
申请号：US13399675
申请日：2012-02-17
申请人： Troy J. Beukema , John F. Bulzacchelli
发明人： Troy J. Beukema , John F. Bulzacchelli
IPC分类号： H03H7/30 , H04B1/10
CPC分类号： G06G7/184 , H03F3/45098 , H03F2203/45296 , H03F2203/45298 , H03F2203/45374 , H03F2203/45466 , H03F2203/45616 , H03F2203/45618 , H04L25/0296 , H04L25/03885
摘要： Analog signal current integrators are provided having tunable peaking functions. Analog signal current integrators with tunable peaking functions enable data rate dependent loss compensation for applications in high data rate receiver integrated circuits incorporating advanced equalization functions, such as decision-feedback equalizers. For instance, a current integrator circuit includes a current integrating amplifier circuit comprising an adjustable circuit element to tune a peaking response of the current integrator circuit, and a peaking control circuit to generate a control signal to adjust a value of the adjustable circuit element as a function of an operating condition of the current integrator circuit. The operating condition may be a specified data rate or a communication channel characteristic or both. The adjustable circuit element may be a degeneration capacitor or a bias current source.
摘要翻译：模拟信号电流积分器具有可调峰值功能。具有可调谐峰值功能的模拟信号电流积分器可实现数据速率相关的损耗补偿，适用于包含高级均衡功能的高数据速率接收机集成电路中的应用，如决策反馈均衡器。例如，电流积分器电路包括电流积分放大器电路，该电流积分放大器电路包括调整电路元件以调节电流积分器电路的峰值响应，以及峰化控制电路，用于产生控制信号，以将可调节电路元件的值调整为当前积分器电路的工作状态的功能。操作条件可以是指定的数据速率或通信信道特性，也可以是两者。可调电路元件可以是退化电容器或偏置电流源。

69. 发明授权

US08866531B2 Broadband analog radio-frequency integrator 有权
标题翻译：宽带模拟射频积分器
公开(公告)号：US08866531B2
公开(公告)日：2014-10-21
申请号：US13576635
申请日：2011-02-11
申请人： Dev V. Gupta , Zhiguo Lai
发明人： Dev V. Gupta , Zhiguo Lai
IPC分类号： G06G7/18 , H03F1/22 , H03F3/19 , H03F3/45 , H03H7/24 , H03H11/12 , H03H11/46
CPC分类号： H03F3/45183 , H03F1/223 , H03F3/19 , H03F3/45188 , H03F3/45197 , H03F3/45201 , H03F2200/264 , H03F2200/36 , H03F2203/45318 , H03F2203/45374 , H03F2203/45644 , H03F2203/45686 , H03F2203/45702 , H03H7/24 , H03H7/25 , H03H7/482 , H03H7/487 , H03H11/1256 , H03H11/53 , H03H2210/017 , H03H2210/021 , H03H2210/028 , H03H2210/036 , H03H2210/04
摘要： Broadband analog radio-frequency devices can be used to create building blocks for scalable analog signal processors that operate over bandwidths of 50 MHz to 20 GHz or more. Example devices include integrators (transconductors), digitally controlled attenuators, buffers, and scalable summers implemented using deep sub-micron CMOS technology. Because the devices are implemented in CMOS, the ratio of trace/component size to signal wavelength is about the same as that of low-frequency devices implemented in printed circuit boards. Combining this scaling with high gain/high bandwidth enables implementation of feedback and programmability for broadband analog signal processing.
摘要翻译：宽带模拟射频设备可用于为可扩展的模拟信号处理器创建构建块，该处理器的工作频率可达50 MHz至20 GHz或更高。示例器件包括使用深亚微米CMOS技术实现的积分器（跨导体），数字控制衰减器，缓冲器和可扩展的夏季。由于器件是用CMOS实现的，所以迹线/器件尺寸与信号波长的比率与印刷电路板中实现的低频器件的比率大致相同。将此扩展与高增益/高带宽相结合，可实现宽带模拟信号处理的反馈和可编程性。

70. 发明授权

US08614603B1 Auto leveling receiver 有权
标题翻译：自动调平接收机
公开(公告)号：US08614603B1
公开(公告)日：2013-12-24
申请号：US12796937
申请日：2010-06-09
申请人： Russell D. Wyse , Mark A. Willi
发明人： Russell D. Wyse , Mark A. Willi
IPC分类号： H03F3/45
CPC分类号： H03F3/211 , H03F3/45085 , H03F3/45475 , H03F2200/27 , H03F2200/294 , H03F2200/405 , H03F2200/435 , H03F2200/78 , H03F2203/45352 , H03F2203/45362 , H03F2203/45374 , H03F2203/45454 , H03F2203/45496 , H03F2203/45504 , H03F2203/45506 , H03F2203/45702 , H03G1/0023
摘要： An auto leveling circuit suitable for use in an RF receiver. The auto leveling circuit comprises a plurality of automatic gain control (AGC) circuits each having at least one amplifier stage to amplify an RF signal according to at least two incrementally discrete levels. In order to selectively control gain, the AGC circuits further comprise peak detectors to detect the amplitude of the amplified RF signal and comparators to compare the amplitude of the RF signal with a threshold value indicative of a saturation point of the amplifiers.
摘要翻译：适用于RF接收机的自动调平电路。自动调平电路包括多个自动增益控制（AGC）电路，每个自动增益控制（AGC）电路各自具有至少一个放大器级，以根据至少两个递增离散电平来放大RF信号。为了选择性地控制增益，AGC电路还包括用于检测放大的RF信号的幅度的峰值检测器和比较器，以将RF信号的幅度与表示放大器的饱和点的阈值进行比较。

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