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    • 64. 发明授权
    • Methods and apparatuses for guaranteed coherency of buffered direct-memory-access data
    • 用于缓冲直接存储器访问数据的保证一致性的方法和装置
    • US06807587B1
    • 2004-10-19
    • US09695112
    • 2000-10-23
    • James MurrayJean-Didier Allegrucci
    • James MurrayJean-Didier Allegrucci
    • G06F1328
    • G06F13/28
    • A method for ensuring data coherency in buffered direct memory access (DMA) data transfers. The DMA controller realizes the last piece of data is being transferred to the write buffer. The DMA controller then sends a “Last Write Data” signal to the external memory access arbitration unit. The external memory access arbitration unit then allows completion of all pending memory operations. If a memory request occurs, a wait line is asserted such that memory operations (i.e., reading from, or writing to, the memory) are prevented for all sources other than the DMA channel associated with the “Last Write Data” signal. The external memory access arbitration unit also grants priority to the DMA channel associated with the “Last Write Data” signal. This effectively flushes the write buffer and completes the buffered DMA data transfer. The external memory access arbitration unit then deasserts any asserted wait lines and memory operations are no longer prevented.
    • 一种用于确保缓冲直接存储器访问(DMA)数据传输中的数据一致性的方法。 DMA控制器实现将最后一条数据传输到写缓冲区。 DMA控制器然后将“最后写入数据”信号发送到外部存储器访问仲裁单元。 外部存储器访问仲裁单元然后允许完成所有待处理的存储器操作。 如果发生存储器请求,则等待线被断言,使得除了与“最后写入数据”信号相关联的DMA通道之外的所有源,防止存储器操作(即,从存储器读取或写入存储器)。 外部存储器访问仲裁单元还向与“最后写入数据”信号相关联的DMA通道优先。 这有效地刷新写入缓冲区并完成缓冲的DMA数据传输。 外部存储器访问仲裁单元然后解除所有被断言的等待行,并且不再阻止存储器操作。
    • 65. 发明授权
    • Method and apparatus for multi-bus breakpoint stepping
    • 多总线断点步进的方法和装置
    • US06757846B1
    • 2004-06-29
    • US09707318
    • 2000-11-06
    • James MurrayJean-Didier AllegrucciJerry Case
    • James MurrayJean-Didier AllegrucciJerry Case
    • G06F1100
    • G06F11/362
    • The present invention provides a method for breakpoint stepping a multi-bus device. The multi-bus device includes a breakpoint unit capable of detecting bus events on multiple busses. The breakpoint unit is originally programmed to break on the detection of a specified bus event on a bus selected from multiple busses. After the specified bus event has been detected and the device has entered one of several possible frozen states, the breakpoint unit may be programmed to detect a new bus event on a bus selected from multiple busses. The method is repeated as needed to achieve breakpoint stepping, including single stepping.
    • 本发明提供了一种多总线装置的断点步进方法。 多总线装置包括能够检测多个总线上的总线事件的断点单元。 断点单元最初被编程为在从多个总线选择的总线上检测到指定的总线事件时中断。 在检测到指定的总线事件并且设备已经进入几个可能的冻结状态之一之后,断点单元可以被编程为在从多个总线上选择的总线上检测新的总线事件。 根据需要重复该方法以实现断点步进,包括单步执行。