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    • 62. 发明授权
    • Efficient connection between modules of removable electronic circuit cards
    • 可拆卸电子电路卡模块之间的高效连接
    • US07467249B2
    • 2008-12-16
    • US11303220
    • 2005-12-15
    • Yosi PintoAviad ZerAmir TsuriAsher Druck
    • Yosi PintoAviad ZerAmir TsuriAsher Druck
    • G06F13/00G06F13/12
    • G06F13/409G06F13/385G06F2213/3804G06F2213/3814G06K19/07
    • A removable electronic circuit card has multiple modules connected to the card's bus in parallel so that each module can exchange commands and data independently with the host. According to a first aspect of the present invention, this achieved by a controller-to-controller interface whereby the modules can facilitate their interactions with the host. In a first set of embodiments, the modules are on a single card, while in a second set of embodiments the modules are distributed across multiple cards, where a first card attaches to the host and other cards attach to the first card rather than directly to the host. In all of these cases, the host sees the multiple modules as a single card having a single module. In a further aspect of the present invention, the card or cards are able to communicate with the host in more than one protocol.
    • 可移动电子电路卡具有并行连接到卡总线的多个模块,使得每个模块可以与主机独立地交换命令和数据。 根据本发明的第一方面,这通过控制器到控制器接口实现,由此模块可以促进它们与主机的交互。 在第一组实施例中,模块在单个卡上,而在第二组实施例中,模块分布在多个卡上,其中第一卡连接到主机,而其他卡连接到第一卡,而不是直接连接到 主人。 在所有这些情况下,主机将多个模块视为具有单个模块的单个卡。 在本发明的另一方面,卡或卡能够以多于一种协议与主机通信。
    • 63. 发明申请
    • Multiple Removable Non-Volatile Memory Cards Serially Communicating with a Host
    • 与主机串行通信的多个可移动非易失性存储卡
    • US20080077719A1
    • 2008-03-27
    • US11947131
    • 2007-11-29
    • Yoram CedarMickyl HoltzmanYosi Pinto
    • Yoram CedarMickyl HoltzmanYosi Pinto
    • G06F13/38
    • G06F13/1694G06F12/0653G06F12/0661G06F13/385G06F13/387G06F13/4239G06F2212/2022G06F2213/0052
    • Two or more very small encapsulated electronic circuit cards to which data are read and written are removably inserted into two or more sockets of a host system that is wired to the sockets. According to one aspect of the disclosure, command and response signals are normally communicated between the host and the cards by a single circuit commonly connected between the host and all of the sockets but during initialization of the system a unique relative card address is confirmed to have been written into each card inserted into the sockets by connecting the command and status circuit to each socket one at a time in sequence. This is a fast and relatively simple way of setting card addresses upon initialization of such a system. According to a second aspect of the disclosure, the host adapts to transferring data between it and different cards of the system over at least two different number of the data lines commonly connected between the host and all of one or more sockets, each card permanently storing a host readable indication of the number of parallel data lines the card is capable of using. This allows increasing the rate of data transfer when the need justifies an increased card circuit complexity. According to a third aspect of the disclosure, a serial stream of data is sent over a number of data lines from one to many by alternately connecting bits of the stream to a particular number of individual lines.
    • 读取和写入数据的两个或更多个非常小的封装的电子电路卡可移除地插入连接到插座的主机系统的两个或更多个插槽中。 根据本公开的一个方面,命令和响应信号通常由主机与所有插座之间通用连接的单个电路在主机和卡之间进行通信,但是在系统初始化期间,唯一的相关卡地址被确认具有 通过将命令和状态电路一次一个地连接到每个插座,将其写入插入插座的每个卡中。 这是在这种系统初始化时设置卡地址的快速而相对简单的方式。 根据本公开的第二方面,主机适应于通过在主机与所有一个或多个插座之间共同连接的至少两个不同数量的数据线在其与系统的不同卡之间传送数据,每个卡永久存储 该卡能够使用的并行数据线的数量的主机可读指示。 当需要证明增加的卡电路复杂性时,这允许增加数据传输速率。 根据本公开的第三方面,通过将流的比特交替地连接到特定数量的单独线路,通过多个数据线从一个到多个数据线发送串行数据流。
    • 64. 发明授权
    • Multiple removable non-volatile memory cards serially communicating with a host
    • 与主机串行通信的多个可移动非易失性存储卡
    • US07305505B2
    • 2007-12-04
    • US11673958
    • 2007-02-12
    • Yoram CedarMichael HoltzmanYosi Pinto
    • Yoram CedarMichael HoltzmanYosi Pinto
    • G06F13/00
    • G06F13/1694G06F12/0653G06F12/0661G06F13/385G06F13/387G06F13/4239G06F2212/2022G06F2213/0052
    • Two or more very small encapsulated electronic circuit cards to which data are read and written are removably inserted into two or more sockets of a host system that is wired to the sockets. According to one aspect of the disclosure, command and response signals are normally communicated between the host and the cards by a single circuit commonly connected between the host and all of the sockets but during initialization of the system a unique relative card address is confirmed to have been written into each card inserted into the sockets by connecting the command and status circuit to each socket one at a time in sequence. This is a fast and relatively simple way of setting card addresses upon initialization of such a system. According to a second aspect of the disclosure, the host adapts to transferring data between it and different cards of the system over at least two different number of the data lines commonly connected between the host and all of one or more sockets, each card permanently storing a host readable indication of the number of parallel data lines the card is capable of using. This allows increasing the rate of data transfer when the need justifies an increased card circuit complexity. According to a third aspect of the disclosure, a serial stream of data is sent over a number of data lines from one to many by alternately connecting bits of the stream to a particular number of individual lines.
    • 读取和写入数据的两个或更多个非常小的封装的电子电路卡可移除地插入连接到插座的主机系统的两个或更多个插槽中。 根据本公开的一个方面,命令和响应信号通常由主机与所有插座之间通用连接的单个电路在主机和卡之间进行通信,但是在系统初始化期间,唯一的相关卡地址被确认具有 通过将命令和状态电路一次一个地连接到每个插座,将其写入插入插座的每个卡中。 这是在这种系统初始化时设置卡地址的快速而相对简单的方式。 根据本公开的第二方面,主机适应于通过在主机与所有一个或多个插座之间共同连接的至少两个不同数量的数据线在其与系统的不同卡之间传送数据,每个卡永久存储 该卡能够使用的并行数据线的数量的主机可读指示。 当需要证明增加的卡电路复杂性时,这允许增加数据传输速率。 根据本公开的第三方面,通过将流的比特交替地连接到特定数量的单独线路,通过多个数据线从一个到多个数据线发送串行数据流。
    • 65. 发明授权
    • Methods for writing non-volatile memories for increased endurance
    • 写入非易失性存储器以提高耐久性的方法
    • US07245556B1
    • 2007-07-17
    • US11321217
    • 2005-12-28
    • Yosi PintoGeoffrey S. GongwerOren Honen
    • Yosi PintoGeoffrey S. GongwerOren Honen
    • G11C8/00
    • G11C8/10G06F12/0246G06F2212/1036G06F2212/7211G11C16/349G11C16/3495
    • A memory system that incorporates methods of amplifying the lifetime of a counter made up of memory elements, such as EEPROM cells, having finite endurance. A relatively small memory made up of a number of individually accessible write segments, where, depending on the embodiment, each write segment is made up of a single memory cell or a small number of cells (e.g., a byte). A count is encoded so that it is distributed across a number of fields, each associated with one of the write segments, such that as the count is incremented only a single field (or, in the single bit embodiments, occasionally more than one field) is changed and that these changes are evenly distributed across the fields. The changed field is then written to the corresponding segment, while the other write segments are unchanged. Consequently, the number of rewrites to a given write segment is decreased, and the lifetime correspondingly increased, by a factor corresponding to the number of write segments used.
    • 一种存储系统,其包含放大由具有有限耐久性的诸如EEPROM单元之类的存储元件构成的计数器的寿命的方法。 由多个单独访问的写入段构成的相对小的存储器,其中根据实施例,每个写入段由单个存储器单元或少量单元(例如,一个字节)组成。 计数被编码,使得其分布在多个字段中,每个字段与写入段之一相关联,使得当计数仅增加一个字段(或者在单个实施例中,偶尔地多于一个字段)时, 改变了这些变化是均匀地分布在各个领域。 然后将更改的字段写入相应的段,而其他写段不变。 因此,给定写入段的重写次数减少,并且寿命相应地增加了与所使用的写入段数相对应的因子。