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61. 发明申请

US20120175610A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US20120175610A1
公开(公告)日：2012-07-12
申请号：US13346072
申请日：2012-01-09
申请人： Shunpei YAMAZAKI
发明人： Shunpei YAMAZAKI
IPC分类号： H01L29/786 , H01L21/34
CPC分类号： H01L29/66969 , H01L21/477 , H01L29/7869
摘要： A manufacturing method of a semiconductor device includes the steps of: forming a gate electrode over a substrate; forming a gate insulating film over the gate electrode; forming an oxide semiconductor film; performing heat treatment to form a second oxide semiconductor film after the step of forming the first oxide semiconductor film; forming a first conductive film; forming a first resist mask including regions whose thicknesses are different; etching the second oxide semiconductor film and the first conductive film using the first resist mask to form a third oxide semiconductor film and a second conductive film; reducing the size of the first resist mask to form a second resist mask; selectively etching the second conductive film using the second resist mask to remove a part of the second conductive film so that a source electrode and a drain electrode are formed.
摘要翻译：半导体器件的制造方法包括以下步骤：在衬底上形成栅电极; 在栅电极上形成栅极绝缘膜; 形成氧化物半导体膜; 在形成第一氧化物半导体膜的步骤之后进行热处理以形成第二氧化物半导体膜; 形成第一导电膜; 形成包括厚度不同的区域的第一抗蚀剂掩模; 使用第一抗蚀剂掩模蚀刻第二氧化物半导体膜和第一导电膜，以形成第三氧化物半导体膜和第二导电膜; 减小第一抗蚀剂掩模的尺寸以形成第二抗蚀剂掩模; 使用第二抗蚀剂掩模选择性地蚀刻第二导电膜以去除第二导电膜的一部分，从而形成源电极和漏电极。

62. 发明申请

US20120175608A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120175608A1
公开(公告)日：2012-07-12
申请号：US13345795
申请日：2012-01-09
申请人： Shunpei YAMAZAKI
发明人： Shunpei YAMAZAKI
IPC分类号： H01L29/786 , H01L21/34
CPC分类号： H01L27/1288 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L21/467 , H01L21/469 , H01L21/477 , H01L27/1214 , H01L27/1259 , H01L27/127 , H01L29/66969 , H01L29/7869 , H01L29/78693
摘要： The semiconductor device includes a gate electrode over a substrate, a gate insulating layer over the gate electrode, an oxide semiconductor layer over the gate insulating layer, and a source electrode and a drain electrode over the oxide semiconductor layer. A length of part of an outer edge of the oxide semiconductor layer from an outer edge of the source electrode to an outer edge of the drain electrode is more than three times, preferably more than five times as long as a channel length of the semiconductor device. Further, oxygen is supplied from the gate insulating layer to the oxide semiconductor layer by heat treatment. In addition, an insulating layer is formed after the oxide semiconductor layer is selectively etched.
摘要翻译：该半导体器件包括：衬底上的栅电极，栅电极上的栅极绝缘层，栅极绝缘层上的氧化物半导体层，以及氧化物半导体层上的源电极和漏电极。从源电极的外边缘到漏电极的外边缘的氧化物半导体层的外边缘的一部分的长度是半导体器件的沟道长度的三倍以上，优选大于五倍。此外，通过热处理从栅极绝缘层向氧化物半导体层提供氧。此外，在氧化物半导体层被选择性蚀刻之后形成绝缘层。

63. 发明申请

US20120161125A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120161125A1
公开(公告)日：2012-06-28
申请号：US13330811
申请日：2011-12-20
申请人： Shunpei YAMAZAKI
发明人： Shunpei YAMAZAKI
IPC分类号： H01L29/12 , H01L21/336 , H01L21/425 , H01L29/78
CPC分类号： H01L29/7869 , H01L29/66969 , H01L29/78618 , H01L29/78693
摘要： A semiconductor device capable of high speed operation is provided. Further, a highly reliable semiconductor device is provided. An oxide semiconductor having crystallinity is used for a semiconductor layer of a transistor. A channel formation region, a source region, and a drain region are formed in the semiconductor layer. The source region and the drain region are formed in such a manner that one or more of elements selected from rare gases and hydrogen are added to the semiconductor layer by an ion doping method or an ion implantation method with the use of a channel protective layer as a mask.
摘要翻译：提供能够进行高速运转的半导体装置。此外，提供了高度可靠的半导体器件。具有结晶性的氧化物半导体用于晶体管的半导体层。沟道形成区域，源极区域和漏极区域形成在半导体层中。源极区域和漏极区域以这样的方式形成，即通过使用沟道保护层的离子掺杂方法或离子注入方法将选自稀有气体和氢气中的一种或多种元素添加到半导体层中一个面具

64. 发明申请

US20120161124A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
公开(公告)号：US20120161124A1
公开(公告)日：2012-06-28
申请号：US13330801
申请日：2011-12-20
申请人： Shunpei YAMAZAKI
发明人： Shunpei YAMAZAKI
IPC分类号： H01L29/78 , H01L21/34
CPC分类号： H01L29/7869 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L21/426 , H01L27/1203 , H01L27/1225 , H01L27/1229 , H01L29/04 , H01L29/0847 , H01L29/36 , H01L29/42364 , H01L29/42384 , H01L29/4908 , H01L29/66969 , H01L29/78621 , H01L29/78696
摘要： A semiconductor device in which fluctuation in electric characteristics due to miniaturization is less likely to be caused is provided. The semiconductor device includes an oxide semiconductor film including a first region, a pair of second regions in contact with side surfaces of the first region, and a pair of third regions in contact with side surfaces of the pair of second regions; a gate insulating film provided over the oxide semiconductor film; and a first electrode that is over the gate insulating film and overlaps with the first region. The first region is a CAAC oxide semiconductor region. The pair of second regions and the pair of third regions are each an amorphous oxide semiconductor region containing a dopant. The dopant concentration of the pair of third regions is higher than the dopant concentration of the pair of second regions.

65. 发明申请

US20120161122A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120161122A1
公开(公告)日：2012-06-28
申请号：US13330772
申请日：2011-12-20
申请人： Shunpei YAMAZAKI
发明人： Shunpei YAMAZAKI
IPC分类号： H01L29/78 , H01L21/34
CPC分类号： H01L29/7869 , H01L21/02554 , H01L21/02565 , H01L21/02631
摘要： A miniaturized semiconductor device including a transistor in which a channel formation region is formed using an oxide semiconductor film and variation in electric characteristics due to a short-channel effect is suppressed is provided. In addition, a semiconductor device whose on-state current is improved is provided. A semiconductor device is provided with an oxide semiconductor film including a pair of second oxide semiconductor regions which are amorphous regions and a first oxide semiconductor region located between the pair of second oxide semiconductor regions, a gate insulating film, and a gate electrode provided over the first oxide semiconductor region with the gate insulating film interposed therebetween. One or more kinds of elements selected from Group 15 elements such as nitrogen, phosphorus, and arsenic are added to the second oxide semiconductor regions.
摘要翻译：提供一种小型半导体器件，其包括使用氧化物半导体膜形成沟道形成区域并且由于短沟道效应引起的电特性的变化的晶体管。另外，提供了导通状态电流改善的半导体装置。半导体器件设置有氧化物半导体膜，该氧化物半导体膜包括一对非晶区域的第二氧化物半导体区域和位于一对第二氧化物半导体区域之间的第一氧化物半导体区域，栅极绝缘膜和设置在该第二氧化物半导体区域上的栅电极第一氧化物半导体区域，其间具有栅极绝缘膜。从第15族元素如氮，磷和砷中选出的一种或多种元素被添加到第二氧化物半导体区域。

66. 发明申请

US20120145799A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20120145799A1
公开(公告)日：2012-06-14
申请号：US13372877
申请日：2012-02-14
申请人： Jun KOYAMA , Shunpei YAMAZAKI
发明人： Jun KOYAMA , Shunpei YAMAZAKI
IPC分类号： G06K19/077
CPC分类号： G06K19/0723 , G06K19/0719
摘要： A semiconductor device with improved reliability, in which increase in power consumption can be reduced. The semiconductor device includes an antenna for transmitting and receiving a wireless signal to/from a communication device and at least first and second functional circuits electrically connected to the antenna. The first functional circuit includes a power supply control circuit for controlling power supply voltage output from a power supply circuit in the second functional circuit. A power supply control circuit in the second functional circuit includes a transistor of which first terminal is electrically connected to an output terminal of the power supply circuit and second terminal is electrically connected to a ground line. A gate terminal of the transistor is electrically connected to the power supply control circuit included in one functional circuit.
摘要翻译：具有可靠性提高的能够降低功耗增加的半导体装置。半导体器件包括用于向/从通信设备发送和接收无线信号的天线以及电连接到天线的至少第一和第二功能电路。第一功能电路包括用于控制从第二功能电路中的电源电路输出的电源电压的电源控制电路。第二功能电路中的电源控制电路包括晶体管，其第一端子电连接到电源电路的输出端子，并且第二端子电连接到接地线。晶体管的栅极端子电连接到包括在一个功能电路中的电源控制电路。

67. 发明申请

US20120122277A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE 有权
标题翻译：用于制造半导体器件的半导体器件和方法
公开(公告)号：US20120122277A1
公开(公告)日：2012-05-17
申请号：US13356044
申请日：2012-01-23
申请人： Shunpei YAMAZAKI , Kengo AKIMOTO
发明人： Shunpei YAMAZAKI , Kengo AKIMOTO
IPC分类号： H01L21/34
CPC分类号： H01L29/78696 , H01L21/02318 , H01L21/02323 , H01L21/0234 , H01L21/02565 , H01L29/247 , H01L29/4908 , H01L29/66969 , H01L29/7869 , H01L29/78693
摘要： An object is to provide favorable interface characteristics of a thin film transistor including an oxide semiconductor layer without mixing of an impurity such as moisture. Another object is to provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability, and a method by which a semiconductor device can be manufactured with high productivity. A main point is to perform oxygen radical treatment on a surface of a gate insulating layer. Accordingly, there is a peak of the oxygen concentration at an interface between the gate insulating layer and a semiconductor layer, and the oxygen concentration of the gate insulating layer has a concentration gradient. The oxygen concentration is increased toward the interface between the gate insulating layer and the semiconductor layer.
摘要翻译：本发明的目的是提供一种薄膜晶体管的有利的界面特性，该薄膜晶体管包括氧化物半导体层，而不混入杂质如水分。另一个目的是提供一种包括具有优异的电特性和高可靠性的薄膜晶体管的半导体器件，以及可以以高生产率制造半导体器件的方法。要点是在栅极绝缘层的表面进行氧自由基处理。因此，在栅极绝缘层与半导体层之间的界面处存在氧浓度的峰值，并且栅极绝缘层的氧浓度具有浓度梯度。氧浓度朝向栅极绝缘层和半导体层之间的界面增加。

68. 发明申请

US20120119252A1 Light Emitting Element, Light Emitting Device and Electric Appliance Using the Same 有权
标题翻译：发光元件，发光元件及使用其的电器
公开(公告)号：US20120119252A1
公开(公告)日：2012-05-17
申请号：US13294458
申请日：2011-11-11
申请人： Kaoru KATO , Shunpei YAMAZAKI
发明人： Kaoru KATO , Shunpei YAMAZAKI
IPC分类号： H01L33/62
CPC分类号： H01L51/5048
摘要： It is an object of the present invention to provide a light emitting element with low drive voltage. In addition, it is another object to provide a light emitting device having the light emitting element. Further in addition, it is another object to provide an electric appliance which has a light emitting element with low drive voltage. A light emitting element of the present invention comprises a pair of electrodes, a layer containing a light emitting element and a layer containing a mixture material which contains a conductive material formed from an inorganic compound and an insulating material formed from an inorganic compound, which are interposed between the pair of electrodes, wherein the layer containing the mixture material has a resistivity of 50,000 to 1,000,000 ohm cm, preferably, 200,000 to 500,000 ohm cm. The drive voltage of the light emitting element can be lowered with the foregoing structure.
摘要翻译：本发明的目的是提供一种具有低驱动电压的发光元件。另外，另一个目的是提供一种具有发光元件的发光器件。此外，另一目的是提供一种具有低驱动电压的发光元件的电器。本发明的发光元件包括一对电极，包含发光元件的层和含有由无机化合物形成的导电材料和由无机化合物形成的绝缘材料的混合材料的层，它们是插入在该对电极之间，其中含有混合材料的层的电阻率为50,000至1,000,000欧姆厘米，优选为20万至50万欧姆厘米。通过上述结构，能够降低发光元件的驱动电压。

69. 发明申请

US20120108006A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
公开(公告)号：US20120108006A1
公开(公告)日：2012-05-03
申请号：US13346118
申请日：2012-01-09
申请人： Shunpei YAMAZAKI , Hidekazu MIYAIRI , Kengo AKIMOTO , Kojiro SHIRAISHI
发明人： Shunpei YAMAZAKI , Hidekazu MIYAIRI , Kengo AKIMOTO , Kojiro SHIRAISHI
IPC分类号： H01L21/36
CPC分类号： H01L29/66969 , H01L21/46 , H01L27/1225 , H01L29/7869
摘要： It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.

70. 发明申请

US20120104568A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120104568A1
公开(公告)日：2012-05-03
申请号：US13348097
申请日：2012-01-11
申请人： Shunpei YAMAZAKI
发明人： Shunpei YAMAZAKI
IPC分类号： H01L23/00
CPC分类号： H01L27/1266 , H01L27/1214 , H01L29/66772 , H01L2924/0002 , H01L2924/00
摘要： To provide a method for manufacturing a large-area semiconductor device, to provide a method for manufacturing a semiconductor device with high efficiency, and to provide a highly-reliable semiconductor device in the case of using a large-area substrate including an impurity element. A plurality of single crystal semiconductor substrates are concurrently processed to manufacture an SOI substrate, so that an area of a semiconductor device can be increased and a semiconductor device can be manufactured with improved efficiency. In specific, a series of processes is performed using a tray with which a plurality of semiconductor substrates can be concurrently processed. Here, the tray is provided with at least one depression for holding single crystal semiconductor substrates. Further, deterioration of characteristics of a manufactured semiconductor element is prevented by providing an insulating layer serving as a barrier layer against an impurity element which may affect characteristics of the semiconductor element.
摘要翻译：为了提供一种制造大面积半导体器件的方法，提供一种高效率制造半导体器件的方法，并且在使用包括杂质元素的大面积衬底的情况下提供高可靠性的半导体器件。同时处理多个单晶半导体衬底以制造SOI衬底，使得可以增加半导体器件的面积并且可以以更高的效率制造半导体器件。具体而言，使用能够同时处理多个半导体基板的托盘进行一系列处理。这里，托盘设置有用于保持单晶半导体衬底的至少一个凹部。此外，通过为可能影响半导体元件的特性的杂质元素提供用作阻挡层的绝缘层来防止制造的半导体元件的特性劣化。

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