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    • 66. 发明授权
    • Semiconductor non-volatile memory
    • 半导体非易失性存储器
    • US07710780B2
    • 2010-05-04
    • US12268891
    • 2008-11-11
    • Makoto Kojima
    • Makoto Kojima
    • G11C16/04
    • G11C16/0491G11C16/26
    • A semiconductor non-volatile memory, wherein a memory cell can be read accurately without having to discharge bit lines before the read operation. When reading a memory cell, the first bit line connected to the drain thereof is connected to the voltage source to receive a predetermined voltage, and the second bit line connected to the source thereof is connected to the sense amplifier. In this process, the third bit line in the vicinity of the second bit line is connected to the ground power supply. Thus, since the third bit line in the vicinity of the second bit line being sensed is forcibly set to the ground level, no charge flows in therefrom, thus preventing a current flowing into the second bit line.
    • 一种半导体非易失性存储器,其中可以准确地读取存储单元,而不必在读取操作之前对位线进行放电。 当读取存储单元时,连接到其漏极的第一位线连接到电压源以接收预定电压,并且连接到其源极的第二位线连接到读出放大器。 在该处理中,第二位线附近的第三位线与地电源连接。 因此,由于被感测的第二位线附近的第三位线被强制设定为接地电平,因此不会有电荷流入,从而防止电流流入第二位线。