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    • 62. 发明授权
    • Semiconductor memory device
    • 半导体存储器件
    • US06178108B1
    • 2001-01-23
    • US09258462
    • 1999-02-26
    • Shinichi MiyatakeShigekazu KaseMasayuki NakamuraMasatoshi HasegawaKazuhiko Kajigaya
    • Shinichi MiyatakeShigekazu KaseMasayuki NakamuraMasatoshi HasegawaKazuhiko Kajigaya
    • G11C1124
    • G11C11/22
    • In a semiconductor memory device having a plurality of memory cells in which each memory cell is formed of an address selection MOSFET and an information storing capacitor and the plate voltage consisting of an intermediate potential is supplied to the common electrode of the information storing capacitor, the memory access is enabled by detecting indirect that the plate voltage has reached the predetermined potential near the intermediate potential with the voltage detecting circuit or timer circuit, inhibiting the selecting operation of the word lines or precharging the pair bit lines to the intermediate potential when the plate voltage is lower than the predetermined potential, and then canceling the above inhibit condition after the plate voltage has reached the predetermined potential.
    • 在具有多个存储单元的半导体存储器件中,其中每个存储单元由地址选择MOSFET和信息存储电容器形成,并且由中间电位构成的板电压被提供给信息存储电容器的公共电极, 通过检测间接使用电压检测电路或定时器电路使板电压达到中间电位附近的预定电位来启用存储器访问,当板的电压被抑制时,字线的选择操作或预先充电到中间电位 电压低于预定电位,然后在板电压达到预定电位后取消上述禁止条件。
    • 68. 发明授权
    • Dynamic RAM, dynamic RAM plate voltage setting method, and information
processing system
    • 动态RAM,动态RAM板电压设定方法和信息处理系统
    • US5459684A
    • 1995-10-17
    • US197768
    • 1994-02-16
    • Masayuki NakamuraTetsuro MatsumotoKazuyoshi Oshima
    • Masayuki NakamuraTetsuro MatsumotoKazuyoshi Oshima
    • G11C11/404G11C11/407G11C11/4074G11C7/00G11C11/40
    • G11C11/4074
    • A dynamic RAM enhanced in integration and storage capacity, a method of setting a plate voltage of the dynamic RAM, and an information processing system reduced in size and enhanced in performance are provided. The plate voltage is set such that a leakage current of an information storage capacitor when a bit line voltage is positive relative to the plate voltage is made substantially equal to a leakage current of the capacitor when the bit line voltage is negative relative to the plate voltage. For this plate voltage setting, a plate voltage generating circuit is provided with an output voltage adjusting capability. A monitoring capacitor is formed on the same semiconductor wafer on which the information storage capacitor is formed. This monitoring capacitor is formed by a same method by which the information storage capacitor is formed, and is made of a same material of which the information storage capacitor is made. The monitoring capacitor is tested in a wafer probing process. Based on a measurement result, the plate voltage is set to an optimum level. The information processing system is constituted with the dynamic RAM as its memory device having the optimum plate voltage.
    • 提供集成和存储容量增强的动态RAM,设置动态RAM的板电压的方法以及尺寸减小和性能提高的信息处理系统。 板电压被设定为当位线电压相对于板电压为正时,信息存储电容器的漏电流基本上等于当位线电压相对于板电压为负时电容器的漏电流 。 对于该板电压设定,板电压发生电路具有输出电压调整能力。 在形成信息存储电容器的同一半导体晶片上形成监视电容器。 该监视电容器由形成信息存储电容器的相同方法形成,并且由与信息存储电容器相同的材料制成。 监测电容器在晶圆探测过程中进行测试。 基于测量结果,将板电压设置为最佳水平。 该信息处理系统由动态RAM作为具有最佳板电压的存储器件构成。