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61. 发明申请

US20190102303A1 SOFTWARE-TRANSPARENT HARDWARE PREDICTOR FOR CORE-TO-CORE DATA TRANSFER OPTIMIZATION 审中-公开
公开(公告)号：US20190102303A1
公开(公告)日：2019-04-04
申请号：US15721249
申请日：2017-09-29
申请人： Ren Wang , Joseph Nuzman , Samantika S. Sury , Andrew J. Herdrich , Namakkal N. Venkatesan , Anil Vasudevan , Tsung-Yuan C. Tai , Niall D. McDonnell
发明人： Ren Wang , Joseph Nuzman , Samantika S. Sury , Andrew J. Herdrich , Namakkal N. Venkatesan , Anil Vasudevan , Tsung-Yuan C. Tai , Niall D. McDonnell
IPC分类号： G06F12/0831 , G06F12/084 , G06F12/0811
摘要： Apparatus, method, and system for implementing a software-transparent hardware predictor for core-to-core data communication optimization are described herein. An embodiment of the apparatus includes a plurality of hardware processor cores each including a private cache; a shared cache that is communicatively coupled to and shared by the plurality of hardware processor cores; and a predictor circuit. The predictor circuit is to track activities relating to a plurality of monitored cache lines in the private cache of a producer hardware processor core (producer core) and to enable a cache line push operation upon determining a target hardware processor core (target core) based on the tracked activities. An execution of the cache line push operation is to cause a plurality of unmonitored cache lines in the private cache of the producer core to be moved to the private cache of the target core.

62. 发明申请

US20180373632A1 APPARATUS AND METHOD FOR TRIGGERED PREFETCHING TO IMPROVE I/O AND PRODUCER-CONSUMER WORKLOAD EFFICIENCY 审中-公开
公开(公告)号：US20180373632A1
公开(公告)日：2018-12-27
申请号：US16056315
申请日：2018-08-06
申请人： Christopher WILKERSON , Ren WANG , Antoine KAUFMANN , Anil VASUDEVAN , Robert G. BLANKENSHIP , Venkata KRISHNAN , Tsung-Yuan C. Tai
发明人： Christopher WILKERSON , Ren WANG , Antoine KAUFMANN , Anil VASUDEVAN , Robert G. BLANKENSHIP , Venkata KRISHNAN , Tsung-Yuan C. Tai
IPC分类号： G06F12/0808 , G06F12/0891 , G06F12/0862
摘要： An apparatus and method are described for a triggered prefetch operation. For example, one embodiment of a processor comprises: a first core comprising a first cache to store a first set of cache lines; a second core comprising a second cache to store a second set of cache lines; a cache management circuit to maintain coherency between one or more cache lines in the first cache and the second cache, the cache management circuit to allocate a lock on a first cache line to the first cache; a prefetch circuit comprising a prefetch request buffer to store a plurality of prefetch request entries including a first prefetch request entry associated with the first cache line, the prefetch circuit to cause the first cache line to be prefetched to the second cache in response to an invalidate command detected for the first cache line.

63. 发明申请

US20180205653A1 FLOW CLASSIFICATION APPARATUS, METHODS, AND SYSTEMS 审中-公开
公开(公告)号：US20180205653A1
公开(公告)日：2018-07-19
申请号：US15638102
申请日：2017-06-29
申请人： Ren Wang , Tsung-Yuan C. Tai , Yipeng Wang , Sameh Gobriel
发明人： Ren Wang , Tsung-Yuan C. Tai , Yipeng Wang , Sameh Gobriel
IPC分类号： H04L12/743 , H04L12/741 , H04L29/12
CPC分类号： H04L45/7453 , H04L45/02 , H04L45/745 , H04L47/2441 , H04L61/10 , H04L61/2046
摘要： Apparatus, methods, and systems for tuple space search-based flow classification using cuckoo hash tables and unmasked packet headers are described herein. A device can communicate with one or more hardware switches. The device can include memory to store hash table entries of a hash table. The device can include processing circuitry to perform a hash lookup in the hash table. The lookup can be based on an unmasked key include in a packet header corresponding to a received data packet. The processing circuitry can retrieve an index pointing to a sub-table, the sub-table including a set of rules for handling the data packet. Other embodiments are also described.

64. 发明申请

US20150067259A1 MANAGING SHARED CACHE BY MULTI-CORE PROCESSOR 有权
标题翻译：通过多核处理器管理共享缓存
公开(公告)号：US20150067259A1
公开(公告)日：2015-03-05
申请号：US14013220
申请日：2013-08-29
申请人： Ren Wang , Kevin B. Theobald , Zeshan A. Chishti , Zhaojuan Bian , Aamer Jaleel , Tsung-Yuan C. Tai
发明人： Ren Wang , Kevin B. Theobald , Zeshan A. Chishti , Zhaojuan Bian , Aamer Jaleel , Tsung-Yuan C. Tai
IPC分类号： G06F12/08
CPC分类号： G06F12/0811 , G06F12/0895 , G06F2212/1028 , G06F2212/601 , Y02D10/13
摘要： Systems and methods for managing shared cache by multi-core processor. An example processing system comprises: a plurality of processing cores, each processing core communicatively coupled to a last level cache (LLC) slice; and a cache control logic coupled to the plurality of processing cores, the cache control logic configured to perform one of: making an LLC slice of an inactive processing core available to an active processing core or power gating the LLC slice, based on estimating cache requirements by active processing cores.
摘要翻译：通过多核处理器管理共享缓存的系统和方法。一个示例处理系统包括：多个处理核心，每个处理核心通信地耦合到最后一级高速缓存（LLC）片; 以及耦合到所述多个处理核心的高速缓存控制逻辑，所述高速缓存控制逻辑被配置为执行下列之一：基于估计高速缓存需求，使非活动处理核心的LLC片可用于活动处理核心或门控所述LLC片段通过主动处理核心。

65. 发明授权

US09602471B2 Device introduction and access control framework 有权
公开(公告)号：US09602471B2
公开(公告)日：2017-03-21
申请号：US13430320
申请日：2012-03-26
申请人： Victor B. Lortz , Jesse R. Walker , Shriharsha S. Hegde , Amol A. Kulkarni , Tsung-Yuan C. Tai
发明人： Victor B. Lortz , Jesse R. Walker , Shriharsha S. Hegde , Amol A. Kulkarni , Tsung-Yuan C. Tai
IPC分类号： H04L29/06 , G06F21/43 , H04W12/04
CPC分类号： H04L63/04 , G06F21/43 , G06F2221/2129 , H04L63/08 , H04L63/105 , H04L63/18 , H04W12/04
摘要： In an embodiment, a method includes registering applications and network services for notification of an out-of-band introduction, and using the out-of-band introduction to bootstrap secure in-band provisioning of credentials and policies that are used to control subsequent access and resource sharing on an in-band channel. In another embodiment, an apparatus implements the method.

66. 发明申请

US20120185696A1 DEVICE INTRODUCTION AND ACCESS CONTROL FRAMEWORK 审中-公开
标题翻译：设备引言和访问控制框架
公开(公告)号：US20120185696A1
公开(公告)日：2012-07-19
申请号：US13430320
申请日：2012-03-26
申请人： Victor B. Lortz , Jesse R. Walker , Shriharsha S. Hegde , Amol A. Kulkarni , Tsung-Yuan C. Tai
发明人： Victor B. Lortz , Jesse R. Walker , Shriharsha S. Hegde , Amol A. Kulkarni , Tsung-Yuan C. Tai
IPC分类号： H04L9/00 , H04L9/32 , G06F21/20
CPC分类号： H04L63/04 , G06F21/43 , G06F2221/2129 , H04L63/08 , H04L63/105 , H04L63/18 , H04W12/04
摘要： In an embodiment, a method includes registering applications and network services for notification of an out-of-band introduction, and using the out-of-band introduction to bootstrap secure in-band provisioning of credentials and policies that are used to control subsequent access and resource sharing on an in-band channel. In another embodiment, an apparatus implements the method.
摘要翻译：在一个实施例中，一种方法包括注册应用和网络服务以通知带外介绍，并且使用带外介绍引导用于控制后续访问的凭证和策略的安全带内供应和带内频道的资源共享。在另一个实施例中，一种装置实现该方法。

67. 发明授权

US06795438B1 Method and apparatus for extending point-to-point/asynchronous transfer mode services to client computer systems 失效
标题翻译：将点对点/异步传输模式服务扩展到客户端计算机系统的方法和装置
公开(公告)号：US06795438B1
公开(公告)日：2004-09-21
申请号：US09182585
申请日：1998-10-28
申请人： Tsung-Yuan C. Tai , David B. Andersen , Charles L. Brabenac , Kevin C. Kahn
发明人： Tsung-Yuan C. Tai , David B. Andersen , Charles L. Brabenac , Kevin C. Kahn
IPC分类号： H04L1256
CPC分类号： H04L12/2801
摘要： A method for managing an asynchronous transfer mode (ATM) cell includes transmitting an ATM cell from a server system to a broadband modem. The ATM cell is forwarded from the broadband modem to a client system.
摘要翻译：一种用于管理异步传输模式（ATM）小区的方法包括将ATM信元从服务器系统发送到宽带调制解调器。 ATM信元从宽带调制解调器转发到客户端系统。

68. 发明授权

US06690647B1 Method and apparatus for characterizing network traffic 失效
标题翻译：表征网络流量的方法和装置
公开(公告)号：US06690647B1
公开(公告)日：2004-02-10
申请号：US09020207
申请日：1998-02-06
申请人： Puqi P. Tang , Tsung-Yuan C. Tai
发明人： Puqi P. Tang , Tsung-Yuan C. Tai
IPC分类号： H04J316
CPC分类号： H04L47/724 , H04L47/11 , H04L47/70
摘要： A method and apparatus are presented that may dynamically characterize network traffic so that a user application can reserve appropriate network resources for submitting traffic to a network. According to one embodiment, at least one value characterizing the traffic is generated and transmitted to the network. This value can be dynamically updated to ensure that an appropriate amount of network resources is reserved. Using this method and apparatus, the risk of either over-subscribing network resources or failing to reserve enough resources to provide necessary quality of service (QoS) may be eliminated.
摘要翻译：提出了可以动态地表征网络流量的方法和装置，使得用户应用可以预留用于向网络提交流量的适当的网络资源。根据一个实施例，生成表征业务的至少一个值并将其发送到网络。可以动态更新此值，以确保保留适当数量的网络资源。使用这种方法和装置，可以消除过度订阅网络资源或未能保留足够的资源以提供必要的服务质量（QoS）的风险。

69. 发明申请

US20160182684A1 PARALLEL PROCESSING OF SERVICE FUNCTIONS IN SERVICE FUNCTION CHAINS 有权
标题翻译：服务功能链中服务功能的并行处理
公开(公告)号：US20160182684A1
公开(公告)日：2016-06-23
申请号：US14580826
申请日：2014-12-23
申请人： Patrick Connor , Ira Weiny , Iosif Gasparakis , Alexander W. Min , Andrew J. Herdrich , Dinesh Kumar , Tsung-Yuan C. Tai , Brian J. Skerry
发明人： Patrick Connor , Ira Weiny , Iosif Gasparakis , Alexander W. Min , Andrew J. Herdrich , Dinesh Kumar , Tsung-Yuan C. Tai , Brian J. Skerry
IPC分类号： H04L29/06
CPC分类号： G06F9/45558 , G06F2009/45595
摘要： Technologies for identifying service functions that may be performed in parallel in a service function chain include a computing device for running one or more virtual machines for each of a plurality of service functions based on a preferred service function chain being selected. To identify which service functions may be performed in parallel, the computing device may determine which service functions are not required to be performed on a critical path of the service function chain and/or which service functions are not required to be performed in real-time. Additionally, selecting the preferred service function chain may be based on selection criteria.
摘要翻译：用于识别可以在服务功能链中并行执行的服务功能的技术包括用于基于所选择的优选服务功能链为多个服务功能中的每一个运行一个或多个虚拟机的计算设备。为了识别可以并行执行哪些服务功能，计算设备可以确定不需要在服务功能链的关键路径上执行哪些服务功能和/或不需要实时执行哪些服务功能。此外，选择优选服务功能链可以基于选择标准。

70. 发明授权

US08612780B2 Method and apparatus for modifying power management configuration of a computer to accommodate a packet processing latency policy associated with a pattern 有权
标题翻译：用于修改计算机的电源管理配置以适应与模式相关联的分组处理等待时间策略的方法和装置
公开(公告)号：US08612780B2
公开(公告)日：2013-12-17
申请号：US12882956
申请日：2010-09-15
申请人： Chih-Fan Hsin , Shian Tsai, Jr. , Tsung-Yuan C. Tai
发明人： Chih-Fan Hsin , Shian Tsai, Jr. , Tsung-Yuan C. Tai
IPC分类号： G06F1/00
CPC分类号： H04L12/12 , H04L41/0833 , Y02D50/40 , Y02D50/42
摘要： An embodiment may include network controller circuitry that may be comprised, at least in part, in a host computer. The circuitry may determine, at least in part, based at least in part upon at least one comparison, whether at least one power management action is to be initiated. The at least one comparison may compare, at least in part, at least one pattern with at least one portion of at least one packet received, at least in part, by the host computer. The at least one power management action may include the modification, at least in part, of at least one power management configuration of the host computer. The modification may accommodate, at least in part, at least one packet processing latency policy associated, at least in part, with the at least one pattern. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
摘要翻译：一个实施例可以包括网络控制器电路，其可以至少部分地包括在主计算机中。该电路至少部分地至少部分地基于至少一个比较来确定是否启动至少一个电力管理动作。至少一个比较可以至少部分地将至少一个模式与至少一个分组的至少一部分至少部分地由主计算机接收。至少一个电源管理动作可以包括至少部分地修改主计算机的至少一个电源管理配置。该修改可以至少部分地适应至少部分地与至少一个模式相关联的至少一个分组处理等待时间策略。当然，在不偏离本实施例的情况下，可以进行许多替代，变化和修改。

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