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61. 发明授权

US06457092B1 Semiconductor disk storage apparatus including a plurality of flash memories and a buffer memory to continuously write data responsive to first and second write commands 有权
标题翻译：包括多个闪速存储器的半导体磁盘存储装置和缓冲存储器，用于响应于第一和第二写入命令连续写入数据
公开(公告)号：US06457092B1
公开(公告)日：2002-09-24
申请号：US09706843
申请日：2000-11-07
申请人： Kenichi Kaki , Kunihiro Katayama , Takashi Tsunehiro
发明人： Kenichi Kaki , Kunihiro Katayama , Takashi Tsunehiro
IPC分类号： G06F1300
CPC分类号： G06F3/0601 , G06F3/061 , G06F3/0611 , G06F3/0613 , G06F3/064 , G06F3/0656 , G06F3/0659 , G06F3/0679 , G06F3/0688 , G06F2003/0694 , G11C16/102 , G11C16/32
摘要： A semiconductor disk storage apparatus is coupled with a system bus for receiving a write request accompanied with first and second blocks of data through the system bus. A plurality of nonvolatile flash semiconductor memories store the first and second blocks of data therein. A buffer memory holds the first and second blocks of data as write data to be written into the flash memories. A control means carries out read operations of the write data from the buffer memory and write operations of the write data read out from the buffer memory into the flash memories, responsive to the write request. The control means responsive to the write request, sends a first write command to write the first block of data into one of the flash memories and a second write command to write the second block of data into a different flash memory.
摘要翻译：半导体盘存储装置与系统总线耦合，用于通过系统总线接收伴随着第一和第二数据块的写入请求。多个非易失性闪存半导体存储器中存储第一和第二数据块。缓冲存储器将第一和第二数据块作为写入数据写入闪存。控制装置响应写入请求，执行来自缓冲存储器的写入数据的读取操作和从缓冲存储器读出的写入数据到闪存中的写入操作。响应于写请求的控制装置发送第一写入命令以将第一数据块写入闪速存储器之一，以及第二写入命令将第二数据块写入不同的闪速存储器。

62. 发明授权

US6130837A Storage device employing a flash memory 失效
标题翻译：采用闪存的存储设备
公开(公告)号：US6130837A
公开(公告)日：2000-10-10
申请号：US782344
申请日：1997-01-13
申请人： Hajime Yamagami , Kouichi Terada , Yoshihiro Hayashi , Takashi Tsunehiro , Kunihiro Katayama , Kenichi Kaki , Takeshi Furuno
发明人： Hajime Yamagami , Kouichi Terada , Yoshihiro Hayashi , Takashi Tsunehiro , Kunihiro Katayama , Kenichi Kaki , Takeshi Furuno
IPC分类号： G06F3/06 , G11C16/10 , G11C29/00 , G11C17/00
CPC分类号： G11C29/765 , G06F3/0601 , G06F3/0616 , G06F3/0659 , G06F3/0679 , G11C16/102 , G06F2003/0694 , G06F2212/2022 , G06F3/0664
摘要： A semiconductor disk wherein a flash memory into which data is rewritten in block units is employed as a storage medium, said a semiconductor disk comprises a data memory in which file data are stored, a substitutive memory which substitutes for blocks of errors in the data memory, an error memory in which error information of the data memory are stored, and a memory controller which reads data out of, writes data into and erases data from the data memory, the substitutive memory and the error memory. Since the write errors of the flash memory can be remedied, the service life of the semiconductor disk can be increased.
摘要翻译：其中以块为单位重写数据的闪速存储器的半导体盘被用作存储介质，所述半导体盘包括存储文件数据的数据存储器，代替数据存储器中的错误块的替换存储器，存储有数据存储器的错误信息的错误存储器，以及从数据存储器，替代存储器和错误存储器读取数据并将数据写入数据存储器，替换存储器和错误存储器中的数据的存储器控制器。由于可以补救闪速存储器的写入错误，所以可以提高半导体盘的使用寿命。

63. 发明授权

US5530673A Flash memory control method and information processing system therewith 失效
标题翻译：闪存控制方法和信息处理系统
公开(公告)号：US5530673A
公开(公告)日：1996-06-25
申请号：US225313
申请日：1994-04-08
申请人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
发明人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
IPC分类号： G06F3/06 , G06F11/14 , G06F12/08 , G11C29/00 , G11C16/06 , G06F12/16
CPC分类号： G11C29/765 , G06F11/1433 , G06F11/1441 , G06F12/08 , G06F12/0802 , G06F12/0866 , G06F3/0601 , G06F3/0613 , G06F3/0616 , G06F3/064 , G06F3/0644 , G06F3/0656 , G06F3/0679 , G06F3/068 , G11C29/789 , G11C29/82 , G06F2003/0694 , G06F2212/2022 , G06F2212/312
摘要： A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data. The controller comprises control means for determining a physical sector address forming predetermined high-order bits of the physical address when data is output from the first nonvolatile memory or when data is input to the volatile memory, means for storing the determined physical sector address, and means for consecutively generating addresses in a sector determined by the physical sector address.
摘要翻译：当闪存用作信息处理系统中的半导体盘或主存储器时的控制方法和系统。半导体文件系统包括电可擦除的第一非易失性存储器，不电可擦除的第二非易失性存储器，易失性存储器，控制存储器的控制器和控制控制器的控制部分，其中对应于由访问一个外部系统。第一非易失性存储器存储用于执行操作的外部系统的数据，指示存储数据的物理地址与逻辑地址之间的对应关系的第一管理信息，以及指示第一非易失性存储器的状态的第二管理信息。第二非易失性存储器预先存储从外部系统输入和输出数据所需的接口信息以及数据的只读数据。控制器包括控制装置，用于当数据从第一非易失性存储器输出时或当数据被输入到易失性存储器时，确定形成物理地址的预定高位的物理扇区地址，存储确定的物理扇区地址的装置，以及用于连续地产生由物理扇区地址确定的扇区中的地址的装置。

64. 发明授权

US06978328B1 Bus system, memory system, printed circuit board and directional coupler 失效
标题翻译：总线系统，存储系统，印刷电路板和定向耦合器
公开(公告)号：US06978328B1
公开(公告)日：2005-12-20
申请号：US09570349
申请日：2000-05-12
申请人： Hideki Osaka , Takashi Tsunehiro , Koichi Kimura , Susumu Hatano , Kazuya Ito , Toshio Sugano , Toyohiko Komatsu
发明人： Hideki Osaka , Takashi Tsunehiro , Koichi Kimura , Susumu Hatano , Kazuya Ito , Toshio Sugano , Toyohiko Komatsu
IPC分类号： G06F3/00 , G06F1/00 , G06F12/00 , G06F13/16 , H01P5/00 , H01P5/18 , H05K1/00 , H05K1/02 , H05K1/14
CPC分类号： H05K1/0246 , H05K1/0228 , H05K1/0298 , H05K1/14 , H05K2201/044 , H05K2201/09236 , H05K2201/09627 , H05K2201/10022
摘要： A bus system for carrying out data transfer between one bus master and a plurality of bus slaves. The bus system includes plural directional couplers which are formed by arranging respective parts of lines drawn from the bus slaves, without being in contact with, in the neighborhood of, and in parallel with a line drawn from the bus master. The line drawn from the bus master to a terminating resistance is wired to be folded. The directional couplers are further formed by arranging parts of the lines drawn from the bus slaves alternatively with respect to a first line part of the line drawn from the bus master ranging from the bus master to a fold of the line drawn from the bus master and with respect to a second line part of the line drawn from the bus master ranging from the fold to the terminating resistance.
摘要翻译：一种用于在一个总线主机和多个总线从站之间执行数据传输的总线系统。总线系统包括多个定向耦合器，其通过布置从总线从站引出的线的相应部分而形成，而不与从总线主控板引出的线相邻并且平行。从总线主站到终端电阻的线被布线以折叠。定向耦合器还通过将从总线主机引出的线路的一部分相对于从总线主机从总线主机抽出的线的第一线部分交替地排列成从总线主机引出的线的一部分，相对于从总线主线抽出的从折叠到终止电阻的线的第二线部分。

65. 发明授权

US06438012B1 Directional coupling memory module 有权
标题翻译：定向耦合存储器模块
公开(公告)号：US06438012B1
公开(公告)日：2002-08-20
申请号：US09569876
申请日：2000-05-12
申请人： Hideki Osaka , Toyohiko Komatsu , Takashi Tsunehiro , Koichi Kimura , Susumu Hatano , Kazuya Ito , Toshio Sugano
发明人： Hideki Osaka , Toyohiko Komatsu , Takashi Tsunehiro , Koichi Kimura , Susumu Hatano , Kazuya Ito , Toshio Sugano
IPC分类号： G11C800
CPC分类号： G11C5/063 , G11C5/04
摘要： Conventionally, wiring length occupied by a directional coupler decides intervals between modules connected to a bus, and those intervals can not be shortened furthermore. Accordingly, the intervals between modules are wide and high-density mounting is not possible. In the present invention, a directional coupler in a memory bus is formed by a leader line from a controller and a leader line from a memory chip and contained within a memory module. Accordingly, pitch between the modules can be reduced and high-density mounting can be realized.
摘要翻译：常规地，由定向耦合器占用的布线长度决定了连接到总线的模块之间的间隔，并且这些间隔不能进一步缩短。因此，模块之间的间隔宽，并且高密度安装是不可能的。在本发明中，存储器总线中的定向耦合器由来自控制器的引线和来自存储器芯片的引出线形成并且包含在存储器模块中。因此，可以减少模块之间的间距并实现高密度的安装。

66. 发明授权

US06654270B2 Directional coupling memory module 失效
公开(公告)号：US06654270B2
公开(公告)日：2003-11-25
申请号：US10191112
申请日：2002-07-10
申请人： Hideki Osaka , Toyohiko Komatsu , Takashi Tsunehiro , Koichi Kimura , Susumu Hatano , Kazuya Ito , Toshio Sugano
发明人： Hideki Osaka , Toyohiko Komatsu , Takashi Tsunehiro , Koichi Kimura , Susumu Hatano , Kazuya Ito , Toshio Sugano
IPC分类号： G11C502
CPC分类号： G11C5/063 , G11C5/04
摘要： Conventionally, wiring length occupied by a directional coupler decides intervals between modules connected to a bus, and those intervals can not be shortened furthermore. Accordingly, the intervals between modules are wide and high-density mounting is not possible. In the present invention, a directional coupler in a memory bus is formed by a leader line from a controller and a leader line from a memory chip and contained within a memory module. Accordingly, pitch between the modules can be reduced and high-density mounting can be realized.

67. 发明授权

US09299455B2 Semiconductor storage device having nonvolatile semiconductor memory 有权
标题翻译：具有非易失性半导体存储器的半导体存储装置
公开(公告)号：US09299455B2
公开(公告)日：2016-03-29
申请号：US13500057
申请日：2012-03-06
申请人： Akifumi Suzuki , Takashi Tsunehiro
发明人： Akifumi Suzuki , Takashi Tsunehiro
IPC分类号： G11C29/02 , G11C16/34 , G11C16/00
CPC分类号： G06F3/0616 , G06F3/0629 , G06F3/0679 , G11C16/00 , G11C16/3431 , G11C16/3495 , G11C29/021 , G11C29/028
摘要： A semiconductor storage device has a nonvolatile semiconductor memory comprised from multiple storage areas, and a controller, which is coupled to the nonvolatile semiconductor memory. The controller (A) identifies a storage area state, which is the state of a storage area, (B) decides, based on the storage area state identified in the (A), a read parameter, which is a parameter for use when reading data from a storage area with respect to a storage area of this storage area state, and (C) uses the read parameter decided in the (B) with respect to a read-target storage area and reads data from this read-target storage area.
摘要翻译：半导体存储装置具有由多个存储区域构成的非易失性半导体存储器和耦合到非易失性半导体存储器的控制器。控制器（A）识别作为存储区域的状态的存储区域状态，（B）基于（A）中识别的存储区域状态来决定作为读取时使用的参数的读取参数来自相对于该存储区域状态的存储区域的存储区域的数据，（C）使用关于读取目标存储区域的（B）中所决定的读取参数，并从该读取对象存储区域读取数据。

68. 发明申请

US20130238836A1 SEMICONDUCTOR STORAGE DEVICE HAVING NONVOLATILE SEMICONDUCTOR MEMORY 有权
标题翻译：具有非线性半导体存储器的半导体存储器件
公开(公告)号：US20130238836A1
公开(公告)日：2013-09-12
申请号：US13500057
申请日：2012-03-06
申请人： Akifumi Suzuki , Takashi Tsunehiro
发明人： Akifumi Suzuki , Takashi Tsunehiro
IPC分类号： G06F12/00
CPC分类号： G06F3/0616 , G06F3/0629 , G06F3/0679 , G11C16/00 , G11C16/3431 , G11C16/3495 , G11C29/021 , G11C29/028
摘要： A semiconductor storage device has a nonvolatile semiconductor memory comprised from multiple storage areas, and a controller, which is coupled to the nonvolatile semiconductor memory. The controller (A) identifies a storage area state, which is the state of a storage area, (B) decides, based on the storage area state identified in the (A), a read parameter, which is a parameter for use when reading data from a storage area with respect to a storage area of this storage area state, and (C) uses the read parameter decided in the (B) with respect to a read-target storage area and reads data from this read-target storage area.
摘要翻译：半导体存储装置具有由多个存储区域构成的非易失性半导体存储器，以及耦合到非易失性半导体存储器的控制器。控制器（A）识别作为存储区域的状态的存储区域状态，（B）基于（A）中识别的存储区域状态来决定作为读取时使用的参数的读取参数来自相对于该存储区域状态的存储区域的存储区域的数据，（C）使用关于读取目标存储区域的（B）中所决定的读取参数，并从该读取对象存储区域读取数据。

69. 发明授权

US08041787B2 Application software and data management method, management system, and thin client terminal, management server and remote computer used therefor 失效
标题翻译：应用软件和数据管理方法，管理系统和瘦客户机终端，管理服务器和使用的远程计算机
公开(公告)号：US08041787B2
公开(公告)日：2011-10-18
申请号：US12010967
申请日：2008-01-31
申请人： Hiromi Isokawa , Takashi Tsunehiro
发明人： Hiromi Isokawa , Takashi Tsunehiro
IPC分类号： G06F15/177 , G06F15/16 , G06F15/173
CPC分类号： H04L63/10 , H04L67/38
摘要： A thin client terminal that can perform information processing in an off-line state is provided. A thin client terminal 101a sends a request for registration of data to be used off-line and designation of application software to be used off-line to a management server 107 through a remote computer 104. The management server 107 registers the data and application software according to the request. The thin client terminal 101 requests the management server 107 to acquire the requested data and application software, receives the data and application software, and stores the received data and application software into a storage medium 110.
摘要翻译：提供了可以在离线状态执行信息处理的瘦客户机终端。瘦客户机终端101a向远程计算机104发送要离线使用的数据的注册请求和离线使用的应用软件的指定给管理服务器107.管理服务器107登记数据和应用软件根据要求瘦客户机终端101请求管理服务器107获取所请求的数据和应用软件，接收数据和应用软件，并将接收到的数据和应用软件存储到存储介质110中。

70. 发明申请

US20070073729A1 Computer system 失效
标题翻译：电脑系统
公开(公告)号：US20070073729A1
公开(公告)日：2007-03-29
申请号：US11502600
申请日：2006-08-11
申请人： Takashi Tsunehiro , Satoshi Kikuchi , Shinji Kimura , Takatoshi Kato
发明人： Takashi Tsunehiro , Satoshi Kikuchi , Shinji Kimura , Takatoshi Kato
IPC分类号： G06F17/30
CPC分类号： H04L41/00
摘要： A invented computer system has a plurality of computer boards; a plurality of terminals, each of which is coupled to each of the computer boards respectively via a network; a storage device having a plurality of storage areas, which is coupled to each of the computer boards; and a management computer; and wherein the management computer manages a correspondence between a user information and the storage area, and when a use request of the computer board is transmitted from a terminal, the management computer selects a usable computer board to turn on a power, reads information necessary to start the computer board from the storage corresponding to the transmitted user information, allows the computer board to start based on the read information, and notifies the terminal of information on the started computer board and identification information on the network allocated to the started computer board.
摘要翻译：本发明的计算机系统具有多个计算机板; 多个终端，每个终端分别经由网络耦合到每个计算机板; 具有多个存储区域的存储装置，其耦合到每个所述计算机板; 和管理电脑; 并且其中所述管理计算机管理用户信息与所述存储区域之间的对应关系，并且当从终端发送所述计算机板的使用请求时，所述管理计算机选择可用的计算机板来接通电力，读取所需的信息从与所发送的用户信息相对应的存储器启动计算机板，允许基于读取信息启动计算机板，并且向终端通知已启动的计算机板上的信息和分配给启动的计算机板的网络上的识别信息。

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