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61. 发明申请

US20080296763A1 Multi-Die Wafer Level Packaging 有权
标题翻译：多芯片晶圆级封装
公开(公告)号：US20080296763A1
公开(公告)日：2008-12-04
申请号：US11756347
申请日：2007-05-31
申请人： Chen-Shien Chen , Kai-Ming Ching , Chih-Hua Chen , Chen-Cheng Kuo
发明人： Chen-Shien Chen , Kai-Ming Ching , Chih-Hua Chen , Chen-Cheng Kuo
IPC分类号： H01L23/488
CPC分类号： H01L25/0657 , H01L21/563 , H01L21/6835 , H01L21/76898 , H01L24/02 , H01L24/11 , H01L24/16 , H01L24/48 , H01L24/73 , H01L25/50 , H01L2221/6834 , H01L2221/68381 , H01L2224/0401 , H01L2224/04073 , H01L2224/13147 , H01L2224/16145 , H01L2224/16225 , H01L2224/2518 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/451 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/83102 , H01L2224/83855 , H01L2224/92125 , H01L2225/0651 , H01L2225/06524 , H01L2225/06541 , H01L2225/06572 , H01L2924/00014 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01016 , H01L2924/01022 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/14 , H01L2924/15311 , H01L2924/15788 , H01L2924/19041 , H01L2924/19043 , H01L2924/351 , H01L2924/0665 , H01L2924/00 , H01L2224/48145 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599
摘要： A semiconductor die package is provided. The semiconductor die package includes a plurality of dies arranged in a stacked configuration. Through-silicon vias are formed in the lower or intermediate dies to allow electrical connections to dies stacked above. The lower die is positioned face up and has redistribution lines electrically coupling underlying semiconductor components to the through-silicon vias. The dies stacked above the lower die may be oriented face up such that the contact pads are facing away from the lower die or flipped such that the contact pads are facing the lower die. The stacked dies may be electrically coupled to the redistribution lines via wire bonding or solder balls. Additionally, the lower die may have another set of redistribution lines on an opposing side from the stacked dies to reroute the vias to a different pin-out configuration.
摘要翻译：提供半导体管芯封装。半导体管芯封装包括以堆叠构造布置的多个管芯。在下部或中间模具中形成通孔，以允许电连接到上面堆叠的管芯。下模具面向上放置并具有将下面的半导体部件电耦合到通硅通孔的再分配线。堆叠在下模具上方的模具可以朝上取向，使得接触焊盘背离下模或翻转，使得接触焊盘面向下模。堆叠的管芯可以通过引线接合或焊球电耦合到再分配线。此外，下模具可以在与堆叠的管芯相对的一侧上具有另一组重新分布线，以将通孔重新路由到不同的引脚配置。

62. 发明授权

US08227902B2 Structures for preventing cross-talk between through-silicon vias and integrated circuits 有权
标题翻译：用于防止硅通孔和集成电路之间串扰的结构
公开(公告)号：US08227902B2
公开(公告)日：2012-07-24
申请号：US11945022
申请日：2007-11-26
申请人： Chen-Cheng Kuo
发明人： Chen-Cheng Kuo
IPC分类号： H01L23/552
CPC分类号： H01L25/0657 , H01L23/481 , H01L23/552 , H01L23/562 , H01L23/585 , H01L23/66 , H01L2223/6688 , H01L2224/16 , H01L2225/06513 , H01L2225/06541
摘要： A semiconductor chip includes a through-silicon via (TSV), a device region, and a cross-talk prevention ring encircling one of the device region and the TSV. The TSV is isolated from substantially all device regions comprising active devices by the cross-talk prevention ring.
摘要翻译：一种半导体芯片包括环形通孔（TSV），器件区域和环绕该器件区域和TSV之一的串扰防止环。 TSV通过串扰防止环从基本上包括有源设备的所有设备区域隔离。

63. 发明授权

US07973413B2 Through-substrate via for semiconductor device 有权
标题翻译：用于半导体器件的通孔基板通孔
公开(公告)号：US07973413B2
公开(公告)日：2011-07-05
申请号：US11844650
申请日：2007-08-24
申请人： Chen-Cheng Kuo , Chen Chen-Shien , Kai-Ming Ching , Chih-Hua Chen
发明人： Chen-Cheng Kuo , Chen Chen-Shien , Kai-Ming Ching , Chih-Hua Chen
IPC分类号： H01L23/52
CPC分类号： H01L21/76898 , H01L23/481 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device including a substrate having a front surface and a back surface is provided. A plurality of interconnect layers are formed on the front surface and have a first surface opposite the front surface of the substrate. A tapered profile via extends from the first surface of the plurality of interconnect layers to the back surface of the substrate. In one embodiment, a insulating layer is formed on the substrate and includes an opening, and wherein the opening includes conductive material providing contact to the tapered profile via.
摘要翻译：提供了包括具有前表面和后表面的基板的半导体器件。多个互连层形成在前表面上并具有与基板的前表面相对的第一表面。锥形轮廓通孔从多个互连层的第一表面延伸到基底的后表面。在一个实施例中，在衬底上形成绝缘层并且包括开口，并且其中开口包括提供与锥形轮廓通孔接触的导电材料。

64. 发明申请

US20060105292A1 Apparatus for dispensing dental solutions 失效
标题翻译：用于分配牙科解决方案的装置
公开(公告)号：US20060105292A1
公开(公告)日：2006-05-18
申请号：US10990136
申请日：2004-11-16
申请人： Denis Dorsey , Randall Cohen , Chen-Cheng Kuo
发明人： Denis Dorsey , Randall Cohen , Chen-Cheng Kuo
IPC分类号： A61C17/00
CPC分类号： B05C17/00593 , A61C3/005 , A61C5/62 , A61C19/06 , B05C17/00516
摘要： An apparatus for dispensing a dental solution is disclosed and includes a dispensing nozzle adapted for attachment to a syringe. The dispensing nozzle has a curved applicator tip with a securely mounted brush that extends beyond the applicator tip to aid in placement of the dental solution. A retainer hub is positioned in the dispensing nozzle to prevent the brush from retracting into or being expelled from the dispensing nozzle during use.
摘要翻译：公开了一种用于分配牙齿溶液的装置，并且包括适于附接到注射器的分配喷嘴。分配喷嘴具有弯曲的施加器尖端，其具有延伸超过施用器尖端的牢固安装的刷子，以有助于牙科溶液的放置。保持器毂位于分配喷嘴中，以防止刷子在使用期间从分配喷嘴收回或从其中排出。

65. 发明授权

US6021921A Liquid dispensing system and method for dispensing 失效
标题翻译：液体分配系统和分配方法
公开(公告)号：US6021921A
公开(公告)日：2000-02-08
申请号：US957913
申请日：1997-10-27
申请人： Ho-Ku Lan , Chen-Cheng Kuo , Hung-Chih Chen , Shih-Shiung Chen
发明人： Ho-Ku Lan , Chen-Cheng Kuo , Hung-Chih Chen , Shih-Shiung Chen
IPC分类号： B67D7/02 , B67D7/78 , B67D5/08
CPC分类号： B67D7/0238 , B67D7/0261 , B67D7/78 , Y10T137/3109 , Y10T137/3127
摘要： The present invention discloses a liquid dispensing system and a method for dispensing liquid that includes two hermetically sealed tanks each having a liquid container with a conduit pipe connecting the two containers. A differential pressure exists between the two tanks such that a process liquid can be fed from the second container into a dispensing nozzle under the differential pressure and the gravity of the liquid without the need of a pumping system. The problems of gel formation normally observed in conventional dispensing systems can be eliminated. A high viscosity, short shelf life liquid can be most suitably dispensed by the present invention novel dispensing system and method.
摘要翻译：本发明公开了一种液体分配系统和分配液体的方法，该液体包括两个气密密封的罐，每个液体容器具有连接两个容器的导管的液体容器。在两个罐之间存在差压，使得处理液体可以在压差和液体的重力下从第二容器进入分配喷嘴，而不需要泵送系统。可以消除在常规分配系统中通常观察到的凝胶形成的问题。通过本发明新颖的分配系统和方法可以最适当地分配高粘度，短的保质期液体。

66. 发明授权

US08456008B2 Structure and process for the formation of TSVs 有权
公开(公告)号：US08456008B2
公开(公告)日：2013-06-04
申请号：US13233626
申请日：2011-09-15
申请人： Chen-Cheng Kuo , Kai-Ming Ching , Chen Chen-Shien
发明人： Chen-Cheng Kuo , Kai-Ming Ching , Chen Chen-Shien
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L21/76898 , H01L23/481 , H01L24/11 , H01L24/12 , H01L2224/13009 , H01L2224/13099 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/81894 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01068 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/1461 , H01L2924/19041 , H01L2924/19043 , H01L2924/00
摘要： An integrated circuit structure includes a semiconductor substrate; an interconnect structure over the semiconductor substrate, wherein the interconnect structure comprises a top inter-metal dielectric (IMD); an opening penetrating the interconnect structure into the semiconductor substrate; a conductor in the opening; and an isolation layer having a vertical portion and a horizontal portion physically connected to each other. The vertical portion is on sidewalls of the opening. The horizontal portion is directly over the interconnect structure. The integrated circuit structure is free from passivation layers vertically between the top IMD and the horizontal portion of the isolation layer.

67. 发明申请

US20120001334A1 Structure and Process for the Formation of TSVs 有权
标题翻译： TSV形成的结构和过程
公开(公告)号：US20120001334A1
公开(公告)日：2012-01-05
申请号：US13233626
申请日：2011-09-15
申请人： Chen-Cheng Kuo , Kai-Ming Ching , Chen Chen-Shien
发明人： Chen-Cheng Kuo , Kai-Ming Ching , Chen Chen-Shien
IPC分类号： H01L23/538 , H01L23/532
CPC分类号： H01L21/76898 , H01L23/481 , H01L24/11 , H01L24/12 , H01L2224/13009 , H01L2224/13099 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/81894 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01068 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/1461 , H01L2924/19041 , H01L2924/19043 , H01L2924/00
摘要： An integrated circuit structure includes a semiconductor substrate; an interconnect structure over the semiconductor substrate, wherein the interconnect structure comprises a top inter-metal dielectric (IMD); an opening penetrating the interconnect structure into the semiconductor substrate; a conductor in the opening; and an isolation layer having a vertical portion and a horizontal portion physically connected to each other. The vertical portion is on sidewalls of the opening. The horizontal portion is directly over the interconnect structure. The integrated circuit structure is free from passivation layers vertically between the top IMD and the horizontal portion of the isolation layer.
摘要翻译：集成电路结构包括半导体衬底; 在所述半导体衬底上的互连结构，其中所述互连结构包括顶部金属间电介质（IMD）; 穿过所述互连结构进入所述半导体衬底的开口; 开幕式的指挥; 以及具有彼此物理连接的垂直部分和水平部分的隔离层。垂直部分位于开口的侧壁上。水平部分直接在互连结构上方。集成电路结构在顶部IMD和隔离层的水平部分之间垂直地没有钝化层。

68. 发明授权

US07843064B2 Structure and process for the formation of TSVs 有权
标题翻译： TSV形成的结构和过程
公开(公告)号：US07843064B2
公开(公告)日：2010-11-30
申请号：US12152381
申请日：2008-05-14
申请人： Chen-Cheng Kuo , Kai-Ming Ching , Chen Chen-Shien
发明人： Chen-Cheng Kuo , Kai-Ming Ching , Chen Chen-Shien
IPC分类号： H01L23/48
CPC分类号： H01L21/76898 , H01L23/481 , H01L24/11 , H01L24/12 , H01L2224/13009 , H01L2224/13099 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/81894 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01068 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/1461 , H01L2924/19041 , H01L2924/19043 , H01L2924/00
摘要： An integrated circuit structure includes a semiconductor substrate; an interconnect structure over the semiconductor substrate, wherein the interconnect structure comprises a top inter-metal dielectric (IMD); an opening penetrating the interconnect structure into the semiconductor substrate; a conductor in the opening; and an isolation layer having a vertical portion and a horizontal portion physically connected to each other. The vertical portion is on sidewalls of the opening. The horizontal portion is directly over the interconnect structure. The integrated circuit structure is free from passivation layers vertically between the top IMD and the horizontal portion of the isolation layer.
摘要翻译：集成电路结构包括半导体衬底; 在所述半导体衬底上的互连结构，其中所述互连结构包括顶部金属间电介质（IMD）; 穿过所述互连结构进入所述半导体衬底的开口; 开幕式的指挥; 以及具有彼此物理连接的垂直部分和水平部分的隔离层。垂直部分位于开口的侧壁上。水平部分直接在互连结构上方。集成电路结构在顶部IMD和隔离层的水平部分之间垂直地没有钝化层。

69. 发明申请

US20090057823A1 Semiconductor Structure with a Discontinuous Material Density for Reducing Eddy Currents 有权
标题翻译：具有不连续材料密度以减少涡流的半导体结构
公开(公告)号：US20090057823A1
公开(公告)日：2009-03-05
申请号：US11850647
申请日：2007-09-05
申请人： Kai Ming Ching , Chen Chen-Shien , Han-Hsiang Huang , Chih-Hua Chen , Chen-Cheng Kuo
发明人： Kai Ming Ching , Chen Chen-Shien , Han-Hsiang Huang , Chih-Hua Chen , Chen-Cheng Kuo
IPC分类号： H01L29/86
CPC分类号： H01L27/08 , H01L23/5227 , H01L28/10 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor structure includes an inductor; and a semiconductor substrate underlying the inductor, having a discontinuous material density across a plane underneath and in parallel with the inductor, thereby reducing eddy currents induced by an electrical current flowing through the inductor.
摘要翻译：半导体结构包括电感器; 以及位于电感器下方的半导体衬底，其具有在电感器下方并与电感平行的平面上的不连续材料密度，从而减少由流过电感器的电流引起的涡流。

70. 发明授权

US06183916B2 Method for proximity effect compensation on alternative phase-shift masks with bias and optical proximity correction 有权
标题翻译：用于具有偏置和光学邻近校正的替代相移掩模上的邻近效应补偿的方法
公开(公告)号：US06183916B2
公开(公告)日：2001-02-06
申请号：US09395283
申请日：1999-09-13
申请人： Chen-Cheng Kuo , Hua-Tai Lin , Chia-Hui Lin
发明人： Chen-Cheng Kuo , Hua-Tai Lin , Chia-Hui Lin
IPC分类号： G03F900
CPC分类号： G03F1/30 , G03F1/36
摘要： A method of forming an alternative phase shifting mask and forming a circuit pattern on a wafer using the mask are described. Optical proximity correction is added to a data file, in which a description of a circuit pattern has been stored, to obtain a first modified data file. The first modified data file is then separated into a second modified data file, for regions of the mask having dense line/space patterns, and a third modified data file, for regions of the mask having isolated line space patterns. Critical dimension bias is then added to the second modified data file forming a fourth modified data file. The third modified data file and the fourth modified data file are then merged into a single fifth modified data file. The fifth modified data file is then is then converted to an alternative phase shift data file. An alternative phase shift mask is then formed from the alternative phase shift data file. The alternative phase shift mask has then been corrected for optical proximity effect and critical dimension bias has been added. This alternative phase shift mask can then be used in forming the circuit pattern on an integrated circuit wafer.
摘要翻译：描述了使用掩模形成替代的相移掩模并在晶片上形成电路图案的方法。光学邻近校正被添加到已经存储电路图案的描述的数据文件中，以获得第一修改的数据文件。然后，对于具有密集线/空间图案的掩模区域和第三修改数据文件，第一修改数据文件被分成第二修改数据文件，对于具有隔离行空间图案的掩码区域，第二修改数据文件被分隔成第二修改数据文件。然后将关键尺寸偏差添加到形成第四修改数据文件的第二修改数据文件中。然后将第三修改数据文件和第四修改数据文件合并到单个第五修改数据文件中。然后将第五修改的数据文件转换成替代的相移数据文件。然后从替代相移数据文件形成替代的相移掩模。然后对于光学邻近效应校正了替代相移掩模，并且添加了临界尺寸偏差。然后可以将该替代的相移掩模用于形成集成电路晶片上的电路图案。

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