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61. 发明申请

US20050141320A1 Display 审中-公开
标题翻译：显示
公开(公告)号：US20050141320A1
公开(公告)日：2005-06-30
申请号：US11016802
申请日：2004-12-21
申请人： Michiru Senda
发明人： Michiru Senda
IPC分类号： G11C19/00 , G09G3/20 , G09G3/30 , G09G3/32 , G09G3/36 , G11C5/00
CPC分类号： G09G3/3266 , G09G3/3275 , G09G3/367 , G09G2300/08 , G09G2300/0842 , G09G2330/021 , G11C19/28
摘要： The present invention provides a display capable of suppressing increase of consumed electric current. The display includes a first conductive type first transistor whose source or drain is connected to a signal line provided with a signal switched between a first voltage and a second voltage, the first transistor being ON in response to a clock signal provided, and the source or drain of the first transistor being provided with a signal of the first voltage from the signal line during at least a period where the first transistor is ON in response to the clock signal, a first conductive type second transistor connected to the first voltage supply source side, and a first conductive type third transistor connected between the gate of the first transistor and the first voltage supply source to bring the first transistor to OFF state when the second transistor is in ON state.
摘要翻译：本发明提供能够抑制消耗电流增加的显示器。显示器包括第一导电型第一晶体管，其源极或漏极连接到信号线，该信号线具有在第一电压和第二电压之间切换的信号，第一晶体管响应于所提供的时钟信号而导通，在第一晶体管响应于时钟信号导通的至少一个周期期间，第一晶体管的漏极被提供有来自信号线的第一电压的信号，连接到第一电压源侧的第一导电类型的第二晶体管以及连接在第一晶体管的栅极和第一电压源之间的第一导电型第三晶体管，以在第二晶体管处于导通状态时使第一晶体管截止。

62. 发明授权

US08970463B2 Signal transmission apparatus and imaging display system 有权
标题翻译：信号传输装置和成像显示系统
公开(公告)号：US08970463B2
公开(公告)日：2015-03-03
申请号：US13468403
申请日：2012-05-10
申请人： Michiru Senda
发明人： Michiru Senda
IPC分类号： G09G3/36 , H04N5/374 , H04N5/32
CPC分类号： H04N5/374 , G09G3/20 , G09G2300/0426 , G09G2330/04 , G09G2330/06 , H04N5/32
摘要： A signal transmission apparatus including electrostatic discharge protection circuits arranged between a signal line and a wiring line of plural pixel wiring lines, each having a first transistor and a capacitor device; and a first control line connected to the electrostatic discharge protection circuits, wherein, in the electrostatic discharge protection circuit, a gate of the first transistor is connected to the first control line, one of a source and a drain in the first transistor is connected to one signal line and one terminal of the capacitor device as well as the other is connected to another wiring line, and the other terminal of the capacitor device is connected to the gate of the first transistor.
摘要翻译：一种信号传输装置，包括布置在多个像素布线的信号线和布线之间的静电放电保护电路，每个具有第一晶体管和电容器装置; 以及连接到所述静电放电保护电路的第一控制线，其中在所述静电放电保护电路中，所述第一晶体管的栅极连接到所述第一控制线，所述第一晶体管中的源极和漏极之一连接到电容器装置的一个信号线和一个端子以及另一个连接到另一个布线，并且电容器装置的另一个端子连接到第一晶体管的栅极。

63. 发明授权

US08542169B2 DC/DC converter and liquid crystal display 有权
标题翻译： DC / DC转换器和液晶显示器
公开(公告)号：US08542169B2
公开(公告)日：2013-09-24
申请号：US11929282
申请日：2007-10-30
申请人： Michiru Senda
发明人： Michiru Senda
IPC分类号： G09G3/36 , G09G3/34 , G09G5/00 , G06F3/038
CPC分类号： H02M3/073 , G02F1/13306 , G09G3/3696
摘要： A DC/DC converter of a liquid crystal display includes a charge pump having a thin film transistor, a capacitor and a diode. The thin film transistor is formed on an insulating substrate. A first main electrode of the thin film transistor is connected to an output terminal and a control electrode of the thin film transistor receives a control signal. The thin film transistor includes a non-monocrystal semiconductor. The capacitor has a first electrode connected to a second main electrode of the thin film transistor and a second electrode receiving a variable voltage. The diode is electrically connected between the second main electrode of the thin film transistor, the first electrode of the capacitor, and a power terminal in series. The diode includes a mono-crystal semiconductor.
摘要翻译：液晶显示器的DC / DC转换器包括具有薄膜晶体管，电容器和二极管的电荷泵。薄膜晶体管形成在绝缘基板上。薄膜晶体管的第一主电极连接到输出端子，薄膜晶体管的控制电极接收控制信号。薄膜晶体管包括非单晶半导体。电容器具有连接到薄膜晶体管的第二主电极的第一电极和接收可变电压的第二电极。二极管电连接在薄膜晶体管的第二主电极，电容器的第一电极和串联的功率端子之间。二极管包括单晶半导体。

64. 发明授权

US08395742B2 Liquid crystal display 有权
标题翻译：液晶显示器
公开(公告)号：US08395742B2
公开(公告)日：2013-03-12
申请号：US11928804
申请日：2007-10-30
申请人： Ryoichi Yokoyama , Michiru Senda
发明人： Ryoichi Yokoyama , Michiru Senda
IPC分类号： G02F1/1343
CPC分类号： G02F1/136213 , G02F1/136286 , G09G3/3614 , G09G3/3648 , G09G2300/0426 , G09G2300/0876 , G09G2320/0252
摘要： A liquid crystal display having an improved pixel aperture ratio includes vertical scan lines disposed between adjacent pixels, video signal lines disposed between adjacent pixels, and sub-capacitor lines disposed between adjacent pixels while regularly and repeatedly crossing the vertical scan lines.
摘要翻译：具有改善的像素孔径比的液晶显示器包括设置在相邻像素之间的垂直扫描线，设置在相邻像素之间的视频信号线和设置在相邻像素之间的子电容器线，同时有规律地和重复地穿过垂直扫描线。

65. 发明授权

US07777711B2 Display 有权
标题翻译：显示
公开(公告)号：US07777711B2
公开(公告)日：2010-08-17
申请号：US11392723
申请日：2006-03-30
申请人： Hiroyuki Horibata , Michiru Senda
发明人： Hiroyuki Horibata , Michiru Senda
IPC分类号： G09G3/36
CPC分类号： G11C19/00 , G11C19/28
摘要： A display capable of inhibiting a logic composition circuit from outputting a signal to a gate line or a drain line at unintentional timing is obtained. In this display, at least either a first shift register circuit portion or a second shift register circuit portion includes a reset transistor for resetting the voltage supply source of a node outputting a first shift signal or a second shift signal to a second voltage supply source not turning on transistors of a logic composition circuit portion in response to an output signal received from a shift register circuit portion precedent thereto by at least two stages with respect to a scanning direction.
摘要翻译：获得能够禁止逻辑合成电路在无意定时将信号输出到栅极线或漏极线的显示器。在该显示中，至少第一移位寄存器电路部分或第二移位寄存器电路部分中的至少一个包括复位晶体管，用于将输出第一移位信号或第二移位信号的节点的电压源转换为第二电压源，响应于从其先前的移位寄存器电路部分接收到的相对于扫描方向至少两个级的输出信号，接通逻辑合成电路部分的晶体管。

66. 发明授权

US07683866B2 Display driver for reducing flickering 失效
标题翻译：显示驱动程序以减少闪烁
公开(公告)号：US07683866B2
公开(公告)日：2010-03-23
申请号：US11281926
申请日：2005-11-18
申请人： Michiru Senda
发明人： Michiru Senda
IPC分类号： G09G3/36
CPC分类号： G09G3/3614 , G09G3/3655 , G09G2300/0426 , G09G2320/0247
摘要： A display capable of rendering flickering hard to visually recognize and reducing power consumption is obtained. This display comprises first and second pixel portions including subsidiary capacitors having first electrodes connected to pixel electrodes and second electrodes respectively, first and second subsidiary capacitance lines connected to the second electrodes of the first and second pixel portions respectively and a signal supply circuit supplying first and second signals having first and second voltages to the first and second subsidiary capacitance lines respectively.
摘要翻译：可以获得难以视觉识别和降低功耗的闪烁显示。该显示器包括第一和第二像素部分，其包括分别具有连接到像素电极和第二电极的第一电极的辅助电容器，分别连接到第一和第二像素部分的第二电极的第一和第二辅助电容线以及首先提供的信号供应电路，第二信号分别具有第一和第二辅助电容线的第一和第二电压。

67. 发明申请

US20090146713A1 CLOCK SIGNAL GENERATING CIRCUIT, DISPLAY PANEL MODULE, IMAGING DEVICE, AND ELECTRONIC EQUIPMENT 有权
标题翻译：时钟信号发生电路，显示面板模块，成像设备和电子设备
公开(公告)号：US20090146713A1
公开(公告)日：2009-06-11
申请号：US12327893
申请日：2008-12-04
申请人： Michiru Senda , Hiroshi Mizuhashi
发明人： Michiru Senda , Hiroshi Mizuhashi
IPC分类号： H03L7/00
CPC分类号： H03L7/0814 , H03L7/0818 , H03L7/10
摘要： A delay synchronization loop type clock signal generating circuit includes: a digital delay line for delaying a first clock signal and generating a second clock signal; a ring-type shift register for setting the delay time length of the digital delay line by flip-flop output of each stage thereof; and a delay amount control unit for controlling supply of shift clocks to the ring-type shift register, based on phase relation between the first clock signal and the second clock signal.
摘要翻译：延迟同步环路型时钟信号发生电路包括：数字延迟线，用于延迟第一时钟信号并产生第二时钟信号; 环型移位寄存器，用于通过其各级的触发器输出来设置数字延迟线的延迟时间长度; 以及延迟量控制单元，用于基于第一时钟信号和第二时钟信号之间的相位关系来控制向环型移位寄存器的移位时钟的提供。

68. 发明授权

US07545174B2 Level shift circuit and display device having the same 有权
标题翻译：电平移位电路和显示装置具有相同的功能
公开(公告)号：US07545174B2
公开(公告)日：2009-06-09
申请号：US11758161
申请日：2007-06-05
申请人： Michiru Senda , Ryoichi Yokoyama
发明人： Michiru Senda , Ryoichi Yokoyama
IPC分类号： H03K19/0175
CPC分类号： H03K19/018521 , G09G3/3648 , G09G2310/0289
摘要： A liquid crystal display (“LCD”) includes a first voltage shift circuit at a front stage of an inverter circuit. The first voltage shift circuit includes a second transistor having a source serving as an input, and a gate and drain connected to each other, and is operated as a diode, and a first transistor having a source connected to a power supply, a gate connected to a ground, and a drain connected to the drain of the second transistor. An input signal shifts voltage by a threshold of the second transistor, and then is input into the inverter circuit. Further, a first condenser is inserted between an input node and the gate of the second transistor. Therefore, the LCD has a level shift circuit with a small circuit area and a rapid response speed.
摘要翻译：液晶显示器（“LCD”）包括在逆变器电路的前级的第一电压移位电路。第一电压移位电路包括具有作为输入的源极的第二晶体管，以及彼此连接的栅极和漏极，并且作为二极管工作;以及第一晶体管，源极连接到电源，栅极连接连接到第二晶体管的漏极的漏极。输入信号将电压移位第二晶体管的阈值，然后输入到反相器电路。此外，在输入节点和第二晶体管的栅极之间插入第一电容器。因此，LCD具有电路面积小，响应速度快的电平移位电路。

69. 发明申请

US20070164805A1 Level shift circuit 有权
标题翻译：电平移位电路
公开(公告)号：US20070164805A1
公开(公告)日：2007-07-19
申请号：US11653523
申请日：2007-01-16
申请人： Hiroyuki Horibata , Michiru Senda
发明人： Hiroyuki Horibata , Michiru Senda
IPC分类号： H03L5/00
CPC分类号： H03K19/018528
摘要： A level shift circuit basically has a configuration connecting two CMOS inverter circuits in parallel, furnishes an input signal to a control terminal of the inverter circuit, obtains an output signal from an output terminal of the inverter circuit, and has a function for level shifting the voltage amplitude of the input signal to the voltage amplitude of the supply voltage of the inverter circuit. The signal that is input by the gate terminal of an n-channel transistor arranged in each of two current paths forming the level shift circuit is not a direct input signal but a signal that is supplied by adding an offset corresponding to the threshold of each n-channel transistor with respect to the voltage amplitude of the input signal via the input voltage converter circuit.
摘要翻译：电平移位电路基本上具有并联连接两个CMOS反相器电路的配置，将输入信号提供给逆变器电路的控制端，从逆变器电路的输出端获得输出信号，并且具有电平转换功能输入信号的电压幅度与逆变器电路的电源电压的电压幅值。布置在形成电平移位电路的两个电流路径中的每一个中的由n沟道晶体管的栅极端子输入的信号不是直接输入信号，而是通过将与每个n的阈值相对应的偏移相加而提供的信号通道晶体管相对于输入信号经由输入电压转换器电路的电压振幅。

70. 发明申请

US20060125766A1 Display 有权
标题翻译：显示
公开(公告)号：US20060125766A1
公开(公告)日：2006-06-15
申请号：US11285212
申请日：2005-11-23
申请人： Michiru Senda , Hiroyuki Horibata
发明人： Michiru Senda , Hiroyuki Horibata
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G3/3208 , G09G3/3266 , G09G3/3275 , G09G3/3677 , G09G2330/021 , G11C19/184 , G11C19/28
摘要： A display having a shift register circuit capable of suppressing increase of power consumption is provided. This display comprises a shift register circuit including a shift register circuit portion including a first circuit portion having a second transistor turned on in response to a first signal and a second circuit portion having a sixth transistor turned on in response to a second signal providing an ON-state period not overlapping with an ON-state period of the second transistor and an input signal switching circuit portion for switching the first and second signals supplied to the second and sixth transistors respectively.
摘要翻译：提供了具有能够抑制功耗增加的移位寄存器电路的显示器。该显示器包括移位寄存器电路，该移位寄存器电路包括移位寄存器电路部分，该移位寄存器电路部分包括响应于第一信号而导通的第二晶体管的第一电路部分和响应于第二信号提供ON的第六晶体管导通的第二电路部分 - 与第二晶体管的导通状态周期不重叠的状态周期，以及用于分别切换提供给第二和第六晶体管的第一和第二信号的输入信号切换电路部分。

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