会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 63. 发明申请
    • Custom clock interconnects on a standardized silicon platform
    • 定制时钟互连在标准化的硅平台上
    • US20050062495A1
    • 2005-03-24
    • US10664137
    • 2003-09-17
    • Jonathan ByrnJames JensenMatthew Wingren
    • Jonathan ByrnJames JensenMatthew Wingren
    • G06F17/50H01L27/02H01L27/10H02H3/00
    • G06F17/5045H01L27/0203
    • A standardized silicon platform chip has a substrate surface with an array of unconnected transistors that surround islands. The islands have circuit elements that are interconnectable within each island to form a plurality of varied circuit functions for each of the islands. The varied circuit functions include both application functions and clock functions. Interconnect layers are deposited over the substrate surface to interconnect the circuit elements within each island to complete the varied circuit functions. The varied circuit functions include varied levels of integration including at least gates, flip-flops, clock trees, and oscillators. The varied circuit functions are custom connectable to the array of unconnected transistors to form standard clock resources for the standardized silicon platform chip.
    • 标准化的硅平台芯片具有一个具有围绕岛屿的未连接晶体管阵列的衬底表面。 这些岛具有在每个岛内可互连的电路元件,以便为每个岛形成多个不同的电路功能。 各种电路功能包括应用功能和时钟功能。 互连层沉积在衬底表面上以互连每个岛内的电路元件以完成不同的电路功能。 各种电路功能包括至少包括门,触发器,时钟树和振荡器的不同级别的集成。 不同的电路功能可定制连接到未连接的晶体管阵列,以为标准化的硅平台芯片形成标准时钟资源。