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61. 发明授权

US11186456B2 Conveying device, image forming apparatus incorporating the conveying device, position detecting method of the image forming apparatus, and recording medium 有权
公开(公告)号：US11186456B2
公开(公告)日：2021-11-30
申请号：US16356667
申请日：2019-03-18
申请人： Tatsuya Ishii , Takehiro Chiba , Yuji Karikusa
发明人： Tatsuya Ishii , Takehiro Chiba , Yuji Karikusa
IPC分类号： G06K15/00 , B65H7/06 , B65H5/06 , H04N1/00 , B65H5/02 , B41J11/00
摘要： A conveying device includes a sensor to read a sheet to be conveyed, a first conveyor arranged on an upstream side from the sensor in a sheet conveying direction of the sheet, a second conveyor arranged on a downstream side from the sensor in the sheet conveying direction, and correcting circuitry to correct a distance of the sheet having an error detected when the sensor reads the sheet conveyed by the first conveyor and the second conveyor, to an actual distance. The correcting circuitry uses at least a first correction value correcting a distance read by the sensor when the first conveyor conveys the sheet and a second correction value correcting a distance read by the sensor when the second conveyor conveys the sheet.

62. 发明授权

US10983469B2 Image reading device, image inspection device, and image forming apparatus 有权
公开(公告)号：US10983469B2
公开(公告)日：2021-04-20
申请号：US17005279
申请日：2020-08-27
申请人： Tatsuya Ishii , Yoshio Konno
发明人： Tatsuya Ishii , Yoshio Konno
IPC分类号： G03G15/00 , G03G21/18
摘要： An image reading device includes a reader, a first background part, a second background part, and circuitry. The reader reads a pattern formed on a medium. The first and second background parts are disposed opposite the reader via a conveyance passage of the medium. The second background part has a higher light reflectance than that of the first background part. The circuitry moves one of the first and second background parts to a facing position at which the one faces the reader via the conveyance passage of the medium. The circuitry moves the first background part to the facing position in a case in which the pattern is a light color and the medium is transparent. The circuitry moves the second background part to the facing position in a case in which the pattern is a dark color darker than the light color or the medium is not transparent.

63. 发明授权

US10771646B2 Reading device, image forming apparatus, reference pattern reading method, and storage medium storing program code 有权
公开(公告)号：US10771646B2
公开(公告)日：2020-09-08
申请号：US16155781
申请日：2018-10-09
申请人： Tatsuya Ishii , Yoshiko Niki , Satoshi Iwanami , Osamu Inage , Shinichiroh Wada , Masamoto Nakazawa , Ryohma Ikemoto , Daisuke Nikaku
发明人： Tatsuya Ishii , Yoshiko Niki , Satoshi Iwanami , Osamu Inage , Shinichiroh Wada , Masamoto Nakazawa , Ryohma Ikemoto , Daisuke Nikaku
IPC分类号： H04N1/04 , H04N1/00 , H04N1/047 , H04N1/053
摘要： A reading device includes a position reference member and a reader. The position reference member has a reference pattern that includes a line extending in a prescribed direction. The position reference member is configured to relatively move in a direction orthogonal to the prescribed direction. The reader includes a plurality of sensor chips, each of the sensor chips including a plurality of pixels. The reference pattern corresponds to each of the sensor chips of the reader.

64. 发明申请

US20180157617A1 ELECTRONIC APPARATUS, IMAGE FORMING APPARATUS, AND CONTROL METHOD AND PROGRAM THEREFOR 审中-公开
公开(公告)号：US20180157617A1
公开(公告)日：2018-06-07
申请号：US15831529
申请日：2017-12-05
申请人： Takayuki Shibata , Toshihiro Hamano , Tatsuya Ishii
发明人： Takayuki Shibata , Toshihiro Hamano , Tatsuya Ishii
IPC分类号： G06F15/177 , G06F15/163 , G06F13/12
CPC分类号： G06F15/177 , G05B2219/2231 , G06F1/24 , G06F13/126 , G06F15/163
摘要： An electronic apparatus includes a first processor and a second processor. The first processor includes a detection unit to detect output of an internal-reset occurrence signal from the second processor, and an identification unit to identify, as a source of the internal reset, the second processor in response to the internal-reset occurrence signal and an input of an identification signal from the second processor. The second processor includes an internal reset unit to internally reset the second processor in response to a malfunction of the second processor, a reset occurrence signal output unit to output the internal-reset occurrence signal in response to occurrence of the internal reset of the second processor, and an identification signal output unit to output, to the first processor, the identification signal indicating the source of the internal reset, in response to the occurrence of the internal reset of the second processor.

65. 发明授权

US09329562B2 Electric apparatus and residual electric charge discharging method 有权
标题翻译：电器和剩余电荷放电方法
公开(公告)号：US09329562B2
公开(公告)日：2016-05-03
申请号：US14601303
申请日：2015-01-21
申请人： Tatsuya Ishii
发明人： Tatsuya Ishii
IPC分类号： G03G15/00
CPC分类号： G03G15/80 , Y10T307/944
摘要： Example embodiments of the present invention include a power source; a load circuit; a relay provided between the power source and the load circuit; a rectifying circuit connected between an output terminal and an input terminal of the relay; a discharge circuit connected to the power source line on an input side of the relay and to perform, when turned on, discharging operation to discharge an electric charge that remains on each of the input side and an output side of the relay; and a discharge control circuit to turn on the discharge circuit to perform discharging operation when the relay is turned off to stop the power supply input to the load circuit.
摘要翻译：本发明的示例性实施例包括电源; 负载电路; 设置在电源和负载电路之间的继电器; 连接在继电器的输出端子和输入端子之间的整流电路; 连接到继电器的输入侧的电源线的放电电路，在接通时进行放电动作，放电剩余在继电器的输入侧和输出侧的电荷; 以及放电控制电路，用于在继电器断开时接通放电电路以执行放电操作，以停止对负载电路的电源输入。

66. 发明授权

US08743384B2 Image forming apparatus and communication control program product 有权
标题翻译：图像形成装置和通讯控制程序产品
公开(公告)号：US08743384B2
公开(公告)日：2014-06-03
申请号：US13232246
申请日：2011-09-14
申请人： Tatsuya Ishii , Yoshihisa Ashikawa
发明人： Tatsuya Ishii , Yoshihisa Ashikawa
IPC分类号： G06K15/02
CPC分类号： G03G15/5004 , G03G21/1652
摘要： An image forming apparatus is provided with a processing unit that performs a predetermined process, a power-supply shutting unit that shuts off power supply to the processing unit when a predetermined door is opened, a voltage detecting unit that detects a decrease in voltage at a point located posterior to the power-supply shutting unit, and a communication control unit that does not initiate communication with the processing unit if the decrease in voltage is detected by the voltage detecting unit before a start of the communication with the processing unit, and judges the just-ended communication as abnormal if the decrease in voltage is detected by the voltage detecting unit after the end of the communication with the processing unit.
摘要翻译：图像形成装置具有执行预定处理的处理单元，当预定门打开时切断对处理单元的电力供应的电源关闭单元，检测电压降低的电压检测单元位于电源关闭单元后面的通信控制单元，以及通信控制单元，如果在与处理单元的通信开始之前由电压检测单元检测到电压降低，则不会启动与处理单元的通信，并判断如果在与处理单元的通信结束之后电压检测单元检测到电压降低，刚刚通信就会异常。

67. 发明授权

US08247818B2 Electro-optical device and electronic apparatus 有权
标题翻译：电光装置和电子设备
公开(公告)号：US08247818B2
公开(公告)日：2012-08-21
申请号：US13079277
申请日：2011-04-04
申请人： Tatsuya Ishii
发明人： Tatsuya Ishii
IPC分类号： H01L33/00
CPC分类号： H01L29/78642 , G02F1/136227 , G02F2001/13685 , H01L27/1222
摘要： A semiconductor layer of a TFT is continuously formed from an inside of an open hole portion overlapping with an intersection up to an outside of the open hole portion and includes a first source/drain area electrically connected to a surface portion of the data line exposed to a bottom surface of the open hole portion, a channel area disposed on a side wall of the open hole portion, and a second source/drain area formed outside the open hole portion and electrically connected to the pixel electrode. The gate electrode of the TFT is formed inside the open hole portion so as to overlap with at least the channel area and is electrically connected to a scanning line.
摘要翻译： TFT的半导体层从与开口部的交叉点重叠的开孔部的内部连续地形成，并且包括电连接到暴露于所述开口部的数据线的表面部的第一源极/漏极区域露出孔部分的底面，设置在开孔部分的侧壁上的通道区域，以及形成在露出孔部分外部并电连接到像素电极的第二源极/漏极区域。 TFT的栅电极形成在开孔部内，以至少与沟道区重叠，并与扫描线电连接。

68. 发明授权

US08168982B2 Substrate for electro-optical device with light shielding section having various widths, electro-optical device, and electronic apparatus 有权
标题翻译：具有各种宽度的遮光部的电光装置的基板，电光装置和电子装置
公开(公告)号：US08168982B2
公开(公告)日：2012-05-01
申请号：US12567268
申请日：2009-09-25
申请人： Tatsuya Ishii
发明人： Tatsuya Ishii
IPC分类号： H01L29/06
CPC分类号： H01L29/78633 , G02F1/136209 , G02F1/136213 , H01L27/124 , H01L27/1255 , H01L29/42384 , H01L29/78621
摘要： Disclosed is a substrate for an electro-optical device including: a substrate; a plurality of data lines and a plurality of scanning lines which intersect with other on the substrate; a pixel electrode formed in each of a plurality of pixels which configure a display region on the substrate and are defined in correspondence with intersections between the plurality of data lines and the plurality of scanning lines; a transistor provided in each of non-opening regions which discriminate between opening regions of the plurality of pixels and including a semiconductor layer including a channel region having a channel length in one direction of the display region, a data line side source/drain region electrically connected to the data line, a pixel electrode side source/drain region electrically connected to the pixel electrode, a first junction region formed between the channel region and the data line side source/drain region, and a second junction region formed between the channel region and the pixel electrode side source/drain region; and a light-shielding section which is formed above each of the semiconductor layers, extends along the one direction, and includes a first portion which covers the first junction region and a second portion which covers the second junction region and has a width larger than that of the first portion in a direction intersecting the one direction.
摘要翻译：公开了一种电光装置用基板，具有：基板; 多个数据线和与该基板上的另一条相交的多个扫描线; 形成在多个像素中的每一个中的像素电极，其构成所述衬底上的显示区域并且与所述多条数据线与所述多条扫描线之间的交点对应地定义; 设置在每个非开放区域中的晶体管，其区分多个像素的开口区域，并且包括半导体层，所述半导体层包括在显示区域的一个方向上具有沟道长度的沟道区域，电子数据线侧源极/漏极区域与像素电极电连接的像素电极侧源极/漏极区域，形成在沟道区域和数据线侧源极/漏极区域之间的第一结区域和形成在沟道区域之间的第二接合区域和像素电极侧源极/漏极区域; 并且形成在每个所述半导体层之上的遮光部分沿着所述一个方向延伸，并且包括覆盖所述第一接合区域的第一部分和覆盖所述第二接合区域的宽度大于所述第二接合区域的宽度的第二部分。的第一部分在与该一个方向相交的方向上。

69. 发明申请

US20110283054A1 NONVOLATILE MEMORY 有权
标题翻译：非易失性存储器
公开(公告)号：US20110283054A1
公开(公告)日：2011-11-17
申请号：US13086383
申请日：2011-04-13
申请人： KENJI KOZAKAI , Takeshi Nakamura , Tatsuya Ishii , Motoyasu Tsunoda , Shinya Iguchi , Junichi Maruyama
发明人： KENJI KOZAKAI , Takeshi Nakamura , Tatsuya Ishii , Motoyasu Tsunoda , Shinya Iguchi , Junichi Maruyama
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F11/1068 , G06F12/06 , G06F2212/1036 , G11C16/04 , G11C16/10 , G11C16/349 , G11C29/44 , G11C29/76 , G11C2029/0409
摘要： For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate. The nonvolatile memory is provided with a replacing function to replace a group of memory cells including defective memory cells which are incapable of normal writing or erasion with a group of memory cells including no defective memory cell, a numbers of rewrites averaging function to grasp the number of data rewrites in each group of memory cells and to so perform replacement of memory cell groups that there may arise no substantial difference in the number of rewrites among a plurality of memory cell groups, and an error correcting function to detect and correct any error in data stored in the memory array, wherein first address translation information deriving from the replacing function and second address translation information deriving from the numbers of rewrites averaging function are stored in respectively prescribed areas in the memory array, and the first address translation information and second address translation information concerning the same memory cell group are stored in a plurality of sets in a time series.
摘要翻译：对于允许电子写入和擦除要存储的信息（例如闪存）的非易失性存储器，系统开发者的负载将被减少，并且即使这样的系统的重要数据也可以避免由于管理和地址转换信息被破坏，系统无法运行的异常状态。非易失性存储器设置有替换功能，以替换包括不能正常写入或擦除的缺陷存储器单元的存储器单元组，所述存储器单元不包括不存在缺陷存储器单元的存储单元组，重写次数用于掌握数量的每个存储器单元组中的数据重写，并且因此执行存储单元组的替换，使得多个存储单元组之间的重写次数可能没有显着差异，以及用于检测和校正任何错误的错误校正功能存储在存储器阵列中的数据，其中从替换功能导出的第一地址转换信息和从重写平均函数导出的第二地址转换信息被存储在存储器阵列中的分别规定的区域中，并且第一地址转换信息和第二地址关于相同存储单元组的翻译信息是sto 以时间序列的多个集合中的红色。

70. 发明申请

US20110022913A1 NONVOLATILE MEMORY 有权
公开(公告)号：US20110022913A1
公开(公告)日：2011-01-27
申请号：US12896016
申请日：2010-10-01
申请人： Kenji Kozakai , Takeshi Nakamura , Tatsuya Ishii , Motoyasu Tsunoda , Shinya Iguchi , Junichi Maruyama
发明人： Kenji Kozakai , Takeshi Nakamura , Tatsuya Ishii , Motoyasu Tsunoda , Shinya Iguchi , Junichi Maruyama
IPC分类号： G06F1/26 , G06F11/07
CPC分类号： G06F12/0246 , G06F11/1068 , G06F12/06 , G06F2212/1036 , G11C16/04 , G11C16/10 , G11C16/349 , G11C29/44 , G11C29/76 , G11C2029/0409
摘要： For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate. The nonvolatile memory is provided with a replacing function to replace a group of memory cells including defective memory cells which are incapable of normal writing or erasion with a group of memory cells including no defective memory cell, a numbers of rewrites averaging function to grasp the number of data rewrites in each group of memory cells and to so perform replacement of memory cell groups that there may arise no substantial difference in the number of rewrites among a plurality of memory cell groups, and an error correcting function to detect and correct any error in data stored in the memory array, wherein first address translation information deriving from the replacing function and second address translation information deriving from the numbers of rewrites averaging function are stored in respectively prescribed areas in the memory array, and the first address translation information and second address translation information concerning the same memory cell group are stored in a plurality of sets in a time series.

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