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61. 发明授权

US08102700B2 Unidirectional spin torque transfer magnetic memory cell structure 有权
标题翻译：单向自旋转矩传递磁存储单元结构
公开(公告)号：US08102700B2
公开(公告)日：2012-01-24
申请号：US12242261
申请日：2008-09-30
申请人： Jun Liu , Gurtej Sandhu
发明人： Jun Liu , Gurtej Sandhu
IPC分类号： G11C11/14 , G11C11/15 , G11C11/02
CPC分类号： G11C11/1675 , G11C11/16 , G11C11/161 , G11C11/1695 , H01L43/02
摘要： Spin torque transfer magnetic random access memory devices configured to be programmed unidirectionally and methods of programming such devices. The devices include memory cells having two pinned layers and a free layer therebetween. By utilizing two pinned layers, the spin torque effect on the free layer from each of the two pinned layers, respectively, allows the memory cells to be programmed with unidirectional currents.
摘要翻译：配置为单向编程的自旋扭矩传递磁性随机存取存储器件以及编程这种器件的方法。这些装置包括具有两个钉扎层和其间的自由层的存储单元。通过利用两个固定层，分别从两个固定层中的每一个自由层上的自旋转矩效应允许以单向电流编程存储器单元。

62. 发明授权

US08102162B2 Buck controller having integrated boost control and driver 有权
标题翻译：降压控制器具有集成升压控制和驱动器
公开(公告)号：US08102162B2
公开(公告)日：2012-01-24
申请号：US12482818
申请日：2009-06-11
申请人： Zaki Moussaoui , Leigh Cormie , Jun Liu
发明人： Zaki Moussaoui , Leigh Cormie , Jun Liu
IPC分类号： G05F1/563
CPC分类号： H02M3/1582
摘要： An integrated circuit controller for controlling the operation of a voltage converter which includes a first comparator for comparing a voltage associated with an input of a boost converter with a threshold voltage and generating a control signal in response thereto. A second comparator compares a second voltage associated with an output of the boost converter with the threshold voltage and generates a second control signal in response thereto. Driver circuitry generates a first switching transistor drive signal and a second switching transistor drive signal. The first switching transistor drive signal is used for driving an upper gate switching transistor of a buck converter. The second switching transistor drive signal may be configured in a first mode of operation to drive a lower gate switching transistor of the buck converter and may be configured in a second mode of operation to drive a switching transistor of the boost converter. Control logic enables/disables at least a portion of the driver circuitry responsive to the control signal and the second control signal.
摘要翻译：一种用于控制电压转换器的操作的集成电路控制器，其包括用于将与升压转换器的输入相关联的电压与阈值电压进行比较的第一比较器，并响应于此产生控制信号。第二比较器将与升压转换器的输出相关联的第二电压与阈值电压进行比较，并响应于此产生第二控制信号。驱动器电路产生第一开关晶体管驱动信号和第二开关晶体管驱动信号。第一开关晶体管驱动信号用于驱动降压转换器的上栅极开关晶体管。第二开关晶体管驱动信号可以被配置为第一操作模式以驱动降压转换器的下栅极开关晶体管，并且可以被配置为驱动升压转换器的开关晶体管的第二操作模式。响应于控制信号和第二控制信号，控制逻辑启用/禁用至少一部分驱动器电路。

63. 发明申请

US20110255331A1 MEMORY CELLS WITH RECTIFYING DEVICE 有权
标题翻译：具有修复装置的记忆细胞
公开(公告)号：US20110255331A1
公开(公告)日：2011-10-20
申请号：US13158836
申请日：2011-06-13
申请人： Jun Liu
发明人： Jun Liu
IPC分类号： G11C11/21
CPC分类号： G11C13/0004 , C07D213/81 , C07D401/06 , C07D401/12 , C07D401/14 , G11C5/025 , G11C5/063 , G11C13/0023 , G11C13/003 , G11C2213/72 , G11C2213/74 , G11C2213/78 , G11C2213/79 , H01L27/1021
摘要： Memory devices and methods described are shown that provide improvements, including improved cell isolation for operations such as read and write. Further, methods and devices for addressing and accessing cells are shown that provide a simple and efficient way to manage devices with multiple cells associated with each access transistor. Examples of multiple cell devices include phase change memory devices with multiple cells associated with each access transistor.
摘要翻译：显示了所描述的存储器件和方法，其提供了改进，包括改进的诸如读取和写入等操作的单元隔离。此外，示出了用于寻址和访问单元的方法和设备，其提供用于管理具有与每个存取晶体管相关联的多个单元的器件的简单且有效的方式。多个单元设备的示例包括具有与每个存取晶体管相关联的多个单元的相变存储器件。

64. 发明申请

US20110212247A1 PLANTS AND SEEDS OF SPRING CANOLA VARIETY SCV453784 有权
标题翻译：春天植物和种子Canola VARIETY SCV453784
公开(公告)号：US20110212247A1
公开(公告)日：2011-09-01
申请号：US12713479
申请日：2010-02-26
申请人： Jun Liu , Scott McClinchey , Zenon Lisieczko
发明人： Jun Liu , Scott McClinchey , Zenon Lisieczko
IPC分类号： A23L1/10 , A01H5/00 , A01H1/02 , C12N15/82 , C12N15/31
CPC分类号： A01H5/10
摘要： The invention relates to a novel canola line designated as SCV453784. The invention also relates to the seeds, the plants, and the plant parts of canola line SCV453784 as well as to methods for producing a canola plant produced by crossing canola line SCV453784 with itself or with another canola line. The invention also relates to methods for producing a canola plant containing in its genetic material one or more transgenes and to the transgenic canola plants and plant parts produced by those methods. The invention further relates to canola lines or breeding lines and plant parts derived from canola line SCV453784, to methods for producing other canola lines or plant parts derived from canola line SCV453784 and to the canola plants, varieties, and their parts derived from use of those methods. The invention additionally relates to hybrid canola seeds, plants, and plant parts produced by crossing the line SCV453784 with another canola line.
摘要翻译：本发明涉及一种名为SCV453784的新型卡诺拉线。本发明还涉及油菜籽系SCV453784的种子，植物和植物部分以及通过将卡诺拉油菜SCV453784自身或与另一种油菜线交叉生产的油菜植物的方法。本发明还涉及在其遗传物质中含有一种或多种转基因和通过这些方法生产的转基因卡诺拉植物和植物部分产生卡诺拉植物的方法。本发明进一步涉及卡诺拉线或育种系和源自卡诺拉线SCV453784的植物部分，以及用于生产其它卡诺拉线或衍生自卡诺拉线SCV453784的植物部分的方法以及来自使用那些的卡诺拉植物，品种及其部分方法。本发明另外涉及通过将SCV453784与另一个油菜线交叉产生的杂种卡诺拉种子，植物和植物部分。

65. 发明授权

US07961506B2 Multiple memory cells with rectifying device 有权
标题翻译：具有整流装置的多个存储单元
公开(公告)号：US07961506B2
公开(公告)日：2011-06-14
申请号：US12026195
申请日：2008-02-05
申请人： Jun Liu
发明人： Jun Liu
IPC分类号： G11C11/00
CPC分类号： G11C13/0004 , C07D213/81 , C07D401/06 , C07D401/12 , C07D401/14 , G11C5/025 , G11C5/063 , G11C13/0023 , G11C13/003 , G11C2213/72 , G11C2213/74 , G11C2213/78 , G11C2213/79 , H01L27/1021
摘要： Memory devices and methods described are shown that provide improvements, including improved cell isolation for operations such as read and write. Further, methods and devices for addressing and accessing cells are shown that provide a simple and efficient way to manage devices with multiple cells associated with each access transistor. Examples of multiple cell devices include phase change memory devices with multiple cells associated with each access transistor.
摘要翻译：显示了所描述的存储器件和方法，其提供了改进，包括改进的诸如读取和写入等操作的单元隔离。此外，示出了用于寻址和访问单元的方法和设备，其提供用于管理具有与每个存取晶体管相关联的多个单元的器件的简单且有效的方式。多个单元设备的示例包括具有与每个存取晶体管相关联的多个单元的相变存储器件。

66. 发明申请

US20110103129A1 VARIABLE-RESISTANCE MATERIAL MEMORIES, PROCESSES OF FORMING SAME, AND METHODS OF USING SAME 有权
标题翻译：可变电阻材料，其形成方法和使用方法
公开(公告)号：US20110103129A1
公开(公告)日：2011-05-05
申请号：US12986717
申请日：2011-01-07
申请人： Jun Liu
发明人： Jun Liu
IPC分类号： G11C11/00 , H01L21/02
CPC分类号： H01L21/8239 , G11C13/0004 , G11C13/0007 , G11C13/003 , G11C2213/31 , G11C2213/32 , G11C2213/75 , H01L27/101 , H01L27/1052 , H01L27/24
摘要： A variable-resistance material memory array includes a series of variable-resistance material memory cells. The series of variable-resistance material memory cells can be arranged in parallel with a corresponding series of control gates. A select gate can also be disposed in series with the variable-resistance material memory cells. Writing/reading/erasing to a given variable-resistance material memory cell can include turning off the corresponding control gate, while turning on all other control gates. Various devices can include such a variable-resistance material memory array.
摘要翻译：可变电阻材料存储器阵列包括一系列可变电阻材料存储单元。一系列可变电阻材料存储单元可以与相应的一系列控制栅极并联布置。选择栅极也可以与可变电阻材料存储单元串联布置。对给定的可变电阻材料存储单元的写入/读取/擦除可以包括在打开所有其它控制栅极的同时关闭对应的控制栅极。各种装置可以包括这种可变电阻材料存储器阵列。

67. 发明申请

US20110095256A1 Memory Cells 有权
标题翻译：记忆细胞
公开(公告)号：US20110095256A1
公开(公告)日：2011-04-28
申请号：US12983757
申请日：2011-01-03
申请人： Jun Liu
发明人： Jun Liu
IPC分类号： H01L47/00
CPC分类号： H01L27/115 , B60G11/27 , B60G21/067 , B60G21/073 , B60G2500/202 , B60G2800/01 , G11C11/5678 , G11C13/0004 , G11C16/0475 , G11C2213/53 , G11C2213/71 , H01L29/1033 , H01L29/685
摘要： In some embodiments, a memory cell includes a transistor gate spaced from a channel region by gate dielectric; a source region on one side of the channel region; and a drain region on an opposing side of the channel region from the source region. The channel region has phase change material adjacent the drain region. In some embodiments, the phase change material may be adjacent both the source region and the drain region. Some embodiments include methods of programming a memory cell that has phase change material adjacent a drain region. An inversion layer is formed within the channel region adjacent the gate dielectric, with the inversion layer having a pinch-off region within the phase change material adjacent the drain region. Hot carriers (for instance, electrons) within the pinch-off region are utilized to change a phase within the phase change material.
摘要翻译：在一些实施例中，存储器单元包括通过栅极电介质与沟道区间隔开的晶体管栅极; 在沟道区一侧的源区; 以及在源极区域的沟道区域的相对侧上的漏极区域。沟道区域具有与漏极区域相邻的相变材料。在一些实施例中，相变材料可以与源极区域和漏极区域相邻。一些实施例包括编程具有与漏极区相邻的相变材料的存储单元的方法。在邻近栅极电介质的沟道区域内形成反型层，反型层在相变材料内具有与漏极区相邻的夹断区域。使用夹断区域内的热载体（例如电子）来改变相变材料内的相位。

68. 发明申请

US20110068313A1 MEMORY DEVICES WITH ENHANCED ISOLATION OF MEMORY CELLS, SYSTEMS INCLUDING SAME AND METHODS OF FORMING SAME 有权
标题翻译：具有增强的记忆体分离的记忆装置，包括其的系统及其形成方法
公开(公告)号：US20110068313A1
公开(公告)日：2011-03-24
申请号：US12563277
申请日：2009-09-21
申请人： Jun Liu
发明人： Jun Liu
IPC分类号： H01L45/00 , H01L21/77 , H01L27/04
CPC分类号： H01L45/1675 , G11C13/0004 , G11C13/0007 , H01L27/101 , H01L27/2463 , H01L45/06 , H01L45/1226 , H01L45/1233 , H01L45/1273 , H01L45/1293 , H01L45/144
摘要： Memory cells of a memory device including a variable resistance material have a cavity between the memory cells. Electronic systems include such memory devices. Methods of forming a memory device include providing a cavity between memory cells of the memory device.
摘要翻译：包括可变电阻材料的存储器件的存储单元在存储单元之间具有空腔。电子系统包括这样的存储器件。形成存储器件的方法包括在存储器件的存储器单元之间提供空腔。

69. 发明申请

US20110062409A1 PHASE CHANGE MEMORY STRUCTURE WITH MULTIPLE RESISTANCE STATES AND METHODS OF PROGRAMMING AND SENSING 有权
标题翻译：具有多种电阻状态的相变记忆结构及编程和感测方法
公开(公告)号：US20110062409A1
公开(公告)日：2011-03-17
申请号：US12949844
申请日：2010-11-19
申请人： Jun Liu , Mike Violette
发明人： Jun Liu , Mike Violette
IPC分类号： H01L45/00 , H01L21/02
CPC分类号： G11C11/56 , G11C11/5678 , G11C13/0004 , G11C2211/5631 , G11C2211/5632 , G11C2211/5634 , H01L45/06 , H01L45/1226 , H01L45/1233 , H01L45/144 , H01L45/165 , H01L45/1675 , Y10S977/754
摘要： A phase change memory structure with multiple resistance states and methods of forming, programming, and sensing the same. The memory structure includes two or more phrase change elements provided between electrodes. Each phase change element has a respective resistance curve as a function of programming voltage which is shifted relative to the resistance curves of other phase change elements. In one example structure using two phase change elements, the memory structure is capable of switching among four resistance states.
摘要翻译：具有多个电阻状态的相变存储器结构及其形成，编程和感测方法。存储器结构包括在电极之间提供的两个或更多个短语改变元件。每个相变元件具有作为编程电压的函数的相应电阻曲线，其相对于其它相变元件的电阻曲线偏移。在使用两个相变元件的一个示例结构中，存储器结构能够在四个电阻状态之间切换。

70. 发明申请

US20110058406A1 RESISTIVE MEMORY 有权
标题翻译：电阻记忆
公开(公告)号：US20110058406A1
公开(公告)日：2011-03-10
申请号：US12946596
申请日：2010-11-15
申请人： Yantao Ma , Jun Liu
发明人： Yantao Ma , Jun Liu
IPC分类号： G11C11/21 , G11C11/02 , G11C11/16
CPC分类号： G11C11/5607 , G11C11/161 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/1693 , G11C11/1697 , G11C13/0004 , G11C13/0007 , G11C13/0014 , G11C13/0016 , G11C13/0038 , G11C13/0069 , G11C2013/0073 , G11C2013/0078 , G11C2213/31 , G11C2213/32
摘要： The present disclosure includes resistive memory devices and systems having resistive memory cells, as well as methods for operating the resistive memory cells. One memory device embodiment includes at least one resistive memory element, a programming circuit, and a sensing circuit. For example, the programming circuit can include a switch configured to select one of N programming currents for programming the at least one resistive memory element, where each of the N programming currents has a unique combination of current direction and magnitude, with N corresponding to the number of resistance states of the at least one memory element. In one or more embodiments, the sensing circuit can be arranged for sensing of the N resistance states.
摘要翻译：本公开包括具有电阻存储器单元的电阻式存储器件和系统，以及用于操作电阻存储器单元的方法。一个存储器件实施例包括至少一个电阻存储器元件，编程电路和感测电路。例如，编程电路可以包括被配置为选择N个编程电流之一以用于编程至少一个电阻性存储器元件的开关，其中N个编程电流中的每一个具有电流方向和幅度的唯一组合，N对应于至少一个存储元件的电阻状态数。在一个或多个实施例中，感测电路可被布置用于感测N电阻状态。

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