专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

61. 发明授权

US08525620B2 BAW resonator filter bandwidth and out-of-band frequency rejection 有权
标题翻译： BAW谐振器滤波器带宽和带外频率抑制
公开(公告)号：US08525620B2
公开(公告)日：2013-09-03
申请号：US12627927
申请日：2009-11-30
申请人： Carlton Stuebing , Guillaume Bouche
发明人： Carlton Stuebing , Guillaume Bouche
IPC分类号： H03H9/00
CPC分类号： H03H9/605 , H03H9/542
摘要： Embodiments of the present invention provide systems, devices and methods for improving both the bandwidth of a BAW resonator bandpass filter and the suppression of out-of-band frequencies above the passband. In various embodiments of the invention, blocker inductors are located in series between the filter input and the filter output to realize both bandwidth enhancement and improved out-of-band frequency rejection. For example, a first blocker inductor may be located at the input and a second blocker inductor may be located at the output of a BAW resonator bandpass filter.
摘要翻译：本发明的实施例提供用于改善BAW谐振器带通滤波器的带宽和抑制通带以上的带外频率的系统，装置和方法。在本发明的各种实施例中，阻塞电感器串联在滤波器输入和滤波器输出之间，以实现带宽增强和改进的带外频率抑制。例如，第一阻塞电感器可以位于输入端，并且第二阻塞电感器可以位于BAW谐振器带通滤波器的输出处。

62. 发明授权

US08164183B2 Integrated circuit cooling device 有权
标题翻译：集成电路冷却装置
公开(公告)号：US08164183B2
公开(公告)日：2012-04-24
申请号：US10580324
申请日：2004-11-12
申请人： Guillaume Bouche
发明人： Guillaume Bouche
IPC分类号： H01L23/34
CPC分类号： F04B43/043 , B81B7/0093 , B81B2201/036 , B81B2203/0127 , B81B2203/0315 , H01L23/473 , H01L2924/0002 , H01L2924/00
摘要： A pump having: a cavity formed inside an insulating substrate, the upper part of the substrate being situated near the cavity having an edge; a conductive layer covering the inside of the cavity up to the edge and optionally covering the edge itself; a flexible membrane made of a conductive material placed above the cavity and resting against the edge; a dielectric layer covering the conductive layer or the membrane whereby insulating the portions of the conductive layer and of the membrane that are near one another; at least one aeration line formed in the insulating substrate that opens into the cavity via an opening in the conductive layer, and; terminals for applying a voltage between the conductive layer and the membrane.
摘要翻译：一种泵，具有：形成在绝缘基板内部的空腔，所述基板的上部位于具有边缘的所述空腔附近; 导电层，覆盖空腔的内部直到边缘并且可选地覆盖边缘本身; 由导电材料制成的柔性膜，放置在空腔上方并抵靠边缘; 覆盖导电层或膜的电介质层，由此绝缘导电层和膜彼此靠近的部分; 形成在所述绝缘基板中的至少一个通气线，所述曝气线经由所述导电层中的开口而进入所述空腔，用于在导电层和膜之间施加电压的端子。

63. 发明授权

US07612488B1 Method to control BAW resonator top electrode edge during patterning 有权
标题翻译：在图案化期间控制BAW谐振器顶部电极边缘的方法
公开(公告)号：US07612488B1
公开(公告)日：2009-11-03
申请号：US11654244
申请日：2007-01-16
申请人： Guillaume Bouche , Ralph N. Wall
发明人： Guillaume Bouche , Ralph N. Wall
IPC分类号： H01L41/06
CPC分类号： H03H9/589 , H03H9/131
摘要： A piezoelectric resonator include a multi-layer top electrode. The multi-layer top electrode includes at least a top metal layer and a bottom metal layer. A top metal layer edge is recessed compared to a bottom metal layer edge allowing conformal deposition of a passivation layer. The passivation layer covers and protects the underlying layers from subsequent etching, thereby preventing etch undercut of the top electrode. In some embodiments, the multi-layer top electrode is configured as a bi-layer. In other embodiments, an extra layer is configured between the top metal layer and the bottom metal layer, for example a shunt load layer.
摘要翻译：压电谐振器包括多层顶电极。多层顶电极至少包括顶金属层和底金属层。与底部金属层边缘相比，顶部金属层边缘凹陷，允许钝化层的共形沉积。钝化层覆盖并保护下面的层免于随后的蚀刻，从而防止顶部电极的蚀刻底切。在一些实施例中，多层顶电极被配置为双层。在其他实施例中，在顶部金属层和底部金属层（例如分流负载层）之间配置了额外的层。

64. 发明申请

US20080268575A1 Orientation-dependent etching of deposited AIN for structural use and sacrificial layers in MEMS 有权
标题翻译：沉积的AIN的取向依赖蚀刻用于MEMS中的结构使用和牺牲层
公开(公告)号：US20080268575A1
公开(公告)日：2008-10-30
申请号：US11789578
申请日：2007-04-24
申请人： Guillaume Bouche , Ralph N. Wall
发明人： Guillaume Bouche , Ralph N. Wall
IPC分类号： H01L21/78 , H01L21/302
CPC分类号： B81C1/0015 , B81B2201/014 , B81B2203/0384 , B81C1/00333 , B81C2201/0107 , B81C2201/0157 , B81C2203/0118
摘要： In accordance with the present invention, accurate and easily controlled sloped walls may be formed using. AlN and preferably a heated TMAH for such purpose as the fabrication of MEMS devices, wafer level packaging and fabrication of fluidic devices. Various embodiments are disclosed.
摘要翻译：根据本发明，可以使用精确且容易控制的倾斜壁来形成。 AlN，并且优选地是加热的TMAH，用于制造MEMS器件，晶片级封装和流体器件的制造。公开了各种实施例。

65. 发明申请

US20080204857A1 Bragg mirror optimized for shear waves 有权
标题翻译：针对剪切波优化的布拉格镜
公开(公告)号：US20080204857A1
公开(公告)日：2008-08-28
申请号：US11713461
申请日：2007-02-28
申请人： Ed Godshalk , Guillaume Bouche
发明人： Ed Godshalk , Guillaume Bouche
IPC分类号： G02F1/33 , G10K11/00
CPC分类号： H03H9/175 , H03H3/04 , H03H2003/025
摘要： In an embodiment, set forth by way of example and not limitation, a Bragg mirror includes a first bi-layer of a first thickness and a second bi-layer of a second thickness which is different from the first thickness. In this exemplary embodiment, the first bi-layer consists essentially of a first high impedance layer and a first low impedance layer, and the second bi-layer of a second thickness which is different from the first thickness, the second bi-layer consisting essentially of a second high impedance layer and a second low impedance layer. Preferably, the first bi-layer is configured to substantially reflect a first wavelength and the second bi-layer is configured to substantially reflect a second wavelength different from the first wavelength.
摘要翻译：在通过示例而非限制的方式阐述的实施例中，布拉格反射镜包括第一厚度的第一双层和与第一厚度不同的第二厚度的第二双层。在该示例性实施例中，第一双层基本上由第一高阻抗层和第一低阻抗层组成，第二厚度与第一厚度不同的第二厚度构成，第二双层基本上由的第二高阻抗层和第二低阻抗层。优选地，第一双层被配置为基本上反射第一波长，并且第二双层被配置为基本上反射与第一波长不同的第二波长。

66. 发明申请

US20070278663A1 Integrated Circuit Cooling Device 有权
标题翻译：集成电路冷却装置
公开(公告)号：US20070278663A1
公开(公告)日：2007-12-06
申请号：US10580324
申请日：2004-11-12
申请人： Guillaume Bouche
发明人： Guillaume Bouche
IPC分类号： H01L23/34 , H01L21/4763
CPC分类号： F04B43/043 , B81B7/0093 , B81B2201/036 , B81B2203/0127 , B81B2203/0315 , H01L23/473 , H01L2924/0002 , H01L2924/00
摘要： A pump having: a cavity formed inside an insulating substrate, the upper part of the substrate being situated near the cavity having an edge; a conductive layer covering the inside of the cavity up to the edge and optionally covering the edge itself; a flexible membrane made of a conductive material placed above the cavity and resting against the edge; a dielectric layer covering the conductive layer or the membrane whereby insulating the portions of the conductive layer and of the membrane that are near one another; at least one aeration line formed in the insulating substrate that opens into the cavity via an opening in the conductive layer, and; terminals for applying a voltage between the conductive layer and the membrane.
摘要翻译：一种泵，具有：形成在绝缘基板内部的空腔，所述基板的上部位于具有边缘的所述空腔附近; 导电层，覆盖空腔的内部直到边缘并且可选地覆盖边缘本身; 由导电材料制成的柔性膜，放置在空腔上方并抵靠边缘; 覆盖导电层或膜的电介质层，由此绝缘导电层和膜彼此靠近的部分; 形成在所述绝缘基板中的至少一个通气线，所述曝气线经由所述导电层中的开口而进入所述空腔，用于在导电层和膜之间施加电压的端子。

67. 发明授权

US07303953B2 Production of an integrated capacitor 有权
标题翻译：生产集成电容器
公开(公告)号：US07303953B2
公开(公告)日：2007-12-04
申请号：US11298910
申请日：2005-12-09
申请人： Guillaume Bouche , Jean-Christophe Giraudin
发明人： Guillaume Bouche , Jean-Christophe Giraudin
IPC分类号： H01L21/8242
CPC分类号： H01L28/91 , H01L27/0805 , H01L27/10861 , H01L29/66181
摘要： A process for producing a capacitor integrated into an electronic circuit comprises the formation of a trench in a substrate through a conductive portion similar to an MOS transistor gate. Alternating conductive, insulating and conductive layers are deposited inside the trench T in order to form a lower electrode, a dielectric and an upper electrode of the capacitor, respectively. The conductive portion is used to electrically connect the lower electrode to other electronic components of the circuit without an additional cost with respect to the connection of the circuit transistors.
摘要翻译：一种集成到电子电路中的电容器的制造方法包括通过类似于MOS晶体管栅极的导电部分在衬底中形成沟槽。交替的导电，绝缘和导电层沉积在沟槽T的内部，以分别形成电容器的下电极，电介质和上电极。导电部分用于将下电极与电路的其它电子部件电连接，而不会对电路晶体管的连接造成额外的成本。

68. 发明申请

US20070152884A1 Antenna having a dielectric structure for a simplified fabrication process 有权
标题翻译：具有用于简化制造工艺的电介质结构的天线
公开(公告)号：US20070152884A1
公开(公告)日：2007-07-05
申请号：US11640108
申请日：2006-12-14
申请人： Guillaume Bouche , Sebastien Montusclat , Daniel Gloria
发明人： Guillaume Bouche , Sebastien Montusclat , Daniel Gloria
IPC分类号： H01Q1/38 , H01Q13/00
CPC分类号： H01Q9/44 , H01Q1/38 , H01Q9/0485
摘要： An an antenna is formed with a self-supporting structure (1), a dielectric structure (2), and a conducting structure (3), each structure being formed from at least one structural element (10; 21, 22; 31-34). The structural elements of the different structures (1, 2, 3) constitute a stack in which these elements (10; 21, 22; 31-34) are connected to each other, and the dielectric structure (2) is formed in the stack by nano-imprinting.
摘要翻译：形成有自支撑结构（1），电介质结构（2）和导电结构（3）的天线，每个结构由至少一个结构元件（10; 21,22; 31-34 ）。不同结构（1,2,3）的结构元件构成了这些元件（10; 21,22; 31-34）彼此连接的叠层，并且电介质结构（2）形成在堆叠通过纳米压印。

69. 发明申请

US20070152777A1 Support for acoustic resonator and corresponding integrated circuit 有权
标题翻译：支持声谐振器和相应的集成电路
公开(公告)号：US20070152777A1
公开(公告)日：2007-07-05
申请号：US11511082
申请日：2006-08-28
申请人： Guillaume Bouche , Guy Parat
发明人： Guillaume Bouche , Guy Parat
IPC分类号： H03H9/54
CPC分类号： H03H9/172 , H03H3/02 , H03H9/0547
摘要： An integrated circuit includes at least one interconnection level and an acoustic resonator provided with an active element and a support. The includes at least one bilayer assembly having a layer of high acoustic impedance material and a layer of low acoustic impedance material. The support further includes a protruding element arranged on a metallization level of the interconnection level, making it possible to produce an electrical contact between an interconnection level and the active element of the acoustic resonator.
摘要翻译：集成电路包括至少一个互连电平和设置有有源元件和支撑件的声谐振器。包括具有高声阻抗材料层和低声阻抗材料层的至少一个双层组件。支撑件还包括布置在互连电平的金属化层上的突出元件，使得可以在互连电平和声谐振器的有源元件之间产生电接触。

70. 发明申请

US20060194364A1 Micro-component packaging process and set of micro-components resulting from this process 有权
标题翻译：微组件包装过程和由此过程产生的微组件
公开(公告)号：US20060194364A1
公开(公告)日：2006-08-31
申请号：US11288942
申请日：2005-11-28
申请人： Guillaume Bouche , Bernard Andre , Nicolas Sillon
发明人： Guillaume Bouche , Bernard Andre , Nicolas Sillon
IPC分类号： H01L21/00 , H01L21/50 , H01L23/02
CPC分类号： B81C1/00269 , B81C2203/019 , H01L23/10 , H01L2924/0002 , H01L2924/01079 , H01L2924/00
摘要： A process for packaging a plurality of micro-components made on the same substrate wafer, in which each micro-component is enclosed in a cavity. This process includes making a cover plate; depositing a metal layer on a face of the cover plate or on a face of the wafer; covering the wafer with the cover plate; applying a contact pressure equal to at least one bar onto the cover plate and onto the wafer; and heating the metal layer during pressing until a seal is obtained, each cavity thus being provided with a sealing area and being closed by a part of the cover plate and/or its metal layer.
摘要翻译：一种用于包装在相同基板晶片上制成的多个微组件的方法，其中每个微组件封装在空腔中。该方法包括制作盖板; 在所述盖板的表面上或所述晶片的表面上沉积金属层; 用盖板覆盖晶片; 将等于至少一个棒的接触压力施加到盖板上并到达晶片上; 并且在压制期间加热金属层直到获得密封，因此每个空腔设置有密封区域并由盖板和/或其金属层的一部分封闭。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式