专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

61. 发明授权

US07148074B1 Method and apparatus for using a capacitor array to measure alignment between system components 有权
标题翻译：使用电容器阵列来测量系统部件之间的对准的方法和装置
公开(公告)号：US07148074B1
公开(公告)日：2006-12-12
申请号：US10820662
申请日：2004-04-07
申请人： Robert J. Drost , Ronald Ho , Robert J. Proebsting
发明人： Robert J. Drost , Ronald Ho , Robert J. Proebsting
IPC分类号： G01R31/26 , H01L21/66
CPC分类号： H01L25/50 , H01L25/0657 , H01L2225/06513 , H01L2225/06531 , H01L2225/06534 , H01L2225/06593 , H01L2924/0002 , H01L2924/00
摘要： One embodiment of the present invention provides a system that measures alignment between a first semiconductor die and a second semiconductor die. The system operates by applying a pattern of voltage signals to a two-dimensional array of conductive transmitter elements that form a transmitter array on the first semiconductor die. This transmitter array is positioned over a corresponding two-dimensional array of conductive receiver elements that form a receiver array on the second semiconductor die, whereby a voltage signal applied to a transmitter element induces a voltage signal in one or more receiver elements. The system amplifies voltage signals induced in receiver elements in the receiver array, and subsequently analyzes the amplified signals to determine an alignment between the first semiconductor die and the second semiconductor die.
摘要翻译：本发明的一个实施例提供一种测量第一半导体管芯和第二半导体管芯之间的对准的系统。该系统通过将电压信号的图案应用于在第一半导体管芯上形成发射器阵列的导电发射器元件的二维阵列来进行操作。该发射器阵列位于形成第二半导体管芯上的接收器阵列的导电接收器元件的对应的二维阵列上，由此施加到发射器元件的电压信号在一个或多个接收器元件中感应电压信号。该系统放大在接收器阵列中的接收器元件中感应的电压信号，随后分析放大的信号以确定第一半导体管芯和第二半导体管芯之间的对准。

62. 发明授权

US07106079B2 Using an interposer to facilate capacitive communication between face-to-face chips 有权
标题翻译：使用插入器来提升面对面芯片之间的电容性通信
公开(公告)号：US07106079B2
公开(公告)日：2006-09-12
申请号：US10973114
申请日：2004-10-22
申请人： Robert J. Drost , Ronald Ho , Robert J. Proebsting
发明人： Robert J. Drost , Ronald Ho , Robert J. Proebsting
IPC分类号： G01R31/00
CPC分类号： H01L23/48 , H01L23/49827 , H01L23/49833 , H01L23/552 , H01L24/72 , H01L24/73 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L2225/06527 , H01L2225/06541 , H01L2225/06555 , H01L2225/06562 , H01L2225/06572 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01033 , H01L2924/01082 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/19041 , H01L2924/30105
摘要： A system that improves communications between capacitively coupled integrated circuit chips. The system operates by situating an interposer over capacitive communication pads on a first integrated circuit chip, wherein the interposer is made up of material that is anisotropic with respect to transmitting capacitive signals. A second integrated circuit chip is situated so that communication pads on the second integrated circuit chip are aligned to capacitively couple signals between the integrated circuit chips through the interposer. The increased dielectric permittivity caused by the interposer can improve capacitive coupling between opposing communication pads on the integrated circuit chips. The interposer can also reduce cross talk between communication pads on the first integrated circuit chip and pads adjacent to the opposing communication pads on the second integrated circuit chip.
摘要翻译：一种改善电容耦合集成电路芯片之间通信的系统。该系统通过在第一集成电路芯片上的电容性通信焊盘上设置插入器来工作，其中插入器由相对于传输电容性信号是各向异性的材料构成。第二集成电路芯片被定位成使得第二集成电路芯片上的通信焊盘对齐以通过插入器电容耦合在集成电路芯片之间的信号。由插入器引起的增加的介电常数可以改善集成电路芯片上相对的通信焊盘之间的电容耦合。插入器还可以减少第一集成电路芯片上的通信焊盘与第二集成电路芯片上相对的通信焊盘相邻的焊盘之间的串扰。

63. 发明授权

US07085178B1 Low-power memory write circuits 有权
标题翻译：低功耗存储器写入电路
公开(公告)号：US07085178B1
公开(公告)日：2006-08-01
申请号：US11045940
申请日：2005-01-27
申请人： Robert J. Proebsting , Ronald Ho , Robert J. Drost
发明人： Robert J. Proebsting , Ronald Ho , Robert J. Drost
IPC分类号： G11C7/00
CPC分类号： G11C7/1078 , G11C7/1048 , G11C7/1096 , G11C2207/2227
摘要： One embodiment of the present invention provides a system that writes to a cell in a memory using a low-voltage-swing signal across a pair of global bit-lines. During operation, the system receives a low-voltage-swing signal across a pair of global bit-lines, which is too low to reliably write the memory cell. Next, the system converts the low-voltage-swing signal to a high-voltage-swing signal, which is adequate to reliably write the memory cell. The system then writes to the memory cell by applying the high-voltage-swing signal across a pair of local bit-lines that are coupled to the memory cell. The use of low-voltage-swing signals on the global bit-lines reduces overall power consumption. Furthermore, in one embodiment of the present invention, the voltage conversion is achieved using a pair of cross-coupled NMOS transistors whose sources are directly or indirectly coupled with the global bit-lines, and whose drains are directly or indirectly coupled with the local bit-lines.
摘要翻译：本发明的一个实施例提供一种使用跨越一对全局位线的低电压摆幅信号向存储器中的单元写入的系统。在运行期间，系统通过一对全局位线接收低电压摆幅信号，该位线太低而无法可靠地写存储单元。接下来，系统将低电压摆幅信号转换成高电压摆幅信号，这足以可靠地写入存储单元。然后，系统通过将耦合到存储器单元的一对本地位线施加高电压摆幅信号来写入存储器单元。在全局位线上使用低电压摆幅信号可以降低总体功耗。此外，在本发明的一个实施例中，使用一对交叉耦合的NMOS晶体管实现电压转换，其中源极与全局位线直接或间接耦合，并且其漏极与本地位直接或间接耦合线。

64. 发明授权

US07046017B1 Full-wave rectifier for capacitance measurements 有权
标题翻译：全波整流电容测量
公开(公告)号：US07046017B1
公开(公告)日：2006-05-16
申请号：US11216754
申请日：2005-08-30
申请人： Robert J. Drost , Ronald Ho , Ivan E. Sutherland
发明人： Robert J. Drost , Ronald Ho , Ivan E. Sutherland
IPC分类号： G01R27/26 , G01N27/22
CPC分类号： G01R27/2605
摘要： One embodiment of the present invention provides an electronic circuit and method for measuring a capacitance. A signal generating mechanism generates a signal having a predefined frequency and predefined low and high voltage levels on one terminal of the capacitance. The other terminal of the capacitance is coupled to a switching mechanism. The switching mechanism is set to couple the other terminal of the capacitance to a first amplifier or a second amplifier for a portion of each signal cycle thereby full-wave rectifying a transient current flowing between the two terminals in the capacitance. Outputs of the first amplifier and the second amplifier are coupled to a current measurement mechanism for measuring the current. The capacitance is determined from the measured current. Several variations on this embodiment are provided.
摘要翻译：本发明的一个实施例提供一种用于测量电容的电子电路和方法。信号发生机构在电容的一个端子上产生具有预定频率和预定义的低和高电压电平的信号。电容的另一个端子耦合到开关机构。开关机构被设置为将电容的另一个端子耦合到每个信号周期的一部分的第一放大器或第二放大器，由此对在电容中的两个端子之间流动的瞬态电流进行全波整流。第一放大器和第二放大器的输出耦合到用于测量电流的电流测量机构。电容由测量电流确定。提供了该实施例的几个变型。

65. 发明申请

US20060087332A1 Using an interposer to facilate capacitive communication between face-to-face chips 有权
标题翻译：使用插入器来提升面对面芯片之间的电容性通信
公开(公告)号：US20060087332A1
公开(公告)日：2006-04-27
申请号：US10973114
申请日：2004-10-22
申请人： Robert Drost , Ronald Ho , Robert Proebsting
发明人： Robert Drost , Ronald Ho , Robert Proebsting
IPC分类号： G01R31/02
CPC分类号： H01L23/48 , H01L23/49827 , H01L23/49833 , H01L23/552 , H01L24/72 , H01L24/73 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L2225/06527 , H01L2225/06541 , H01L2225/06555 , H01L2225/06562 , H01L2225/06572 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01033 , H01L2924/01082 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/19041 , H01L2924/30105
摘要： One embodiment of the present invention provides a system that improves communications between capacitively coupled integrated circuit chips. The system operates by situating an interposer over capacitive communication pads on a first integrated circuit chip, wherein the interposer is made up of material that is anisotropic with respect to transmitting capacitive signals. A second integrated circuit chip is situated so that communication pads on the second integrated circuit chip are aligned to capacitively couple signals between the integrated circuit chips through the interposer. The increased dielectric permittivity caused by the interposer can improve capacitive coupling between opposing communication pads on the integrated circuit chips. The interposer can also reduce cross talk between communication pads on the first integrated circuit chip and pads adjacent to the opposing communication pads on the second integrated circuit chip.
摘要翻译：本发明的一个实施例提供一种改善电容耦合集成电路芯片之间的通信的系统。该系统通过在第一集成电路芯片上的电容性通信焊盘上设置插入器来工作，其中插入器由相对于传输电容性信号是各向异性的材料构成。第二集成电路芯片被定位成使得第二集成电路芯片上的通信焊盘对齐以通过插入器电容耦合在集成电路芯片之间的信号。由插入器引起的增加的介电常数可以改善集成电路芯片上相对的通信焊盘之间的电容耦合。插入器还可以减少第一集成电路芯片上的通信焊盘与第二集成电路芯片上相对的通信焊盘相邻的焊盘之间的串扰。

66. 发明授权

US06987394B1 Full-wave rectifier for capacitance measurements 有权
公开(公告)号：US06987394B1
公开(公告)日：2006-01-17
申请号：US10879608
申请日：2004-06-28
申请人： Robert J. Drost , Ronald Ho , Ivan E. Sutherland
发明人： Robert J. Drost , Ronald Ho , Ivan E. Sutherland
IPC分类号： G01R27/26
CPC分类号： G01R27/2605
摘要： One embodiment of the present invention provides an electronic circuit and method for measuring a capacitance. A signal generating mechanism generates a signal having a predefined frequency and predefined low and high voltage levels on one terminal of the capacitance. The other terminal of the capacitance is coupled to a switching mechanism. The switching mechanism is set to couple the other terminal of the capacitance to a first amplifier or a second amplifier for a portion of each signal cycle thereby full-wave rectifying a transient current flowing between the two terminals in the capacitance. Outputs of the first amplifier and the second amplifier are coupled to a current measurement mechanism for measuring the current. The capacitance is determined from the measured current. Several variations on this embodiment are provided.

67. 发明申请

US20050216876A1 Method and apparatus for routing differential signals across a semiconductor chip 有权
标题翻译：用于在半导体芯片上布线差分信号的方法和装置
公开(公告)号：US20050216876A1
公开(公告)日：2005-09-29
申请号：US10810284
申请日：2004-03-26
申请人： Robert Proebsting , Ronald Ho , Robert Drost
发明人： Robert Proebsting , Ronald Ho , Robert Drost
IPC分类号： H01L23/522 , G06F17/50
CPC分类号： H01L23/5222 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： One embodiment of the present invention provides an arrangement of differential pairs of wires that carry differential signals across a semiconductor chip. In this arrangement, differential pairs of wires are organized within a set of parallel tracks on the semiconductor chip. Furthermore, differential pairs of wires are organized to be non-adjacent within the tracks. This means that each true wire is separated from its corresponding complement wire by at least one intervening wire in the set of parallel tracks, thereby reducing coupling capacitance between corresponding true and complement wires. Moreover, this arrangement may include one or more twisting structures, wherein a twisting structure twists a differential pair of wires so that the corresponding true and complement wires are interchanged within the set of parallel tracks.
摘要翻译：本发明的一个实施例提供了跨半导体芯片承载差分信号的差分导线对的布置。在这种布置中，差分对导线被组织在半导体芯片上的一组平行轨道内。此外，差分对导线被组织成在轨道内不相邻。这意味着每个真正的导线通过在该组平行轨道中的至少一个插入线与其对应的互补线分开，从而减小相应的真和互补线之间的耦合电容。此外，这种布置可以包括一个或多个扭转结构，其中扭转结构扭转差分对导线，使得相应的真和互补线在该组平行轨道内互换。

68. 发明申请

US20050094619A1 Apparatus and method for asynchronously controlling data transfers across long wires 有权
标题翻译：用于异步控制跨长导线的数据传输的装置和方法
公开(公告)号：US20050094619A1
公开(公告)日：2005-05-05
申请号：US10927285
申请日：2004-08-25
申请人： Ronald Ho , Jonathan Gainsley , Robert Drost
发明人： Ronald Ho , Jonathan Gainsley , Robert Drost
IPC分类号： H04L29/08 , G06F13/42 , H04L12/26 , H04L25/20
CPC分类号： G06F13/4286
摘要： One embodiment of the present invention provides a system that asynchronously controls the sending of data items from a sender to a receiver. The system includes a data path between the sender and the receiver, a first control path between the sender and the receiver, and a second control path between the sender and the receiver. The first control path and the second control path alternately control the asynchronous transmission of consecutive data items on the data path between the sender and the receiver.
摘要翻译：本发明的一个实施例提供了一种异步地控制从发送者到接收者的数据项的发送的系统。该系统包括发送器和接收器之间的数据路径，发送器和接收器之间的第一控制路径以及发送器和接收器之间的第二控制路径。第一控制路径和第二控制路径交替地控制发送方和接收方之间的数据路径上的连续数据项的异步传输。

69. 发明授权

US08984147B1 Velocity based content delivery 有权
标题翻译：基于速度的内容传送
公开(公告)号：US08984147B1
公开(公告)日：2015-03-17
申请号：US12106170
申请日：2008-04-18
申请人： Ehren Andrew Kret , Ronald Ho
发明人： Ehren Andrew Kret , Ronald Ho
IPC分类号： G06F15/16 , G06Q30/02 , G08G1/0968
CPC分类号： G06F3/0346 , G06F3/017 , G06F17/30867 , G06Q30/0266 , G08G1/096833
摘要： Methods, systems, and apparatuses, including computer program products, may be used for content delivery. In particular implementations, methods, systems, and apparatuses may include the ability to identify that a content item request for a user device has been received, determine a position and velocity of the user device, select a content item to provide to the user device based at least on its position and velocity, and sending the content item to the user device.
摘要翻译：包括计算机程序产品在内的方法，系统和装置可用于内容传递。在具体实现中，方法，系统和装置可以包括识别已经接收到用户设备的内容项目请求的能力，确定用户设备的位置和速度，选择要提供给基于用户设备的内容项至少在其位置和速度上，并将内容项发送到用户设备。

70. 发明授权

US08782153B2 Migrating social connections from a first profile to a second profile 有权
标题翻译：将社交连接从第一个配置文件迁移到第二个配置文件
公开(公告)号：US08782153B2
公开(公告)日：2014-07-15
申请号：US13457046
申请日：2012-04-26
申请人： Ronald Ho , Justin Sadowski , Amit Behal
发明人： Ronald Ho , Justin Sadowski , Amit Behal
IPC分类号： G06F15/16
CPC分类号： H04L67/306 , G06Q10/10 , G06Q50/01
摘要： In general, aspects of the present disclosure are directed to techniques for migrating social networking connections in a social network from one profile to another profile. A first incoming connection from a third profile in a social network to a first profile in the social network may be determined. A first outgoing connection to a fourth profile in the social network from the first profile in the social network may be determined. A second incoming connection from the third profile to a second profile may be created based at least in part on the first incoming connection. A second outgoing connection to the fourth profile from the second profile may be created based at least in part on the first outgoing connection.
摘要翻译：通常，本公开的方面涉及用于将社交网络中的社交网络连接从一个简档迁移到另一简档的技术。可以确定从社交网络中的第三简档到社交网络中的第一简档的第一传入连接。可以确定从社交网络中的第一简档到社交网络中的第四简档的第一传出连接。可以至少部分地基于第一输入连接来创建从第三简档到第二简档的第二输入连接。可以至少部分地基于第一输出连接来创建从第二简档到第四简档的第二输出连接。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式