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61. 发明授权

US09093591B2 Optoelectronic devices including heterojunction and intermediate layer 有权
公开(公告)号：US09093591B2
公开(公告)日：2015-07-28
申请号：US13451455
申请日：2012-04-19
申请人： Hui Nie , Brendan M. Kayes , Isik C. Kizilyalli
发明人： Hui Nie , Brendan M. Kayes , Isik C. Kizilyalli
IPC分类号： H01L21/04 , H01L31/0735 , H01L31/0224 , H01L31/18
摘要： Embodiments generally relate to optoelectronic semiconductor devices such as solar cells. In one aspect, a device includes an absorber layer made of gallium arsenide (GaAs) and having only one type of doping. An emitter layer is located closer than the absorber layer to a back side of the device and is made of a different material and having a higher bandgap than the absorber layer. A heterojunction is formed between the emitter layer and the absorber layer, and a p-n junction is formed between the emitter layer and the absorber layer and at least partially within the different material at a location offset from the heterojunction. An intermediate layer is located between the absorber layer and the emitter layer and provides the offset of the p-n junction from the heterojunction, and includes a graded layer and an ungraded back window layer.

62. 发明授权

US09691921B2 Textured metallic back reflector 有权
公开(公告)号：US09691921B2
公开(公告)日：2017-06-27
申请号：US12904047
申请日：2010-10-13
申请人： Harry Atwater , Brendan Kayes , Isik C. Kizilyalli , Hui Nie
发明人： Harry Atwater , Brendan Kayes , Isik C. Kizilyalli , Hui Nie
IPC分类号： H01L31/00 , H01L21/00 , H01L31/0232 , H01L31/056 , H01L31/0304 , H01L31/0236 , H01L31/18 , H01L31/20 , H01L31/0693
CPC分类号： H01L31/02327 , H01L31/0236 , H01L31/02366 , H01L31/0304 , H01L31/03046 , H01L31/056 , H01L31/0693 , H01L31/18 , H01L31/184 , H01L31/1844 , H01L31/1852 , H01L31/208 , Y02E10/50 , Y02E10/52 , Y02E10/544
摘要： Embodiments of the invention generally relate to device fabrication of thin films used as solar devices or other electronic devices, and include textured back reflectors utilized in solar applications. In one embodiment, a method for forming a textured metallic back reflector which includes depositing a metallic layer on a gallium arsenide material within a thin film stack, forming an array of metallic islands from the metallic layer during an annealing process, removing or etching material from the gallium arsenide material to form apertures between the metallic islands, and depositing a metallic reflector layer to fill the apertures and cover the metallic islands. In another embodiment, a textured metallic back reflector includes an array of metallic islands disposed on a gallium arsenide material, a plurality of apertures disposed between the metallic islands and extending into the gallium arsenide material, a metallic reflector layer disposed over the metallic islands, and a plurality of reflector protrusions formed between the metallic islands and extending from the metallic reflector layer and into the apertures formed in the gallium arsenide material.

63. 发明授权

US09178099B2 Methods for forming optoelectronic devices including heterojunction 有权
标题翻译：用于形成包括异质结的光电器件的方法
公开(公告)号：US09178099B2
公开(公告)日：2015-11-03
申请号：US13451439
申请日：2012-04-19
申请人： Hui Nie , Brendan M. Kayes , Isik C. Kizilyalli
发明人： Hui Nie , Brendan M. Kayes , Isik C. Kizilyalli
IPC分类号： H01L31/0304 , H01L31/0735 , H01L31/0224 , H01L31/18
CPC分类号： H01L31/0735 , H01L31/022441 , H01L31/1896 , Y02E10/52 , Y02E10/544
摘要： Embodiments generally relate to optoelectronic semiconductor devices such as photovoltaic cells. In one aspect, a method for forming a device includes forming an absorber layer made of gallium arsenide (GaAs) and having one type of doping, and forming an emitter layer made of a different material and having a higher bandgap than the absorber layer. An intermediate layer can be formed between emitter and absorber layers. A heterojunction and p-n junction are formed between the emitter layer and the absorber layer, where the p-n junction is formed at least partially within the different material at a location offset from the heterojunction. A majority of the absorber layer can be outside of a depletion region formed by the p-n junction. The p-n junction causes a voltage to be generated in the cell in response to the cell being exposed to light at a front side.
摘要翻译：实施例通常涉及诸如光伏电池的光电半导体器件。一方面，用于形成器件的方法包括形成由砷化镓（GaAs）制成并具有一种类型的掺杂的吸收层，并形成由不同材料制成并具有比吸收层更高的带隙的发射极层。可以在发射极和吸收层之间形成中间层。在发射极层和吸收层之间形成异质结和p-n结，其中在与异质结偏离的位置处至少部分地在不同的材料内形成p-n结。吸收层的大部分可以在由p-n结形成的耗尽区的外部。 p-n结导致电池响应于电池暴露于正面的光而产生电压。

64. 发明授权

US09082919B2 Methods for forming optoelectronic devices including heterojunction 有权
公开(公告)号：US09082919B2
公开(公告)日：2015-07-14
申请号：US13451439
申请日：2012-04-19
申请人： Hui Nie , Brendan M. Kayes , Isik C. Kizilyalli
发明人： Hui Nie , Brendan M. Kayes , Isik C. Kizilyalli
IPC分类号： H01L31/0304 , H01L31/0735 , H01L31/0224 , H01L31/18
摘要： Embodiments generally relate to optoelectronic semiconductor devices such as photovoltaic cells. In one aspect, a method for forming a device includes forming an absorber layer made of gallium arsenide (GaAs) and having one type of doping, and forming an emitter layer made of a different material and having a higher bandgap than the absorber layer. An intermediate layer can be formed between emitter and absorber layers. A heterojunction and p-n junction are formed between the emitter layer and the absorber layer, where the p-n junction is formed at least partially within the different material at a location offset from the heterojunction. A majority of the absorber layer can be outside of a depletion region formed by the p-n junction. The p-n junction causes a voltage to be generated in the cell in response to the cell being exposed to light at a front side.

65. 发明授权

US09048366B2 Methods for forming optoelectronic devices including heterojunction 有权
公开(公告)号：US09048366B2
公开(公告)日：2015-06-02
申请号：US13451439
申请日：2012-04-19
申请人： Hui Nie , Brendan M. Kayes , Isik C. Kizilyalli
发明人： Hui Nie , Brendan M. Kayes , Isik C. Kizilyalli
IPC分类号： H01L31/0304 , H01L31/0735 , H01L31/0224 , H01L31/18
摘要： Embodiments generally relate to optoelectronic semiconductor devices such as photovoltaic cells. In one aspect, a method for forming a device includes forming an absorber layer made of gallium arsenide (GaAs) and having one type of doping, and forming an emitter layer made of a different material and having a higher bandgap than the absorber layer. An intermediate layer can be formed between emitter and absorber layers. A heterojunction and p-n junction are formed between the emitter layer and the absorber layer, where the p-n junction is formed at least partially within the different material at a location offset from the heterojunction. A majority of the absorber layer can be outside of a depletion region formed by the p-n junction. The p-n junction causes a voltage to be generated in the cell in response to the cell being exposed to light at a front side.

66. 发明申请

US20120248577A1 Controlled Doping in III-V Materials 审中-公开
标题翻译： III-V材料中的控制掺杂
公开(公告)号：US20120248577A1
公开(公告)日：2012-10-04
申请号：US13079710
申请日：2011-04-04
申请人： Linda T. Romano , David P. Bour , Isik C. Kizilyalli , Hui Nie , Thomas R. Prunty
发明人： Linda T. Romano , David P. Bour , Isik C. Kizilyalli , Hui Nie , Thomas R. Prunty
IPC分类号： H01L21/205 , H01L29/20
CPC分类号： H01L21/02576 , H01L21/02378 , H01L21/0242 , H01L21/02458 , H01L21/02507 , H01L21/0254 , H01L21/02579 , H01L21/0262 , H01L29/157 , H01L29/2003 , H01L29/207 , H01L29/66462 , H01L29/7787 , H01L29/872 , H01S5/305 , H01S5/32341
摘要： A method according to embodiments of the invention includes epitaxially growing a III-nitride semiconductor layer from a gas containing gallium, a gas containing nitrogen, and a gas containing indium. The concentration of indium in the III-nitride semiconductor structure is greater than zero and less than 1020 cm−3. A structure according to embodiments of the invention includes a super lattice of alternating first and second III-nitride layers. The first layers are more highly doped than the second layers. The average dopant concentration in the super lattice is less than 1020 cm−3.
摘要翻译：根据本发明的实施方案的方法包括从含镓的气体，含氮气体和含铟气体外延生长III族氮化物半导体层。 III族氮化物半导体结构中铟的浓度大于零且小于1020cm-3。根据本发明的实施例的结构包括交替的第一和第二III族氮化物层的超晶格。第一层比第二层更高掺杂。超晶格中的平均掺杂剂浓度小于1020cm-3。

67. 发明授权

US08969994B2 Method of fabricating a gallium nitride merged P-i-N Schottky (MPS) diode by regrowth and etch back 有权
标题翻译：通过再生长和回蚀刻制造氮化镓合并的P-i-N肖特基（MPS）二极管的方法
公开(公告)号：US08969994B2
公开(公告)日：2015-03-03
申请号：US13585121
申请日：2012-08-14
申请人： Madhan M. Raj , Brian Alvarez , David P. Bour , Andrew P. Edwards , Hui Nie , Isik C. Kizilyalli
发明人： Madhan M. Raj , Brian Alvarez , David P. Bour , Andrew P. Edwards , Hui Nie , Isik C. Kizilyalli
IPC分类号： H01L29/47 , H01L29/15 , H01L29/861 , H01L21/36
CPC分类号： H01L29/66143 , H01L21/0254 , H01L21/02664 , H01L29/0619 , H01L29/2003 , H01L29/66121 , H01L29/66212 , H01L29/872
摘要： An MPS diode includes a III-nitride substrate characterized by a first conductivity type and a first dopant concentration and having a first side and a second side. The MPS diode also includes a III-nitride epitaxial structure comprising a first III-nitride epitaxial layer coupled to the first side of the substrate, wherein a region of the first III-nitride epitaxial layer comprises an array of protrusions. The III-nitride epitaxial structure also includes a plurality of III-nitride regions of a second conductivity type, each partially disposed between adjacent protrusions. Each of the plurality of III-nitride regions of the second conductivity type comprises a first section laterally positioned between adjacent protrusions and a second section extending in a direction normal to the first side of the substrate. The MPS diode further includes a first metallic structure electrically coupled to one or more of the protrusions and to one or more of the second sections.
摘要翻译： MPS二极管包括以第一导电类型和第一掺杂剂浓度为特征的III族氮化物衬底，其具有第一侧和第二侧。 MPS二极管还包括III族氮化物外延结构，其包括耦合到衬底的第一侧的第一III族氮化物外延层，其中第一III族氮化物外延层的区域包括突起阵列。 III族氮化物外延结构还包括多个第二导电类型的III族氮化物区域，每个部分设置在相邻的突起之间。第二导电类型的多个III族氮化物区域中的每一个包括横向位于相邻突起之间的第一部分和沿着垂直于衬底的第一侧的方向延伸的第二部分。 MPS二极管还包括电耦合到一个或多个突起和一个或多个第二部分的第一金属结构。

68. 发明申请

US20140048902A1 METHOD OF FABRICATING A GALLIUM NITRIDE MERGED P-I-N SCHOTTKY (MPS) DIODE BY REGROWTH AND ETCH BACK 有权
标题翻译：通过调整和回填制备氮化镓合并的P-I-N肖特基（MPS）二极体的方法
公开(公告)号：US20140048902A1
公开(公告)日：2014-02-20
申请号：US13585121
申请日：2012-08-14
申请人： Madhan M. Raj , Brian Alvarez , David P. Bour , Andrew P. Edward , Hui Nie , Isik C. Kizilyalli
发明人： Madhan M. Raj , Brian Alvarez , David P. Bour , Andrew P. Edward , Hui Nie , Isik C. Kizilyalli
IPC分类号： H01L21/329 , H01L29/872
CPC分类号： H01L29/66143 , H01L21/0254 , H01L21/02664 , H01L29/0619 , H01L29/2003 , H01L29/66121 , H01L29/66212 , H01L29/872
摘要： An MPS diode includes a III-nitride substrate characterized by a first conductivity type and a first dopant concentration and having a first side and a second side. The MPS diode also includes a III-nitride epitaxial structure comprising a first III-nitride epitaxial layer coupled to the first side of the substrate, wherein a region of the first III-nitride epitaxial layer comprises an array of protrusions. The III-nitride epitaxial structure also includes a plurality of III-nitride regions of a second conductivity type, each partially disposed between adjacent protrusions. Each of the plurality of III-nitride regions of the second conductivity type comprises a first section laterally positioned between adjacent protrusions and a second section extending in a direction normal to the first side of the substrate. The MPS diode further includes a first metallic structure electrically coupled to one or more of the protrusions and to one or more of the second sections.
摘要翻译： MPS二极管包括以第一导电类型和第一掺杂剂浓度为特征的III族氮化物衬底，其具有第一侧和第二侧。 MPS二极管还包括III族氮化物外延结构，其包括耦合到衬底的第一侧的第一III族氮化物外延层，其中第一III族氮化物外延层的区域包括突起阵列。 III族氮化物外延结构还包括多个第二导电类型的III族氮化物区域，每个部分设置在相邻的突起之间。第二导电类型的多个III族氮化物区域中的每一个包括横向位于相邻突起之间的第一部分和沿着垂直于衬底的第一侧的方向延伸的第二部分。 MPS二极管还包括电耦合到一个或多个突起和一个或多个第二部分的第一金属结构。

69. 发明授权

US09136418B2 Optoelectronic devices including heterojunction and intermediate layer 有权
标题翻译：包括异质结和中间层的光电器件
公开(公告)号：US09136418B2
公开(公告)日：2015-09-15
申请号：US13451455
申请日：2012-04-19
申请人： Hui Nie , Brendan M. Kayes , Isik C. Kizilyalli
发明人： Hui Nie , Brendan M. Kayes , Isik C. Kizilyalli
IPC分类号： H01L21/04 , H01L31/0735 , H01L31/0224 , H01L31/18
CPC分类号： H01L31/0735 , H01L31/022441 , H01L31/1896 , Y02E10/52 , Y02E10/544
摘要： Embodiments generally relate to optoelectronic semiconductor devices such as solar cells. In one aspect, a device includes an absorber layer made of gallium arsenide (GaAs) and having only one type of doping. An emitter layer is located closer than the absorber layer to a back side of the device and is made of a different material and having a higher bandgap than the absorber layer. A heterojunction is formed between the emitter layer and the absorber layer, and a p-n junction is formed between the emitter layer and the absorber layer and at least partially within the different material at a location offset from the heterojunction. An intermediate layer is located between the absorber layer and the emitter layer and provides the offset of the p-n junction from the heterojunction, and includes a graded layer and an ungraded back window layer.
摘要翻译：实施例通常涉及诸如太阳能电池的光电半导体器件。在一个方面，器件包括由砷化镓（GaAs）制成并且仅具有一种掺杂类型的吸收层。发射极层位于比器件的背面靠近吸收体层，并且由不同的材料制成并具有比吸收层更高的带隙。在发射极层和吸收层之间形成异质结，并且在偏离异质结的位置处，在发射极层和吸收层之间形成p-n结，并且至少部分地在不同的材料内形成p-n结。中间层位于吸收层和发射极层之间，并且提供p-n结与异质结的偏移，并且包括渐变层和未分级的后窗层。

70. 发明授权

US09136417B2 Methods for forming optoelectronic devices including heterojunction 有权
公开(公告)号：US09136417B2
公开(公告)日：2015-09-15
申请号：US13451439
申请日：2012-04-19
申请人： Hui Nie , Brendan M. Kayes , Isik C. Kizilyalli
发明人： Hui Nie , Brendan M. Kayes , Isik C. Kizilyalli
IPC分类号： H01L31/0304 , H01L31/0735 , H01L31/0224 , H01L31/18
摘要： Embodiments generally relate to optoelectronic semiconductor devices such as photovoltaic cells. In one aspect, a method for forming a device includes forming an absorber layer made of gallium arsenide (GaAs) and having one type of doping, and forming an emitter layer made of a different material and having a higher bandgap than the absorber layer. An intermediate layer can be formed between emitter and absorber layers. A heterojunction and p-n junction are formed between the emitter layer and the absorber layer, where the p-n junction is formed at least partially within the different material at a location offset from the heterojunction. A majority of the absorber layer can be outside of a depletion region formed by the p-n junction. The p-n junction causes a voltage to be generated in the cell in response to the cell being exposed to light at a front side.

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