专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

61. 发明授权

US07521304B1 Method for forming integrated circuit 失效
标题翻译：集成电路形成方法
公开(公告)号：US07521304B1
公开(公告)日：2009-04-21
申请号：US10230775
申请日：2002-08-29
申请人： Richard J. Huang , Scott A. Bell , Srikanteswara Dakshina-Murthy , Philip A. Fisher , Richard C. Nguyen , Cyrus E. Tabery , Lu You
发明人： Richard J. Huang , Scott A. Bell , Srikanteswara Dakshina-Murthy , Philip A. Fisher , Richard C. Nguyen , Cyrus E. Tabery , Lu You
IPC分类号： H01L21/336
CPC分类号： H01L21/28123 , H01L21/0332 , H01L21/28035 , H01L21/32139 , H01L2924/0002 , H01L2924/00
摘要： A method of forming an integrated circuit includes providing a buffer layer comprising a dielectric material above a layer of conductive material and providing a layer of mask material above the buffer layer. The mask material comprises amorphous carbon. The method also includes removing a portion of the buffer layer and the layer of mask material to form a mask. A feature is formed in the layer of conductive material according to the mask.
摘要翻译：形成集成电路的方法包括在导电材料层之上提供包括电介质材料的缓冲层，并在缓冲层上方提供一层掩模材料。掩模材料包括无定形碳。该方法还包括去除缓冲层的一部分和掩模材料层以形成掩模。根据掩模在导电材料层中形成特征。

62. 发明授权

US07285499B1 Polymer spacers for creating sub-lithographic spaces 有权
标题翻译：用于产生亚光刻空间的聚合物间隔物
公开(公告)号：US07285499B1
公开(公告)日：2007-10-23
申请号：US11127175
申请日：2005-05-12
申请人： Scott A. Bell , Phillip Lawrence Jones , Angela T. Hui
发明人： Scott A. Bell , Phillip Lawrence Jones , Angela T. Hui
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/76802
摘要： A method includes forming a group of first structures on a semiconductor device and forming spacers adjacent side surfaces of each of the first structures to form a group of second structures. The method further includes using the group of second structures to form at least one sub-lithographic opening in a material layer located below the group of second structures.
摘要翻译：一种方法包括在半导体器件上形成一组第一结构，并且在每个第一结构的邻近侧面上形成间隔物以形成一组第二结构。该方法还包括使用该组第二结构在位于第二结构组下面的材料层中形成至少一个亚光刻开口。

63. 发明授权

US06900002B1 Antireflective bi-layer hardmask including a densified amorphous carbon layer 有权
标题翻译：包括致密非晶碳层的抗反射双层硬掩模
公开(公告)号：US06900002B1
公开(公告)日：2005-05-31
申请号：US10299427
申请日：2002-11-19
申请人： Marina V. Plat , Marilyn I. Wright , Lu You , Scott A. Bell
发明人： Marina V. Plat , Marilyn I. Wright , Lu You , Scott A. Bell
IPC分类号： G03F7/00 , G03F7/09 , H01L21/027 , H01L21/3105 , H01L21/3213
CPC分类号： H01L21/32139 , G03F7/091 , H01L21/0276 , H01L21/31058
摘要： An amorphous carbon layer of an antireflective bi-layer hardmask is processed to increase its density prior to patterning of an underlying polysilicon layer using the bi-layer hardmask. The increased density of the layer increases its resistance to polysilicon etch chemistry, thus reducing the likelihood of patterning inaccuracies resulting from amorphous carbon depletion during polysilicon etch, and enabling the patterning of thicker polysilicon layers than can be reliably patterned without densification. The increased density also reduces stresses, thus reducing the likelihood of delamination. Densification may be performed by UV or e-beam irradiation after formation of an overlying protective layer. Densification may also be performed by annealing the amorphous carbon layer in situ prior to formation of the overlying protective layer. In the latter case, annealing reduces the amount of outgassing that occurs during formation of the protective layer, thus reducing the formation of pin holes.
摘要翻译：在使用双层硬掩模对下面的多晶硅层进行图案化之前，处理抗反射双层硬掩模的无定形碳层以增加其密度。层的增加的密度增加了其对多晶硅蚀刻化学性质的抵抗力，从而降低了在多晶硅蚀刻期间由无定形碳耗尽导致的不准确图案的可能性，并且使得能够在不致密化的情况下可靠地图案化更厚的多晶硅层的图案化。增加的密度也降低了应力，从而降低了分层的可能性。在形成上覆保护层之后，可以通过UV或电子束照射进行致密化。还可以通过在形成上覆保护层之前将非晶碳层原位退火来进行致密化。在后一种情况下，退火减少了在形成保护层期间发生的除气量，从而减少了针孔的形成。

64. 发明授权

US5885902A Integrated arc and polysilicon etching process 失效
标题翻译：集成电弧和多晶硅蚀刻工艺
公开(公告)号：US5885902A
公开(公告)日：1999-03-23
申请号：US964855
申请日：1997-11-05
申请人： Tom Blasingame , Subash Gupta , Scott A. Bell
发明人： Tom Blasingame , Subash Gupta , Scott A. Bell
IPC分类号： H01L21/027 , H01L21/311 , H01L21/3213 , H01L21/00
CPC分类号： H01L21/32139 , H01L21/0276 , H01L21/31138 , H01L21/32137 , Y10S438/95 , Y10S438/952
摘要： A composite of an anti-reflective coating on polysilicon is accurately etched to form a polysilicon pattern by initially etching the ARC with gaseous plasma containing helium and/or nitrogen which is substantially inert with respect to polysilicon.
摘要翻译：通过用包含氦和/或氮的气体等离子体蚀刻ARC，对多晶硅基本上是惰性的，对多晶硅上的抗反射涂层的复合物进行精确蚀刻以形成多晶硅图案以形成多晶硅图案。

65. 发明授权

US5763327A Integrated arc and polysilicon etching process 失效
公开(公告)号：US5763327A
公开(公告)日：1998-06-09
申请号：US554413
申请日：1995-11-08
申请人： Tom Blasingame , Subash Gupta , Scott A. Bell
发明人： Tom Blasingame , Subash Gupta , Scott A. Bell
IPC分类号： H01L21/027 , H01L21/311 , H01L21/3213 , B44C1/22
CPC分类号： H01L21/32139 , H01L21/0276 , H01L21/31138 , H01L21/32137 , Y10S438/95 , Y10S438/952
摘要： A composite of an anti-reflective coating on polysilicon is accurately etched to form a polysilicon pattern by initially etching the ARC with gaseous plasma containing helium and/or nitrogen which is substantially inert with respect to polysilicon.

66. 发明申请

US20080142873A1 INTEGRATED CIRCUIT SYSTEM WITH METAL AND SEMI-CONDUCTING GATE 有权
标题翻译：具有金属和半导体门的集成电路系统
公开(公告)号：US20080142873A1
公开(公告)日：2008-06-19
申请号：US11611856
申请日：2006-12-16
申请人： Angela T. Hui , Mark S. Chang , Kuo-Tung Chang , Scott A. Bell
发明人： Angela T. Hui , Mark S. Chang , Kuo-Tung Chang , Scott A. Bell
IPC分类号： H01L29/792 , H01L21/28
CPC分类号： H01L27/115 , H01L27/11568
摘要： A method for forming an integrated circuit system is provided including forming a semi-conducting layer over a substrate, forming a spacer stack having a gap filler adjacent to the semi-conducting layer and a inter-layer dielectric over the gap filler, forming a transition layer having a recess over the semi-conducting layer and adjacent to the spacer stack, and forming a metal layer in the recess.
摘要翻译：提供了一种用于形成集成电路系统的方法，包括在衬底上形成半导电层，形成间隔层叠层，其间隔填充物与半导体层相邻，间隙填料上形成层间电介质，形成过渡层该层在半导体层上具有凹陷并且与间隔物堆叠相邻，并且在凹部中形成金属层。

67. 发明授权

US07084071B1 Use of multilayer amorphous carbon ARC stack to eliminate line warpage phenomenon 失效
标题翻译：使用多层非晶碳ARC叠层消除线翘曲现象
公开(公告)号：US07084071B1
公开(公告)日：2006-08-01
申请号：US10244650
申请日：2002-09-16
申请人： Srikanteswara Dakshina-Murthy , Scott A. Bell , Richard J. Huang , Richard C. Nguyen , Cyrus E. Tabery
发明人： Srikanteswara Dakshina-Murthy , Scott A. Bell , Richard J. Huang , Richard C. Nguyen , Cyrus E. Tabery
IPC分类号： H01L21/461 , H01L21/302
CPC分类号： H01L21/32139 , H01L21/823828
摘要： A method of producing an integrated circuit includes providing a layer of polysilicon material above a semiconductor substrate and providing an amorphous carbon layer over the polysilicon material layer. The amorphous carbon layer comprises at least one undoped amorphous carbon layer and at least one doped amorphous carbon layer. A portion of the amorphous carbon layer is removed to form a hard mask, and the polysilicon material layer is etched according to the hard mask to form a line of polysilicon material.
摘要翻译：制造集成电路的方法包括在半导体衬底上提供多晶硅材料层，并在多晶硅材料层上提供无定形碳层。无定形碳层包括至少一个未掺杂的无定形碳层和至少一个掺杂的无定形碳层。去除非晶碳层的一部分以形成硬掩模，并且根据硬掩模蚀刻多晶硅材料层以形成多晶硅材料线。

68. 发明授权

US07077291B1 Package assembly with foamed topping 失效
标题翻译：包装组装与泡沫顶部
公开(公告)号：US07077291B1
公开(公告)日：2006-07-18
申请号：US10407786
申请日：2003-04-07
申请人： Scott A. Bell , James E. Hawes
发明人： Scott A. Bell , James E. Hawes
IPC分类号： B65D47/04
CPC分类号： B65D51/2828 , B65D85/73
摘要： The present invention provides a package assembly that incorporates a foamable topping under pressure and provides the consumer with a fresh, foamed topping when the package is opened. In one version, the topping material is carried under pressure on top of the liquid contents of the package, and foams when the package is opened. In other versions the topping is carried within the cap or cover of the package, and is selectively dispensed by the consumer after the package has been opened.
摘要翻译：本发明提供了一种包装组件，其在压力下结合有可起泡的顶部，并且当包装打开时向消费者提供新鲜的起泡顶部。在一个版本中，顶部材料在压力下承载在包装的液体内容物的顶部，并且当包装打开时发泡。在其他形式中，顶部装载在包装的盖子或盖子内，并且在包装被打开之后由消费者选择性地分配。

69. 发明授权

US06884733B1 Use of amorphous carbon hard mask for gate patterning to eliminate requirement of poly re-oxidation 有权
标题翻译：使用无定形碳硬掩模进行栅极图案化，以消除多重再氧化的需要
公开(公告)号：US06884733B1
公开(公告)日：2005-04-26
申请号：US10215173
申请日：2002-08-08
申请人： Srikanteswara Dakshina-Murthy , Scott A. Bell , David E. Brown , Philip A. Fisher
发明人： Srikanteswara Dakshina-Murthy , Scott A. Bell , David E. Brown , Philip A. Fisher
IPC分类号： H01L21/033 , H01L21/28 , H01L21/3213 , H01L21/302
CPC分类号： H01L21/32139 , H01L21/0332 , H01L21/0337 , H01L21/28123
摘要： A method of producing an integrated circuit eliminates the need to re-oxidize polysilicon gate conductors and lines prior to removal of a hard mask used to form the gate conductors. A layer of polysilicon is provided above a semiconductor substrate. The layer of polysilicon is then doped. A mask material comprising amorphous carbon is provided above the layer of polysilicon, and the layer of mask material is patterned to form a mask. A portion of the layer of polysilicon is removed according to the mask, and the mask is removed.
摘要翻译：制造集成电路的方法消除了在去除用于形成栅极导体的硬掩模之前再次氧化多晶硅栅极导体和线的需要。在半导体衬底之上设置多晶硅层。然后掺杂多晶硅层。包含无定形碳的掩模材料设置在多晶硅层上方，并且掩模材料层被图案化以形成掩模。根据掩模去除多晶硅层的一部分，并且去除掩模。

70. 发明授权

US06620717B1 Memory with disposable ARC for wordline formation 失效
标题翻译：具有一次性ARC用于字线形成的记忆
公开(公告)号：US06620717B1
公开(公告)日：2003-09-16
申请号：US10100487
申请日：2002-03-14
申请人： Tazrien Kamal , Scott A. Bell , Kouros Ghandehari , Mark T. Ramsbey , Jeffrey A. Shields , Jean Y. Yang
发明人： Tazrien Kamal , Scott A. Bell , Kouros Ghandehari , Mark T. Ramsbey , Jeffrey A. Shields , Jean Y. Yang
IPC分类号： H01L213205
CPC分类号： H01L27/11568 , H01L21/32139 , H01L27/115
摘要： A method of manufacturing for a Flash memory includes depositing a charge-trapping material over a semiconductor substrate and implanting first and second bitlines. A wordline material is deposited over the charge-trapping dielectric material and a hard mask material deposited. A disposable anti-reflective coating (ARC) material and a photoresist material are deposited followed by processing to form a patterned photoresist material and a patterned ARC material. The hard mask material is processed to form a patterned hard mask material. The patterned photoresist is removed and then the patterned ARC without damaging the patterned hard mask material or the wordline material. The wordline material is processed using the patterned hard mask material to form a wordline and the patterned hard mask material is removed without damaging the wordline or the charge-trapping dielectric material.
摘要翻译：一种用于闪速存储器的制造方法包括在半导体衬底上沉积电荷捕获材料并植入第一和第二位线。字线材料沉积在电荷捕获电介质材料上并沉积硬掩模材料。沉积一次性抗反射涂层（ARC）材料和光致抗蚀剂材料，然后进行处理以形成图案化的光致抗蚀剂材料和图案化的ARC材料。加工硬掩模材料以形成图案化的硬掩模材料。去除图案化的光致抗蚀剂，然后去除图案化的ARC，而不损坏图案化的硬掩模材料或字线材料。使用图案化的硬掩模材料处理字线材料以形成字线，并且去除图案化的硬掩模材料而不损坏字线或电荷捕获电介质材料。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式