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61. 发明授权

US10527786B2 Polymer modulator and laser integrated on a common platform and method 有权
公开(公告)号：US10527786B2
公开(公告)日：2020-01-07
申请号：US15692080
申请日：2017-08-31
申请人： Frederick J Leonberger , Michael Lebby , Richard Becker
发明人： Frederick J Leonberger , Michael Lebby , Richard Becker
IPC分类号： G02B6/12 , G02B6/02 , G02B6/293 , H01S5/026 , H01S5/10
摘要： A monolithic photonic integrated circuit includes a platform, a monolithic laser formed in/on the platform, and an electro-optic polymer modulator monolithically built onto the platform and optically coupled to the monolithic laser. The polymer modulator is optically coupled to the monolithic laser by waveguides including electro-optic polymer waveguides. The electro-optic polymer modulator and the electro-optic polymer waveguides including an electro-optic polymer core and top and bottom electro-optic polymer cladding layers. The electro-optic polymer core having an electro-optic coefficient (r33) greater than 250 pm/v, and a Tg 150° C. to 200° C., and the top and bottom electro-optic polymer cladding layers having a Tg approximately the same as the Tg of the electro-optic polymer core.

62. 发明授权

US07821066B2 Multilayered BOX in FDSOI MOSFETS 有权
标题翻译： FDSOI MOSFET中的多层BOX
公开(公告)号：US07821066B2
公开(公告)日：2010-10-26
申请号：US11635895
申请日：2006-12-08
申请人： Michael Lebby , Vijit Sabnis , Petar B. Atanackovic
发明人： Michael Lebby , Vijit Sabnis , Petar B. Atanackovic
IPC分类号： H01L27/01 , H01L27/12 , H01L31/0392
CPC分类号： H01L29/78603 , H01L29/78654
摘要： A fully depleted MOSFET has a semiconductor-on-insulator substrate that includes a substrate material, a BOX positioned on the substrate material, and an active layer positioned on the BOX. The BOX includes a first layer of material with a first dielectric constant and a first thickness and a second layer of material having a second dielectric constant different than the first dielectric constant and a second thickness different than the first thickness. The first layer of material is positioned adjacent the substrate material and the second layer of material is positioned adjacent the active layer. Drain and source regions are formed in the active layer so as to be fully depleted. The drain and source regions are separated by a channel region in the active layer. A gate insulating layer overlies the channel region and a gate stack is positioned on the gate insulating region. It is anticipated that the structure is most useful for channel regions less than 90 nm long.
摘要翻译：完全耗尽的MOSFET具有绝缘体上半导体衬底，其包括衬底材料，位于衬底材料上的BOX和位于BOX上的有源层。 BOX包括具有第一介电常数和第一厚度的第一材料层和具有不同于第一介电常数的第二介电常数和不同于第一厚度的第二厚度的第二材料层。第一层材料位于邻近衬底材料的位置，第二层材料位于活性层附近。在有源层中形成漏区和源极区，以便完全耗尽。漏极和源极区域由有源层中的沟道区域分开。栅极绝缘层覆盖沟道区域，栅极叠层位于栅极绝缘区域上。预期该结构对于小于90nm长的通道区域是最有用的。

63. 发明授权

US07538016B2 Signal and/or ground planes with double buried insulator layers and fabrication process 有权
标题翻译：具有双埋层绝缘体层和制造工艺的信号和/或接地层
公开(公告)号：US07538016B2
公开(公告)日：2009-05-26
申请号：US11961938
申请日：2007-12-20
申请人： Petar B. Atanakovic , Michael Lebby
发明人： Petar B. Atanakovic , Michael Lebby
IPC分类号： H01L21/20 , H01L21/44 , H01L23/48
CPC分类号： H01L29/78603 , H01L21/28518 , H01L21/3105 , H01L21/743 , H01L23/535 , H01L29/66772 , H01L29/7842 , H01L29/78645 , H01L29/78654 , H01L2924/0002 , H01L2924/00
摘要： The present invention describes a method including the steps of providing a single crystal semiconductor substrate, forming a layer of rare earth silicide on a surface of the semiconductor substrate, forming a first layer of insulating material on the layer of rare earth silicide, forming a layer of electrically conductive material on the first layer of insulating material, and forming a second layer of insulating material on the layer of electrically conductive material. In one embodiment the step of forming the layer of rare earth silicide includes depositing a layer of rare earth metal on a surface of the semiconductor substrate depositing a layer of insulating material on the layer of rare earth metal, and annealing the structure to form a layer of rare earth silicide in conjunction with the surface of the semiconductor substrate and a rare earth doped insulating layer in conjunction with the layer of insulating material.
摘要翻译：本发明描述了一种方法，包括以下步骤：提供单晶半导体衬底，在半导体衬底的表面上形成稀土硅化物层，在稀土硅化物层上形成第一绝缘材料层，形成层的第一绝缘材料层上的导电材料，并且在导电材料层上形成第二层绝缘材料。在一个实施方案中，形成稀土硅化物层的步骤包括在半导体衬底的表面上沉积稀土金属层，在稀土金属层上沉积绝缘材料层，并退火该结构以形成层的稀土硅化物与半导体衬底的表面以及与绝缘材料层结合的稀土掺杂绝缘层。

64. 发明授权

US07365357B2 Strain inducing multi-layer cap 有权
标题翻译：应变诱导多层帽
公开(公告)号：US07365357B2
公开(公告)日：2008-04-29
申请号：US11187213
申请日：2005-07-22
申请人： Petar B. Atanackovic , Michael Lebby
发明人： Petar B. Atanackovic , Michael Lebby
IPC分类号： H01L29/06
CPC分类号： H01L21/823807 , H01L21/768 , H01L21/76832 , H01L29/7843
摘要： A strained transistor includes a silicon transistor, an encapsulating layer of silicon insulating material with an outer surface, and a stress inducing multilayer cap deposited on the outer surface of the encapsulating layer with at least two layers including a layer of rare earth oxide and a layer including silicon. The stress inducing cap can be designed to provide either compressive strain or tensile strain and virtually any desired amount of strain without producing dislocations, defects, and fractures in the structure.
摘要翻译：应变晶体管包括硅晶体管，具有外表面的硅绝缘材料的封装层和沉积在包封层的外表面上的应力诱导多层盖，所述至少两层包括稀土氧化物层和层包括硅。应力诱导帽可以设计成提供压缩应变或拉伸应变和实际上任何所需量的应变，而不会在结构中产生位错，缺陷和断裂。

65. 发明申请

US20070018166A1 Stacked transistors and process 失效
标题翻译：堆叠晶体管和工艺
公开(公告)号：US20070018166A1
公开(公告)日：2007-01-25
申请号：US11188081
申请日：2005-07-22
申请人： Petar Atanackovic , Michael Lebby
发明人： Petar Atanackovic , Michael Lebby
IPC分类号： H01L29/04
CPC分类号： H01L21/8221 , H01L21/823807 , H01L21/823878 , H01L21/84 , H01L27/0688 , H01L27/1203
摘要： A method of horizontally stacking transistors on a common semiconductor substrate is initiated by providing a single crystal, generally silicon, semiconductor substrate. A plurality of transistors are formed on the single crystal semiconductor substrate and encapsulated in an insulating layer, such as silicon dioxide. One or more openings are formed through the insulating layer between the plurality of transistors so as to expose a surface of the single crystal semiconductor substrate. A layer of single crystal rare earth insulator material is epitaxially grown on the exposed surface of the single crystal semiconductor substrate. A layer of single crystal semiconductor material, generally silicon, is epitaxially grown on the layer of single crystal rare earth insulator material. An intermixed transistor is formed on the layer of single crystal semiconductor material.
摘要翻译：在公共半导体衬底上水平堆叠晶体管的方法是通过提供单晶体，一般为硅的半导体衬底来启动的。在单晶半导体基板上形成多个晶体管，并封装在二氧化硅等绝缘层中。通过多个晶体管之间的绝缘层形成一个或多个开口，以暴露单晶半导体衬底的表面。在单晶半导体衬底的暴露表面上外延生长单晶稀土绝缘体材料层。在单晶稀土绝缘体材料层上外延生长单层半导体材料（通常为硅）层。在单晶半导体材料层上形成混合晶体管。

66. 发明申请

US20190064436A1 POLYMER MODULATOR AND LASER INTEGRATED ON A COMMON PLATFORM AND METHOD 审中-公开
公开(公告)号：US20190064436A1
公开(公告)日：2019-02-28
申请号：US15692080
申请日：2017-08-31
申请人： Frederick J Leonberger , Michael Lebby , Richard Becker
发明人： Frederick J Leonberger , Michael Lebby , Richard Becker
IPC分类号： G02B6/12 , G02B6/02 , G02B6/293
摘要： A monolithic photonic integrated circuit includes a platform, a monolithic laser formed in/on the platform, and an electro-optic polymer modulator monolithically built onto the platform and optically coupled to the monolithic laser. The polymer modulator is optically coupled to the monolithic laser by waveguides including electro-optic polymer waveguides. The electro-optic polymer modulator and the electro-optic polymer waveguides including an electro-optic polymer core and top and bottom electro-optic polymer cladding layers. The electro-optic polymer core having an electro-optic coefficient (r33) greater than 250 pm/v, and a Tg 150° C. to >200° C., and the top and bottom electro-optic polymer cladding layers having a Tg approximately the same as the Tg of the electro-optic polymer core.

67. 发明授权

US08331413B2 Integrated rare earth devices 有权
标题翻译：集成稀土装置
公开(公告)号：US08331413B2
公开(公告)日：2012-12-11
申请号：US12700635
申请日：2010-02-04
申请人： Michael Lebby
发明人： Michael Lebby
IPC分类号： H01S5/00
CPC分类号： H01L27/15
摘要： The invention includes a single chip having multiple different devices integrated thereon for a common purpose. The chip includes a substrate having a peripheral area, a mid-chip area, and a central area. A plurality of FETs are formed in the peripheral area with each FET having a layer of single crystal rare earth material in at least one of a conductive channel, a gate insulator, or a gate stack. A plurality of photonic devices including light emitting diodes or vertical cavity surface emitting lasers are formed in the mid-chip area with each photonic device having an active layer of single crystal rare earth material. A plurality of photo detectors are formed in the central area.
摘要翻译：本发明包括一个具有多个不同装置的单个芯片，用于共同的目的。芯片包括具有外围区域，中芯片区域和中心区域的基板。在周边区域中形成多个FET，每个FET在导电沟道，栅极绝缘体或栅极堆叠中的至少一个中具有单晶稀土材料层。在中芯片区域中形成包括发光二极管或垂直腔表面发射激光器的多个光子器件，每个光子器件具有单晶稀土材料的有源层。在中央区域形成有多个光检测器。

68. 发明申请

US20110108908A1 MULTILAYERED BOX IN FDSOI MOSFETS 审中-公开
标题翻译： FDSOI MOSFET中的多层盒
公开(公告)号：US20110108908A1
公开(公告)日：2011-05-12
申请号：US12893207
申请日：2010-09-29
申请人： Michael Lebby , Vijit Sabnis , Petar B. Atanackovic
发明人： Michael Lebby , Vijit Sabnis , Petar B. Atanackovic
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/78603 , H01L29/78654
摘要： A fully depleted MOSFET has a semiconductor-on-insulator substrate that includes a substrate material, a BOX positioned on the substrate material, and an active layer positioned on the BOX. The BOX includes a first layer of material with a first dielectric constant and a first thickness and a second layer of material having a second dielectric constant different than the first dielectric constant and a second thickness different than the first thickness. The first layer of material is positioned adjacent the substrate material and the second layer of material is positioned adjacent the active layer. Drain and source regions are formed in the active layer so as to be fully depleted. The drain and source regions are separated by a channel region in the active layer. A gate insulating layer overlies the channel region and a gate stack is positioned on the gate insulating region. It is anticipated that the structure is most useful for channel regions less than 90 nm long.
摘要翻译：完全耗尽的MOSFET具有绝缘体上半导体衬底，其包括衬底材料，位于衬底材料上的BOX和位于BOX上的有源层。 BOX包括具有第一介电常数和第一厚度的第一材料层和具有不同于第一介电常数的第二介电常数和不同于第一厚度的第二厚度的第二材料层。第一层材料位于邻近衬底材料的位置，第二层材料位于活性层附近。在有源层中形成漏区和源极区，以便完全耗尽。漏极和源极区域由有源层中的沟道区域分开。栅极绝缘层覆盖沟道区域，栅极叠层位于栅极绝缘区域上。预期该结构对于小于90nm长的通道区域是最有用的。

69. 发明授权

US07968384B2 Stacked transistors and process 有权
标题翻译：堆叠晶体管和工艺
公开(公告)号：US07968384B2
公开(公告)日：2011-06-28
申请号：US12534011
申请日：2009-07-31
申请人： Petar B. Atanakovic , Michael Lebby
发明人： Petar B. Atanakovic , Michael Lebby
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： H01L21/8221 , H01L21/823807 , H01L21/823878 , H01L21/84 , H01L27/0688 , H01L27/1203
摘要： A method of horizontally stacking transistors on a common semiconductor substrate is initiated by providing a single crystal, generally silicon, semiconductor substrate. A plurality of transistors are formed on the single crystal semiconductor substrate and encapsulated in an insulating layer, such as silicon dioxide. One or more openings are formed through the insulating layer between the plurality of transistors so as to expose a surface of the single crystal semiconductor substrate. A layer of single crystal rare earth insulator material is epitaxially grown on the exposed surface of the single crystal semiconductor substrate. A layer of single crystal semiconductor material, generally silicon, is epitaxially grown on the layer of single crystal rare earth insulator material. An intermixed transistor is formed on the layer of single crystal semiconductor material.
摘要翻译：在公共半导体衬底上水平堆叠晶体管的方法是通过提供单晶体，一般为硅的半导体衬底来启动的。在单晶半导体基板上形成多个晶体管，并封装在二氧化硅等绝缘层中。通过多个晶体管之间的绝缘层形成一个或多个开口，以暴露单晶半导体衬底的表面。在单晶半导体衬底的暴露表面上外延生长单晶稀土绝缘体材料层。在单晶稀土绝缘体材料层上外延生长单层半导体材料（通常为硅）层。在单晶半导体材料层上形成混合晶体管。

70. 发明授权

US07967653B2 Full color display 有权
标题翻译：全彩显示
公开(公告)号：US07967653B2
公开(公告)日：2011-06-28
申请号：US12568620
申请日：2009-09-28
申请人： Michael Lebby , Vijit Sabnis , Petar B. Atanackovic
发明人： Michael Lebby , Vijit Sabnis , Petar B. Atanackovic
IPC分类号： H01J1/62 , H01J63/04 , H01J9/24
CPC分类号： H01L27/156 , H01L33/105 , H01L33/343 , H01L33/44
摘要： A full color display comprising a red, a green, and a blue light emitting diode, each light emitting diode including a light emitting region having at least one layer of single crystal rare earth material, the rare earth material in each of the light emitting diodes having at least one radiative transition, and the rare earth material producing a radiation wavelength of approximately 640 nm in the red light emitting diode, 540 nm in the green light emitting diode, and 460 nm in the blue light emitting diode. Generally, the color of each LED is determined by selecting a rare earth with a radiative transition producing a radiation wavelength at the selected color. In cases where the rare earth has more than one radiative transition, tuned mirrors can be used to select the desired color.
摘要翻译：包括红色，绿色和蓝色发光二极管的全色显示器，每个发光二极管包括具有至少一层单晶稀土材料的发光区域，每个发光二极管中的稀土材料具有至少一个辐射跃迁，并且在红色发光二极管中产生约640nm的发射波长的稀土材料，绿色发光二极管中的540nm，以及蓝色发光二极管中的460nm。通常，通过选择具有产生所选颜色的辐射波长的辐射跃迁的稀土来确定每个LED的颜色。在稀土具有多于一个辐射跃迁的情况下，可以使用调整后的反射镜来选择所需的颜色。

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