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61. 发明授权

US07274246B2 Switching circuit using multiple common-drain JFETs for good heat dissipation capability and small PCB layout area 有权
标题翻译：使用多个公共漏极JFET的开关电路具有良好的散热能力和较小的PCB布局面积
公开(公告)号：US07274246B2
公开(公告)日：2007-09-25
申请号：US11159245
申请日：2005-06-23
申请人： Liang-Pin Tai , Jiun-Chiang Chen
发明人： Liang-Pin Tai , Jiun-Chiang Chen
IPC分类号： H03K17/687
CPC分类号： H03K17/6871 , H03K17/693
摘要： A switching circuit uses multiple common-drain JFETs to serve as the low-side switches of the switching circuit, and each of the low-side JFET is coupled between a high-side switch and a power node. Since a JFET can endure high voltage at both drain side and source side, and has good heat dissipation capability at drain side, the drain of the low-side JFET is coupled to the power node to enhance the heat dissipation capability and accordingly, all the low-side JFETs are allowed to be packaged in a same package to reduce the PCB layout area.
摘要翻译：开关电路使用多个公共漏极JFET作为开关电路的低侧开关，并且每个低侧JFET耦合在高侧开关和功率节点之间。由于JFET可以在漏极侧和源极侧承受高电压，并且在漏极侧具有良好的散热能力，因此低边JFET的漏极耦合到电源节点以增强散热能力，因此，低边JFET可以封装在相同的封装中，以减少PCB布局面积。

62. 发明申请

US20070147099A1 Electronic circuits utilizing normally-on junction field-effect transistor 审中-公开
公开(公告)号：US20070147099A1
公开(公告)日：2007-06-28
申请号：US11708325
申请日：2007-02-21
申请人： Liang-Pin Tai , Jing-Meng Liu , Hung-Der Su
发明人： Liang-Pin Tai , Jing-Meng Liu , Hung-Der Su
IPC分类号： H02M7/537
CPC分类号： H02M3/158 , H02M3/155 , H03K17/063 , H03K17/6871 , H03K17/693 , H03K2017/6875
摘要： Electronic circuits use low-cost depletion-mode JFET to serve as power switch. Since depletion-mode JFET has smaller conductive resistance and is majority carrier device, the energy loss is less when current flows through the depletion-mode JFET, and faster switching speed is obtained, thereby enhancing the efficiency of the electronic circuits.

63. 发明申请

US20060273769A1 Pulse modulation system with nonlinear ramp 有权
标题翻译：具有非线性斜坡的脉冲调制系统
公开(公告)号：US20060273769A1
公开(公告)日：2006-12-07
申请号：US11269798
申请日：2005-11-09
申请人： Tsai-Fu Chang , Liang-Pin Tai
发明人： Tsai-Fu Chang , Liang-Pin Tai
IPC分类号： G05F1/00
CPC分类号： H02M3/156 , H02M3/158 , H02M2001/0025
摘要： A pulse-width-modulation (PWM) control system with nonlinear ramp is disclosed. A nonlinear ramp generator generates a nonlinear ramp varied with the duty (Vout/Vin) in a waveform signal, which could be a logarithm ramp, an exponent ramp, a multi-piecewise-linear ramp, a power ramp or a combination of above. The slope of the ramp is not a constant due to the non-linear characteristic. The voltage Vramp will vary with the input voltage Vin, output voltage Vout, and duty (Vout/Vin), therefore it will reduce the influence of the input voltage Vin or output voltage Vout on the modulation gain and loop gain, even to keep the modulation gain and loop gain in constant value. As mentioned-above, the present invention improves the transient response of system, the sensitivity for variation of Vin and Vout, thus it is capable of correcting the output voltage quickly, for supplying a more steady power output.
摘要翻译：公开了具有非线性斜坡的脉宽调制（PWM）控制系统。非线性斜坡发生器产生在波形信号中随占空比（V OUT）/ V SUB变化的非线性斜坡，其可以是对数斜坡，指数斜坡，多分段线性斜坡，功率斜坡或上述组合。由于非线性特性，斜坡的斜率不是常数。电压V 将随着中的输入电压V SUB，输出电压V OUT输出和占空比（V SUB输出 / V ），因此它将减小输入电压V 和V OUT的变化的灵敏度，因此它能够快速校正输出电压，用于提供更稳定的功率输出。

64. 发明申请

US20060261790A1 DIRECT CURRENT VOLTAGE BOOSTING/BUCKING DEVICE 有权
标题翻译：直流电压升压/降压装置
公开(公告)号：US20060261790A1
公开(公告)日：2006-11-23
申请号：US11183611
申请日：2005-07-18
申请人： Liang-Pin Tai , Chun-Tsung Chen , Chin-Chiang Yeh , Po-Shun Chung , Kwan-Jen Chu , Chung-Lung Pai
发明人： Liang-Pin Tai , Chun-Tsung Chen , Chin-Chiang Yeh , Po-Shun Chung , Kwan-Jen Chu , Chung-Lung Pai
IPC分类号： G05F1/00
CPC分类号： G05F1/575 , H02M2001/0045
摘要： A direct current voltage boosting/bucking device includes a direct current voltage boosting circuit and a low drop-out (LDO) linear voltage converting circuit. The direct current voltage boosting circuit boosts an input voltage so as to generate an output voltage higher than the input voltage. The LDO linear voltage converting circuit converts the output voltage into a load voltage that is to be provided to a load, and controls the direct current voltage boosting circuit in accordance with a feedback signal from the load such that the output voltage and the load voltage have a minimum drop-out voltage differential therebetween and such that current flow through the load is maintained at a determined level.
摘要翻译：直流升压/降压装置包括直流升压电路和低压降（LDO）线性电压转换电路。直流升压电路提高输入电压，以产生高于输入电压的输出电压。 LDO线性电压转换电路将输出电压转换为要提供给负载的负载电压，并且根据来自负载的反馈信号控制直流升压电路，使得输出电压和负载电压具有在它们之间的最小脱出电压差，并且使得通过负载的电流保持在确定的水平。

65. 发明授权

US07026800B2 Feed-forward method for improving a transient response for a DC—DC power conversion and DC—DC voltage converter utilizing the same 有权
标题翻译：用于改善DC-DC电力转换的瞬态响应的前馈方法和利用其的DC-DC电压转换器
公开(公告)号：US07026800B2
公开(公告)日：2006-04-11
申请号：US10683395
申请日：2003-10-14
申请人： Jing-Meng Liu , Liang-Pin Tai , Der-Jiunn Wang
发明人： Jing-Meng Liu , Liang-Pin Tai , Der-Jiunn Wang
IPC分类号： G05F1/40 , H02M1/12
CPC分类号： H02M3/156
摘要： In a method for a DC-DC power conversion performed by a switching mode buck voltage converter, the power conversion is split into two or more stages, and a feed-forward signal is generated by one of the stages and sent to another stage prior thereto. The feed-forward signal is generated by responding to a load current transient, such as output voltage drop, ON-duty increment or decrement occurred in the PWM control loop, error amp output swinging, and any other detectable signals in response to load current transient of the voltage converter. As a result, the performance of the DC-DC voltage converter is improved due to the prior stage modulated early in time, and both lower ripple current and peak current in steady state operations and fast response to load current transient conditions could be simultaneously obtained.
摘要翻译：在由开关模式降压电压转换器执行的DC-DC功率转换的方法中，功率转换被分为两级或更多级，并且前级信号由其中一级产生并发送到其之前的另一级。前馈信号通过响应负载电流瞬变而产生，例如输出电压降，PWM控制环中发生的占空比增量或减量，误差放大器输出摆幅以及响应于负载电流瞬变的任何其他可检测信号的电压转换器。结果，由于早期调制了DC-DC电压转换器的性能，可以同时获得稳态运行中的较低纹波电流和峰值电流以及对负载电流瞬态条件的快速响应。

66. 发明申请

US20050285118A1 Switching circuit using multiple common-drain JFETs for good heat dissipation capability and small PCB layout area 有权
标题翻译：使用多个公共漏极JFET的开关电路具有良好的散热能力和较小的PCB布局面积
公开(公告)号：US20050285118A1
公开(公告)日：2005-12-29
申请号：US11159245
申请日：2005-06-23
申请人： Liang-Pin Tai , Jiun-Chiang Chen
发明人： Liang-Pin Tai , Jiun-Chiang Chen
IPC分类号： H01L29/15 , H03K17/687 , H03K17/693
CPC分类号： H03K17/6871 , H03K17/693
摘要： A switching circuit uses multiple common-drain JFETs to serve as the low-side switches of the switching circuit, and each of the low-side JFET is coupled between a high-side switch and a power node. Since a JFET can endure high voltage at both drain side and source side, and has good heat dissipation capability at drain side, the drain of the low-side JFET is coupled to the power node to enhance the heat dissipation capability and accordingly, all the low-side JFETs are allowed to be packaged in a same package to reduce the PCB layout area.
摘要翻译：开关电路使用多个公共漏极JFET作为开关电路的低侧开关，并且每个低侧JFET耦合在高侧开关和功率节点之间。由于JFET可以在漏极侧和源极侧承受高电压，并且在漏极侧具有良好的散热能力，因此低边JFET的漏极耦合到电源节点以增强散热能力，因此，低边JFET可以封装在相同的封装中，以减少PCB布局面积。

67. 发明申请

US20050258813A1 NOISE-RESISTANT PULSE WIDTH MODULATOR 有权
标题翻译：抗噪声脉宽调制器
公开(公告)号：US20050258813A1
公开(公告)日：2005-11-24
申请号：US10850164
申请日：2004-05-21
申请人： Liang-Pin Tai , Kent Hwang , Jian-Rong Huang , Kuo-Ping Liu , Cheng-Hsuan Fan , Ko-Cheng Wang , Yu-Fan Liao
发明人： Liang-Pin Tai , Kent Hwang , Jian-Rong Huang , Kuo-Ping Liu , Cheng-Hsuan Fan , Ko-Cheng Wang , Yu-Fan Liao
IPC分类号： G05F1/40 , G05F1/44 , H02M1/08
CPC分类号： H02M1/08
摘要： A pulse width modulator includes an amplifier module, a comparator module, and a filter module. The amplifier module receives a feedback voltage signal from a passive network, and generates first and second non-inverted voltage signals and first and second inverted voltage signals in response to the feedback voltage signal. The comparator module receives the first and second non-inverted voltage signals and the first and second inverted voltage signals, and provides first and second differential voltage signals corresponding to the first and second non-inverted voltage signals and the first and second inverted voltage signals. The filter module is coupled between the amplifier module and the comparator module, and is operable so as to attenuate high frequency components of the first and second non-inverted voltage signals. As such, the presence of noise in the feedback voltage signal does not affect differential operation of the comparator module.
摘要翻译：脉冲宽度调制器包括放大器模块，比较器模块和滤波器模块。放大器模块从无源网络接收反馈电压信号，并响应于反馈电压信号产生第一和第二非反相电压信号以及第一和第二反相电压信号。比较器模块接收第一和第二非反相电压信号以及第一和第二反相电压信号，并提供对应于第一和第二非反相电压信号以及第一和第二反相电压信号的第一和第二差分电压信号。滤波器模块耦合在放大器模块和比较器模块之间，并且可操作以便衰减第一和第二非反相电压信号的高频分量。因此，反馈电压信号中的噪声的存在不会影响比较器模块的差分工作。

68. 发明申请

US20050258458A1 JFET driver circuit and JFET driving method 失效
标题翻译： JFET驱动电路和JFET驱动方法
公开(公告)号：US20050258458A1
公开(公告)日：2005-11-24
申请号：US11128200
申请日：2005-05-13
申请人： Hung-I Wang , Liang-Pin Tai
发明人： Hung-I Wang , Liang-Pin Tai
IPC分类号： H01L29/80 , H03K17/0412 , H03K17/06
CPC分类号： H03K17/04123 , H03K17/063
摘要： To turn on a JFET, a two-stage turn-on current control is employed in a JFET driver circuit and a JFET driving method, by which a shortly pulsed high sourcing current is provided to turn on the JFET rapidly and efficiently, and a continuous low sourcing current is provided after the JFET turns on for reducing the power dissipation. After the JFET turns off, a negative charge pump is also employed to promise the JFET at a turn-off state. A special power sequence is further employed to ensure the JFET could be turned off during the power supply coupled to the JFET starts up.
摘要翻译：为了打开JFET，在JFET驱动电路和JFET驱动方法中采用两级导通电流控制，通过该方法提供短脉冲高电源电流以快速有效地接通JFET，并且连续在JFET导通之后提供低电源电流，以降低功耗。在JFET关断之后，还使用负电荷泵来保证JFET处于关断状态。进一步采用特殊的电源顺序，以确保在JFET启动的电源期间可以关断JFET。

69. 发明申请

US20050253567A1 High-efficiency two-step DC-to-DC converter 失效
标题翻译：高效率两级DC-DC转换器
公开(公告)号：US20050253567A1
公开(公告)日：2005-11-17
申请号：US11114060
申请日：2005-04-26
申请人： Liang-Pin Tai , Jiun-Chiang Chen
发明人： Liang-Pin Tai , Jiun-Chiang Chen
IPC分类号： G05F1/40 , H02M3/158
CPC分类号： H02M3/1584 , H02M2001/007
摘要： A two-step DC-to-DC converter comprises a first converter stage for converting a first voltage to a second voltage, and a second converter stage for converting the second voltage to an output voltage. The first converter stage uses a MOSFET or normally-off JFET to serve as a high-side switch, and the second converter stage comprises a multi-phase modulator using a normally-on JFET to serve as a high-side switch, thereby improving the efficiency of the two-step DC-to-DC converter.
摘要翻译：两级DC-DC转换器包括用于将第一电压转换为第二电压的第一转换器级和用于将第二电压转换为输出电压的第二转换级。第一转换器级使用MOSFET或常关JFET作为高侧开关，第二转换器级包括使用常导JFET作为高侧开关的多相调制器，从而改善两级DC-DC转换器的效率。

70. 发明授权

US06960905B2 Time-sharing current sense circuit for a multi-phase converter 有权
标题翻译：多相转换器的分时电流检测电路
公开(公告)号：US06960905B2
公开(公告)日：2005-11-01
申请号：US10828220
申请日：2004-04-21
申请人： Jiun-Chiang Chen , Hsin-Hsin Ho , Hung-I Wang , Liang-Pin Tai
发明人： Jiun-Chiang Chen , Hsin-Hsin Ho , Hung-I Wang , Liang-Pin Tai
IPC分类号： G05F1/40 , G05F1/563 , H02M3/158
CPC分类号： H02M3/1584 , H02M2001/0009
摘要： In a time-sharing current sense circuit for a multi-phase converter, a common transconductive amplifier is selectively connected to the channels of the converter power stage by a plurality of first switches under the control of a set of control clocks to detect the channel current of a selected channel among the channels so as to generate a sense current, and a sense current generated by the common transconductive amplifier from the sensed channel current is switched by a plurality of second switches under the control of the same control clocks to connect to one of a plurality of sampling-and-holding circuits each corresponding to one of the channels to generate a current sense signal to modulate the channel current of the selected channel.
摘要翻译：在用于多相转换器的分时电流检测电路中，在一组控制时钟的控制下，通过多个第一开关选择性地连接到转换器功率级的通道，以检测通道电流的通道之间的选定通道，以便产生检测电流，并且由感测通道电流产生的公共跨导放大器产生的感测电流在相同控制时钟的控制下由多个第二开关切换以连接到一个多个采样保持电路各自对应于一个通道以产生电流感测信号以调制所选择的通道的通道电流。

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