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61. 发明授权

US06747298B2 Collets for bonding of light emitting diodes having shaped substrates 有权
标题翻译：用于结合具有成形衬底的发光二极管的夹头
公开(公告)号：US06747298B2
公开(公告)日：2004-06-08
申请号：US10185350
申请日：2002-06-27
申请人： David B. Slater, Jr. , Jayesh Bharathan , John Edmond , Mark Raffetto , Anwar Mohammed , Peter S. Andrews , Gerald H. Negley
发明人： David B. Slater, Jr. , Jayesh Bharathan , John Edmond , Mark Raffetto , Anwar Mohammed , Peter S. Andrews , Gerald H. Negley
IPC分类号： H01L310328
CPC分类号： H01L33/40 , H01L24/32 , H01L33/20 , H01L33/62 , H01L2224/32245 , H01L2224/48091 , H01L2224/48463 , H01L2224/73265 , H01L2924/12032 , H01L2924/12041 , H01L2924/00012 , H01L2924/00
摘要： Bonding of flip-chip mounted light emitting devices having an irregular configuration is provided. Light emitting diodes having a shaped substrate are bonded to a submount by applying forces to the substrate an a manner such that shear forces within the substrate do not exceed a failure threshold of the substrate. Bonding a light emitting diode to a submount may be provided by applying force to a surface of a substrate of the light emitting diode that is oblique to a direction of motion of the light emitting diode to thermosonically bond the light emitting diode to the submount. Collets for use in bonding shaped substrates to a submount and systems for bonding shaped substrates to a submount are also provided.
摘要翻译：提供具有不规则结构的倒装芯片安装的发光器件的接合。具有成形基板的发光二极管通过向衬底施加力而以基板内的剪切力不超过衬底的故障阈值的方式与基座结合。将发光二极管接合到基座可以通过向发光二极管的基板的表面施加力而提供，所述表面倾斜于发光二极管的运动方向，以将发光二极管热偶接合到基台。还提供了用于将成形基板粘合到基座的套筒和用于将成形基板粘合到基座的系统。

62. 发明授权

US06635503B2 Cluster packaging of light emitting diodes 有权
标题翻译：集群封装的发光二极管
公开(公告)号：US06635503B2
公开(公告)日：2003-10-21
申请号：US10058369
申请日：2002-01-28
申请人： Peter S. Andrews , David B. Slater, Jr.
发明人： Peter S. Andrews , David B. Slater, Jr.
IPC分类号： H01L2100
CPC分类号： H01L27/156 , H01L21/78 , H01L33/0095
摘要： Methods of forming a light emitting diode are provided by scoring a semiconductor substrate having a light emitting region formed thereon so as to provide score lines between individual ones of a plurality of light emitting diodes. The semiconductor substrate is then broken along selected ones of the score lines so as to provide a unitized subset of the plurality of light emitting diodes. The unitized subset includes at least two light emitting diodes. Electrical connections are provided to the light emitting diodes of the unitized subset of the plurality of light emitting diodes. The score lines may also define the individual ones of the light emitting diodes.
摘要翻译：通过刻划形成有发光区域的半导体衬底来提供形成发光二极管的方法，以便在多个发光二极管中的各个之间提供刻痕线。然后将半导体衬底沿选定的刻痕线断开，以便提供多个发光二极管的单元化子集。该组合子集包括至少两个发光二极管。电连接被提供给多个发光二极管的单元化子集的发光二极管。评分线还可以限定发光二极管中的各个。

63. 发明授权

US5972801A Process for reducing defects in oxide layers on silicon carbide 失效
标题翻译：降低碳化硅层氧化层缺陷的方法
公开(公告)号：US5972801A
公开(公告)日：1999-10-26
申请号：US554319
申请日：1995-11-08
申请人： Lori A. Lipkin , David B. Slater, Jr. , John W. Palmour
发明人： Lori A. Lipkin , David B. Slater, Jr. , John W. Palmour
IPC分类号： H01L29/78 , H01L21/04 , H01L21/316 , H01L31/0312 , H01L21/20
CPC分类号： H01L21/049 , Y10S438/931
摘要： A method is disclosed for obtaining improved oxide layers and resulting improved performance from oxide based devices. The method comprises exposing an oxide layer on a silicon carbide layer to an oxidizing source gas at a temperature below the temperature at which SiC would begin to oxidize at a significant rate, while high enough to enable the oxidizing source gas to diffuse into the oxide layer, and while avoiding any substantial additional oxidation of the silicon carbide, and for a time sufficient to densify the oxide layer and improve the interface between the oxide layer and the silicon carbide layer.
摘要翻译：公开了一种用于获得改进的氧化物层的方法，并且由氧化物基器件导致改进的性能。该方法包括将碳化硅层上的氧化物层暴露于氧化源气体中，该温度低于SiC以显着的速率开始氧化的温度，同时高到足以使氧化源气体扩散到氧化物层并且同时避免碳化硅的任何实质的附加氧化，并且足以使氧化物层致密化并改善氧化物层和碳化硅层之间的界面的时间。

64. 发明授权

US5684308A CMOS-compatible InP/InGaAs digital photoreceiver 失效
标题翻译： CMOS兼容InP / InGaAs数字光电接收器
公开(公告)号：US5684308A
公开(公告)日：1997-11-04
申请号：US601904
申请日：1996-02-15
申请人： Michael L. Lovejoy , Benny H. Rose , David C. Craft , Paul M. Enquist , David B. Slater, Jr.
发明人： Michael L. Lovejoy , Benny H. Rose , David C. Craft , Paul M. Enquist , David B. Slater, Jr.
IPC分类号： H01L27/144 , H01L31/0232
CPC分类号： H01L27/1443
摘要： A digital photoreceiver is formed monolithically on an InP semiconductor substrate and comprises a p-i-n photodetector formed from a plurality of InP/InGaAs layers deposited by an epitaxial growth process and an adjacent heterojunction bipolar transistor (HBT) amplifier formed from the same InP/InGaAs layers. The photoreceiver amplifier operates in a large-signal mode to convert a detected photocurrent signal into an amplified output capable of directly driving integrated circuits such as CMOS. In combination with an optical transmitter, the photoreceiver may be used to establish a short-range channel of digital optical communications between integrated circuits with applications to multi-chip modules (MCMs). The photoreceiver may also be used with fiber optic coupling for establishing longer-range digital communications (i.e. optical interconnects) between distributed computers or the like. Arrays of digital photoreceivers may be formed on a common substrate for establishing a plurality of channels of digital optical communication, with each photoreceiver being spaced by less than about 1 mm and consuming less than about 20 mW of power, and preferably less than about 10 mW. Such photoreceiver arrays are useful for transferring huge amounts of digital data between integrated circuits at bit rates of up to about 1000 Mb/s or more.
摘要翻译：数字光接收器在InP半导体衬底上单片形成，并且包括由通过外延生长工艺沉积的多个InP / InGaAs层和由相同InP / InGaAs层形成的相邻异质结双极晶体管（HBT）放大器形成的p-i-n光电检测器。光接收放大器工作在大信号模式，以将检测到的光电流信号转换成能够直接驱动诸如CMOS的集成电路的放大输出。结合光发射机，光接收器可用于建立集成电路与多芯片模块（MCM）应用之间的数字光通信的短距离通道。光接收器还可以与光纤耦合一起使用，用于在分布式计算机之间建立较长范围的数字通信（即光学互连）等。数字光接收器的阵列可以形成在公共衬底上，用于建立多个数字光通信通道，每个光接收器间隔小于约1mm，消耗小于约20mW的功率，优选小于约10mW 。这样的光接收器阵列可用于以高达约1000Mb / s或更高的比特率在集成电路之间传送大量的数字数据。

65. 发明授权

US5318916A Symmetric self-aligned processing 失效
标题翻译：对称自对准处理
公开(公告)号：US5318916A
公开(公告)日：1994-06-07
申请号：US923254
申请日：1992-07-31
申请人： Paul M. Enquist , David B. Slater, Jr.
发明人： Paul M. Enquist , David B. Slater, Jr.
IPC分类号： H01L21/306 , H01L21/331 , H01L21/334 , H01L21/265
CPC分类号： H01L29/66931 , H01L21/30621 , H01L29/66318 , Y10S148/012 , Y10S148/135 , Y10S438/928 , Y10S438/97
摘要： A method of manufacturing a semiconductor device using simplified processing and eliminating and/or minimizing the extrinsic parasitic elements of the device. The method is particularly suited for manufacturing heterojunction bipolar transistors where the extrinsic parasitic base resistance and the extrinsic parasitic base-collector and base-emitter capacitances can be virtually eliminated and the base contact resistance can be greatly reduced. The method includes formming symmetric emitter and collector portions using front and backside processing of the wafer, respectively. The symmetric emitter and collector virtually eliminates the extrinsic collector and emitter regions of the device thereby virtually eliminating the extrinsic base-collector and base-emitter capacitance. The extrinsic base contact region may also be increased to minimize the base contact resistance without increasing parasitic capacitive elements of the device. Self-aligned processing features are also included to form self-aligned contacts to the base layer thereby virtually eliminating the extrinsic base resistance. The method may include building up the collector and emitter contacts to separate the emitter and collector interconnections from the base layer to avoid increasing the emitter-base and collector-base extrinsic parasitic capacitances and to minimize associated resistances and inductances. The method may further include forming etch stop layers to facilitate removing of the substrate to perform the backside processing and to accurately etch through the collector layer without etching the base layer.
摘要翻译：使用简化处理制造半导体器件的方法，并且消除和/或最小化器件的外在寄生元件。该方法特别适用于制造异质结双极晶体管，其中可以实际上消除外部寄生基极电阻和外部寄生基极集电极和基极 - 发射极电容，并且可大大降低基极接触电阻。该方法包括分别使用晶片的正面和背面处理来形成对称的发射极和集电极部分。对称发射极和集电极实际上消除了器件的非本征集电极和发射极区域，从而实际上消除了外部基极集电极和基极 - 发射极电容。也可以增加非本征基极接触区域以使基极接触电阻最小化，而不增加器件的寄生电容元件。还包括自对准处理特征以形成与基层的自对准接触，从而实际上消除了外部基极电阻。该方法可以包括建立集电极和发射极触点以将发射极和集电极互连与基极层分离，以避免增加发射极 - 基极和集电极 - 基极外部寄生电容并且使相关联的电阻和电感最小化。该方法还可以包括形成蚀刻停止层以便于去除衬底以执行背面处理，并且在不蚀刻基底层的情况下精确地蚀刻通过集电极层。

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