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61. 发明申请

US20090179203A1 DISPLAY SUBSTRATE 有权
标题翻译：显示基板
公开(公告)号：US20090179203A1
公开(公告)日：2009-07-16
申请号：US12331138
申请日：2008-12-09
申请人： Hong-Long Ning , Chang-Oh Jeong , Je-Hun Lee , Yang-Ho Bae , Pil-Sang Yun , Hong-Sick Park , Joo-Ae Youn , Byeong-Beom Kim , Byeong-Jin Lee
发明人： Hong-Long Ning , Chang-Oh Jeong , Je-Hun Lee , Yang-Ho Bae , Pil-Sang Yun , Hong-Sick Park , Joo-Ae Youn , Byeong-Beom Kim , Byeong-Jin Lee
IPC分类号： H01L33/00 , H01L21/768 , G03F1/00 , G03F7/20
CPC分类号： G02F1/136286 , G02F2001/136295 , H01L27/124 , H01L29/41733 , H01L29/42384 , H01L29/4908
摘要： A display substrate includes an insulating substrate, a thin-film transistor (TFT), a pixel electrode, a signal line and a pad part. The insulating substrate has a display region and a peripheral region surrounding the display region. The TFT is in the display region of the insulating substrate. The pixel electrode is in the display region of the insulating substrate and electrically connected to the TFT. The signal line is on the insulating substrate and extends from the peripheral region toward the display region. The pad part is in the peripheral region and electrically connects to the signal line. The pad part is formed in a trench of the insulating substrate and includes a region that extends into the insulating substrate. Therefore, the signal line may be securely attached to the insulating substrate.
摘要翻译：显示基板包括绝缘基板，薄膜晶体管（TFT），像素电极，信号线和焊盘部分。绝缘基板具有显示区域和围绕显示区域的周边区域。 TFT位于绝缘基板的显示区域。像素电极在绝缘基板的显示区域中并与TFT电连接。信号线位于绝缘基板上，并从周边区域向显示区域延伸。焊盘部分在外围区域中并且电连接到信号线。衬垫部分形成在绝缘衬底的沟槽中，并且包括延伸到绝缘衬底中的区域。因此，信号线可以牢固地附接到绝缘基板。

62. 发明授权

US07511300B2 Array substrate, display device having the same and method of manufacturing the same 失效
标题翻译：阵列基板，具有相同的显示装置及其制造方法
公开(公告)号：US07511300B2
公开(公告)日：2009-03-31
申请号：US11779534
申请日：2007-07-18
申请人： Je-Hun Lee , Do-Hyun Kim , Eun-Guk Lee , Chang-Oh Jeong
发明人： Je-Hun Lee , Do-Hyun Kim , Eun-Guk Lee , Chang-Oh Jeong
IPC分类号： H01L33/00
CPC分类号： G02F1/136286 , G02F2001/13629 , G02F2001/136295 , H01L27/124
摘要： An array substrate includes a switching element, a signal transmission line, a passivation layer and a pixel electrode. The switching element is disposed on an insulating substrate. The signal transmission line is connected to the switching element and includes a barrier layer, a conductive line, and a copper nitride layer. The barrier layer is disposed on the insulating substrate. The conductive line is disposed on the barrier layer and includes copper or copper alloy. The copper nitride layer covers the conductive line. The passivation layer covers the switching element and the signal transmission line and has a contact hole through which a drain electrode of the switching element is partially exposed. The pixel electrode is disposed on the insulating substrate, and is connected to the drain electrode of the switching element through the contact hole.
摘要翻译：阵列基板包括开关元件，信号传输线，钝化层和像素电极。开关元件设置在绝缘基板上。信号传输线连接到开关元件，并且包括阻挡层，导电线和氮化铜层。阻挡层设置在绝缘基板上。导电线设置在阻挡层上并且包括铜或铜合金。氮化铜层覆盖导电线。钝化层覆盖开关元件和信号传输线，并且具有接触孔，开关元件的漏电极通过该接触孔部分露出。像素电极设置在绝缘基板上，并通过接触孔与开关元件的漏电极连接。

63. 发明申请

US20090026450A1 THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：薄膜晶体管基板及其制造方法
公开(公告)号：US20090026450A1
公开(公告)日：2009-01-29
申请号：US12140655
申请日：2008-06-17
申请人： Eun-Guk LEE , Chang-Oh Jeong , Je-Hun Lee , Do-Hyun Kim , Soon-Kwon Lim
发明人： Eun-Guk LEE , Chang-Oh Jeong , Je-Hun Lee , Do-Hyun Kim , Soon-Kwon Lim
IPC分类号： H01L23/48 , H01L29/04 , H01L21/4763
CPC分类号： H01L27/1225 , H01L29/7869
摘要： A thin film transistor array substrate comprising a base substrate, a first wire on the base substrate, a first insulating layer on the base substrate to cover the first wire, a semiconductor layer on the first insulating layer, a second insulating layer on the first insulating layer on which the semiconductor layer is formed, and a second wire on the second insulating layer on the second insulating layer is provided, and a portion of the second wire makes contact with the semiconductor layer through the contact hole.
摘要翻译：一种薄膜晶体管阵列基板，包括基底基板，在基底基板上的第一布线，在基底基板上覆盖第一布线的第一绝缘层，第一绝缘层上的半导体层，第一绝缘层上的第二绝缘层设置有半导体层的层，第二绝缘层上的第二绝缘层上的第二配线，第二配线的一部分通过接触孔与半导体层接触。

64. 发明申请

US20080308795A1 Thin film transistor array panel and manufacturing method thereof 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US20080308795A1
公开(公告)日：2008-12-18
申请号：US11980871
申请日：2007-10-30
申请人： Je-Hun Lee , Do-Hyun Kim , Chang-Oh Jeong
发明人： Je-Hun Lee , Do-Hyun Kim , Chang-Oh Jeong
IPC分类号： H01L29/24 , H01L21/34
CPC分类号： H01L29/7869 , H01L27/1225
摘要： The disclosed thin film transistor array panel includes an insulating substrate, a channel layer including an oxide formed on the insulating substrate. A gate insulating is layer formed on the channel layer and a gate electrode is formed on the gate insulating layer. An interlayer insulating layer is formed on the gate electrode and a data line formed on the interlayer insulating layer and includes a source electrode, wherein the data line is made of a first conductive layer and a second conductive layer. A drain electrode formed on the interlayer insulating layer, and includes the first conductive layer and the second conductive layer. A pixel electrode extends from the first conductive layer of the drain electrode and a passivation layer formed on the data line and the drain electrode. A spacer formed on the passivation layer.
摘要翻译：所公开的薄膜晶体管阵列面板包括绝缘基板，包括形成在绝缘基板上的氧化物的沟道层。栅极绝缘层是在沟道层上形成的层，栅电极形成在栅极绝缘层上。在栅电极上形成层间绝缘层，形成在层间绝缘层上的数据线，包括源电极，其中数据线由第一导电层和第二导电层构成。一种形成在层间绝缘层上的漏极，包括第一导电层和第二导电层。像素电极从漏电极的第一导电层和形成在数据线和漏电极上的钝化层延伸。形成在钝化层上的间隔物。

65. 发明申请

US20080248617A1 DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：显示基板及其制造方法
公开(公告)号：US20080248617A1
公开(公告)日：2008-10-09
申请号：US12123858
申请日：2008-05-20
申请人： Chang-Oh JEONG , Hong-Sick PARK , Shi-Yul KIM , Sang-Gab KIM
发明人： Chang-Oh JEONG , Hong-Sick PARK , Shi-Yul KIM , Sang-Gab KIM
IPC分类号： H01L21/331
CPC分类号： G02F1/136286 , G02F2001/133397 , G02F2001/13629 , G02F2201/501 , H01L27/124 , H01L27/1288 , H01L29/42384
摘要： A display substrate includes a base substrate, a first metal pattern, a gate insulating layer, a second metal pattern, a channel layer and a pixel electrode. The first metal pattern is formed on the base substrate, and includes a gate line and a gate electrode of a switching element. The gate insulating layer is formed on the base substrate including the first metal pattern. The second metal pattern is formed on the gate insulating layer, and includes a source electrode, a drain electrode and a source line. The channel layer is formed under the second metal pattern, and is patterned to have substantially a same side surface as a side surface of the second metal pattern. The pixel electrode is electrically connected to the drain electrode. Therefore, an afterimage on a display panel, thus improving display quality.
摘要翻译：显示基板包括基底基板，第一金属图案，栅极绝缘层，第二金属图案，沟道层和像素电极。第一金属图案形成在基底基板上，并且包括开关元件的栅极线和栅电极。栅极绝缘层形成在包括第一金属图案的基底基板上。第二金属图案形成在栅极绝缘层上，并且包括源电极，漏电极和源极线。沟道层形成在第二金属图案之下，并且被图案化以具有与第二金属图案的侧表面大致相同的侧表面。像素电极电连接到漏电极。因此，在显示面板上留下余像，从而提高显示质量。

66. 发明申请

US20080227245A1 THIN FILM TRANSISTOR ARRAY PANEL AND A METHOD FOR MANUFACTURING THE SAME 失效
标题翻译：薄膜晶体管阵列及其制造方法
公开(公告)号：US20080227245A1
公开(公告)日：2008-09-18
申请号：US12112104
申请日：2008-04-30
申请人： Jae-Gab LEE , Bong-Joo KANG , Beom-Seok CHO , Chang-Oh JEONG
发明人： Jae-Gab LEE , Bong-Joo KANG , Beom-Seok CHO , Chang-Oh JEONG
IPC分类号： H01L21/84
CPC分类号： H01L27/12 , H01L27/124 , H01L29/458 , H01L29/4908 , H01L29/66765
摘要： A thin film transistor array panel includes an insulating substrate, a gate wire formed on the insulating substrate. A gate insulating layer covers the gate wire. A semiconductor pattern is formed on the gate insulating layer. A data wire having source electrodes, drain electrodes and data lines is formed on the gate insulating layer and the semiconductor pattern. A protective layer is formed on the data wire. Pixel electrodes connected to the drain electrode via contact holes are formed on the protective layer. The gate wire and the data wire are made of Ag alloy containing Ag and an additive including at least one selected from Zn, In, Sn and Cr.
摘要翻译：薄膜晶体管阵列面板包括绝缘基板，形成在绝缘基板上的栅极线。栅极绝缘层覆盖栅极线。在栅极绝缘层上形成半导体图形。在栅极绝缘层和半导体图案上形成具有源电极，漏电极和数据线的数据线。在数据线上形成保护层。在保护层上形成通过接触孔与漏电极连接的像素电极。栅极线和数据线由含有Ag的Ag合金和包含选自Zn，In，Sn和Cr中的至少一种的添加剂制成。

67. 发明申请

US20080149930A1 WIRE STRUCTURE, METHOD FOR FABRICATING WIRE, THIN FILM TRANSISTOR SUBSTRATE, AND METHOD FOR FABRICATING THE THING FILM TRANSISTOR SUBSTRATE 有权
标题翻译：线结构，制造线，薄膜晶体管衬底的方法和用于制造薄膜晶体管衬底的方法
公开(公告)号：US20080149930A1
公开(公告)日：2008-06-26
申请号：US11961149
申请日：2007-12-20
申请人： Je-Hun LEE , Chang-Oh Jeong , Eun-Guk Lee , Do-Hyun Kim
发明人： Je-Hun LEE , Chang-Oh Jeong , Eun-Guk Lee , Do-Hyun Kim
IPC分类号： H01L29/04 , H01L21/336
CPC分类号： H01L29/458 , H01L27/124 , H01L29/4908
摘要： Provided are a wire structure, a method for fabricating a wire, a thin film transistor (TFT) substrate and a method for fabricating a TFT substrate. The wire structure includes a barrier layer formed on a substrate and including copper, copper solid solution layer.
摘要翻译：提供线结构，制造线的方法，薄膜晶体管（TFT）基板和制造TFT基板的方法。导线结构包括形成在基板上并包括铜，铜固溶体层的阻挡层。

68. 发明申请

US20080128689A1 FLAT PANEL DISPLAYS COMPRISING A THIN-FILM TRANSISTOR HAVING A SEMICONDUCTIVE OXIDE IN ITS CHANNEL AND METHODS OF FABRICATING THE SAME FOR USE IN FLAT PANEL DISPLAYS 有权
标题翻译：平面板显示器，其包括在其通道中具有半导体氧化物的薄膜晶体管及其制造方法用于平板显示器
公开(公告)号：US20080128689A1
公开(公告)日：2008-06-05
申请号：US11947725
申请日：2007-11-29
申请人： Je-hun Lee , Dong-ju Yang , Tae-hyung Ihn , Do-hyun Kim , Sun-young Hong , Seung-jae Jung , Chang-oh Jeong , Eun-guk Lee
发明人： Je-hun Lee , Dong-ju Yang , Tae-hyung Ihn , Do-hyun Kim , Sun-young Hong , Seung-jae Jung , Chang-oh Jeong , Eun-guk Lee
IPC分类号： H01L27/12 , H01L21/84
CPC分类号： H01L29/7869
摘要： Provided is a method of fabricating a semiconductive oxide thin-film transistor (TFT) substrate. The method includes forming gate wiring on an insulation substrate; and forming a structure in which a semiconductive oxide film pattern and data wiring are stacked on the gate wiring, wherein the semiconductive oxide film pattern is selectively patterned to have channel regions of first thickness and source/drain regions of greater second thickness and where image data is coupled to the source regions by data wiring formed on the source regions. According to a 4-mask embodiment, the data wiring and semiconductive oxide film pattern are defined by a shared etch mask.
摘要翻译：提供一种制造半导体氧化物薄膜晶体管（TFT）衬底的方法。该方法包括在绝缘基板上形成栅极布线; 并且形成其中半导体氧化物膜图案和数据布线堆叠在栅极布线上的结构，其中半导体氧化物膜图案被选择性地图案化以具有第二厚度的第一厚度的沟道区域和源极/漏极区域，并且其中图像数据通过形成在源极区域上的数据布线耦合到源极区域。根据4掩模实施例，数据布线和半导体氧化膜图案由共享蚀刻掩模限定。

69. 发明申请

US20080079006A1 SIGNAL LINE FOR A DISPLAY DEVICE, ETCHANT, THIN FILM TRANSISTOR PANEL, AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：用于显示装置，蚀刻剂，薄膜晶体管板的信号线及其制造方法
公开(公告)号：US20080079006A1
公开(公告)日：2008-04-03
申请号：US11850922
申请日：2007-09-06
申请人： Hong-Sick PARK , Bong-Kyun KIM , Chang-Oh JEONG , Jong-Hyun CHOUNG , Sun-Young HONG , Won-Suk SHIN , Byeong-Jin LEE
发明人： Hong-Sick PARK , Bong-Kyun KIM , Chang-Oh JEONG , Jong-Hyun CHOUNG , Sun-Young HONG , Won-Suk SHIN , Byeong-Jin LEE
IPC分类号： H01L29/04 , C09K13/08 , H01L21/00 , H01L23/52
CPC分类号： C09K13/08 , G09G2300/0426 , G09G2300/0439 , G09G2320/0223 , H01L23/53238 , H01L27/124 , H01L29/4908 , H01L2924/0002 , H01L2924/00
摘要： A thin film panel includes a substrate, a gate line formed on the substrate, a gate insulating layer formed on the gate line, a semiconductor layer formed on the gate insulating layer, a data line, including a source electrode, and a drain electrode formed on the gate insulating layer or the semiconductor layer, and a pixel electrode connected to the drain electrode, wherein at least one of the gate line and the data line and drain electrode includes a first conductive layer made of a molybdenum Mo-niobium Nb alloy and a second conductive layer made of a copper Cu-containing metal.
摘要翻译：薄膜面板包括基板，形成在基板上的栅极线，形成在栅极线上的栅极绝缘层，形成在栅极绝缘层上的半导体层，包括源电极的数据线和形成的漏电极在所述栅极绝缘层或所述半导体层上形成的像素电极和与所述漏极连接的像素电极，其中所述栅极线和所述数据线和漏极的至少一个包括由钼Mo-Nb铌合金构成的第一导电层，以及由含铜铜金属制成的第二导电层。

70. 发明申请

US20080073674A1 Thin Film Transistor Array Panel and Method for Manufacturing the Same 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US20080073674A1
公开(公告)日：2008-03-27
申请号：US11944130
申请日：2007-11-21
申请人： Beom-Seok Cho , Yang-Ho Bae , Je-Hun Lee , Chang-Oh Jeong
发明人： Beom-Seok Cho , Yang-Ho Bae , Je-Hun Lee , Chang-Oh Jeong
IPC分类号： H01L29/49
CPC分类号： G02F1/136286 , G02F2001/13629 , G02F2001/136295 , H01L27/3276 , Y10S438/924
摘要： The present invention provides a TFT array panel and a manufacturing method of the same, which has signal lines including a lower layer of an Al containing metal and an upper layer of a molybdenum alloy (Mo-alloy) comprising molybdenum (Mo) and at least one of niobium (Nb), vanadium (V), and titanium (Ti). Accordingly, undercut, overhang, and mouse bites which may arise in an etching process, are prevented, and TFT array panels that have signal lines having low resistivity and good contact characteristics are provided.
摘要翻译：本发明提供一种TFT阵列面板及其制造方法，其特征在于，具有含有Al的金属的下层和包含钼（Mo）的钼合金（Mo合金）的上层的信号线，至少包括铌（Nb），钒（V）和钛（Ti）之一。因此，防止在蚀刻工艺中可能出现的底切，突出和小鼠咬合，并且提供具有低电阻率和良好接触特性的信号线的TFT阵列面板。

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