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    • 62. 发明授权
    • Layout structure of semiconductor memory device having IOSA
    • 具有IOSA的半导体存储器件的布局结构
    • US07715261B2
    • 2010-05-11
    • US12037326
    • 2008-02-26
    • Doo-Young KimByung-Chul Kim
    • Doo-Young KimByung-Chul Kim
    • G11C7/00
    • G11C5/025G11C5/063
    • Embodiments of the invention provide a layout for a semiconductor memory device that splits each memory bank into two blocks. Embodiments of the invention dispose input/output sense amplifiers between the two memory blocks to achieve relatively short global input/output lines to all areas of the memory bank. Shorter global input/output lines have less loading and therefore enable higher-speed data transfer rates. Some embodiments of the invention include column selection line repeaters between the two memory blocks. The column selection line repeaters reduce loading in the column selection lines, and increase column selection speed. Embodiments of the invention include both input/output sense amplifiers and column selection line repeaters disposed between the two memory blocks to increase data transfer rates on the global input/output lines and also increase column selection speed.
    • 本发明的实施例提供了一种用于将每个存储体分成两个块的半导体存储器件的布局。 本发明的实施例在两个存储块之间设置输入/输出读出放大器,以实现对存储体的所有区域的相对较短的全局输入/输出线。 更短的全局输入/输出线路的负载较少,因此可实现更高速度的数据传输速率。 本发明的一些实施例包括两个存储块之间的列选择线中继器。 列选择线中继器减少列选择行中的加载,并增加列选择速度。 本发明的实施例包括设置在两个存储器块之间的输入/输出读出放大器和列选择线中继器,以增加全局输入/输出线上的数据传输速率,并且还增加列选择速度。
    • 64. 发明申请
    • APPARATUS AND METHOD FOR ESTIMATING CHANNEL IN MIMO SYSTEM BASED OFDM/OFDMA
    • 基于MIMO系统的OFDM / OFDMA估计信道的装置和方法
    • US20100085866A1
    • 2010-04-08
    • US12521777
    • 2007-12-31
    • Zheng Zi LiByung-Chul Kim
    • Zheng Zi LiByung-Chul Kim
    • H04B7/208H04J11/00H04L27/28
    • H04L25/0224H04L25/0204H04L27/2657H04L27/2662H04L27/2675H04L2025/03426
    • The present invention relates to an apparatus and method for estimating a channel in a MIMO wireless telecommunication system supporting the 0FDM/0FDMA. The present invention, in estimating a channel by using two or more pilots included in at least one received signal among received signals of a first channel and a second channel received through a first receiving antenna and received signals of a third channel and a fourth channel received through a second receiving antenna, determines a subchannel mapping rule respectively for the received signals of the first channel to the fourth channel, and estimates a channel with a different method according to the determined subchannel mapping rule. That is, the channel is estimated by using two or more pilots included in two or more tiles corresponding to the same subcarrier respectively, in case a subchannel rotation does not exist in the subchannel mapping rule, while the channel is estimated by using two pilots included in an individual tile, in case a subchannel rotation exists in the subchannel mapping rule.
    • 本发明涉及一种用于估计支持OFDM / 0FDMA的MIMO无线电信系统中的信道的装置和方法。 本发明在通过使用包括在第一信道的接收信号中的至少一个接收信号中包含的两个或更多个导频来估计信道和通过第一接收天线接收的第二信道和接收到的第三信道和第四信道的接收信号 通过第二接收天线,分别确定第一信道到第四信道的接收信号的子信道映射规则,并且根据确定的子信道映射规则来估计具有不同方法的信道。 也就是说,在子信道映射规则中不存在子信道旋转的情况下,通过使用分别对应于相同子载波的两个或更多瓦片中包括的两个或更多个导频来估计信道,同时通过使用包括的两个导频来估计信道 在子通道映射规则中存在子通道旋转的情况下,在单独的瓦片中。
    • 67. 发明申请
    • Cooler of Table-Type
    • 表型冷却器
    • US20090229293A1
    • 2009-09-17
    • US11718180
    • 2005-10-29
    • Byung-Chul Kim
    • Byung-Chul Kim
    • F25D27/00F25D3/08F25D17/06
    • F25D31/007A47B2220/0013A47F3/0439F25D11/00F25D17/06F25D23/021F25D25/04F25D27/00F25D2303/081F25D2317/0413F25D2317/0665F25D2400/08
    • Disclosed herein is a cooler of table-type, which can be easily kept in custody and reduce power consumption, and which can increase a cooling efficiency and provide a visual satisfaction to a user. The cooler of table-type includes: a chilling room formed at the center of a table, opened at the top and closed at the inner periphery and the bottom; a cooling container adapted to vertically elevate in a state where it is in tight contact with the inner periphery of the chilling room and adapted to contain foods therein; a cooling pole vertically mounted on the bottom of the cooling container and adapted to form ice on the surface thereof; a mushroom type shade mounted on the top of the cooling pole for cove ring the upper end of the chilling room when it is descended, the shade having a predetermined thickness; cooling coils arranged inside and outside the cooling container, the cooling pole and the shade for circulating refrigerant; a cooler for thermally exchanging the refrigerant by circulating the refrigerant through the cooling coils and repeating condensation and expansion; an elevator for vertically elevating the cooling container; and a drain pipe mounted downwardly from the bottom of the cooling container.
    • 本文公开了一种台式冷却器,其可以容易地保管并降低功耗,并且其可以提高冷却效率并为用户提供视觉满意度。 台式冷却器包括:形成在桌子中心的冷藏室,在顶部开口并在内周和底部封闭; 冷却容器,其适于在与冷藏室的内周紧密接触的状态下垂直地升高并适于在其中容纳食物; 垂直安装在冷却容器的底部并适于在其表面上形成冰的冷却杆; 安装在冷却杆顶部的伞形遮光罩,用于在下降时使冷却室的上端环绕,遮光罩具有预定厚度; 设置在冷却容器内部和外部的冷却盘管,冷却杆和用于使制冷剂循环的灯罩; 冷却器,用于通过使制冷剂循环通过冷却盘管并重复冷凝和膨胀来热交换制冷剂; 用于垂直升降所述冷却容器的电梯; 以及从冷却容器的底部向下安装的排水管。
    • 68. 发明申请
    • LAYOUT STRUCTURE OF SEMICONDUCTOR MEMORY DEVICE HAVING IOSA
    • 具有IOSA的半导体存储器件的布局结构
    • US20080205177A1
    • 2008-08-28
    • US12037326
    • 2008-02-26
    • Doo-Young KIMByung-Chul Kim
    • Doo-Young KIMByung-Chul Kim
    • G11C7/00G11C8/00
    • G11C5/025G11C5/063
    • Embodiments of the invention provide a layout for a semiconductor memory device that splits each memory bank into two blocks. Embodiments of the invention dispose input/output sense amplifiers between the two memory blocks to achieve relatively short global input/output lines to all areas of the memory bank. Shorter global input/output lines have less loading and therefore enable higher-speed data transfer rates. Some embodiments of the invention include column selection line repeaters between the two memory blocks. The column selection line repeaters reduce loading in the column selection lines, and increase column selection speed. Embodiments of the invention include both input/output sense amplifiers and column selection line repeaters disposed between the two memory blocks to increase data transfer rates on the global input/output lines and also increase column selection speed.
    • 本发明的实施例提供了一种用于将每个存储体分成两个块的半导体存储器件的布局。 本发明的实施例在两个存储块之间设置输入/输出读出放大器,以实现对存储体的所有区域的相对较短的全局输入/输出线。 更短的全局输入/输出线路的负载较少,因此可实现更高速度的数据传输速率。 本发明的一些实施例包括两个存储块之间的列选择线中继器。 列选择线中继器减少列选择行中的加载,并增加列选择速度。 本发明的实施例包括设置在两个存储器块之间的输入/输出读出放大器和列选择线中继器,以增加全局输入/输出线上的数据传输速率,并且还增加列选择速度。