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51. 发明授权

US5888297A Method of fabricating SOI substrate 失效
标题翻译：制造SOI衬底的方法
公开(公告)号：US5888297A
公开(公告)日：1999-03-30
申请号：US570232
申请日：1995-12-11
申请人： Atsushi Ogura
发明人： Atsushi Ogura
IPC分类号： H01L21/20 , C30B31/22 , C30B33/00 , H01L21/02 , H01L21/265 , H01L21/322 , H01L27/12 , C30B25/02
CPC分类号： C30B29/06 , C30B31/22 , C30B33/00
摘要： The invention provides a method of fabricating an SOI substrate including the steps of introducing crystal defects at a desired depth in a silicon substrate, and thereafter, implanting oxygen or nitrogen ions into the silicon substrate, and thermally annealing the silicon substrate. The method of the present invention makes it possible to fabricate an SOI substrate with fewer crystal defects and lower fabrication cost than is possible according to the prior art.
摘要翻译：本发明提供一种制造SOI衬底的方法，包括以下步骤：在硅衬底中以期望的深度引入晶体缺陷，然后将氧或氮离子注入到硅衬底中，并对硅衬底进行热退火。与现有技术相比，本发明的方法可以制造出具有较少晶体缺陷和较低制造成本的SOI衬底。

52. 发明授权

US5658381A Method to form hemispherical grain (HSG) silicon by implant seeding followed by vacuum anneal 失效
标题翻译：通过种植接种然后真空退火形成半球形晶粒（HSG）硅的方法
公开(公告)号：US5658381A
公开(公告)日：1997-08-19
申请号：US439022
申请日：1995-05-11
申请人： Randhir P. S. Thakur , Michael Nuttall
发明人： Randhir P. S. Thakur , Michael Nuttall
IPC分类号： C30B1/02 , H01L21/02 , C30B31/22
CPC分类号： H01L28/82 , C30B1/023 , C30B29/06 , H01L28/84 , H01L28/90 , Y10S438/964
摘要： Hemispherical grain (HSG) silicon for a semiconductor device, is formed by: introducing a crystallization nucleus into a silicon material; and converting the silicon material into the HSG silicon by promoting the growth of the crystallization nucleus during a high vacuum anneal. An embodiment of the present invention is a semiconductor device having hemispherical grain (HSG) silicon, where the HSG silicon comprises a silicon material converted into the HSG silicon from the growth of at least one implanted crystallization nucleus.
摘要翻译：半导体器件的半球形晶粒（HSG）硅通过：将结晶核引入硅材料中而形成; 并通过在高真空退火期间促进结晶核的生长而将硅材料转化成HSG硅。本发明的一个实施方案是具有半球形晶粒（HSG）硅的半导体器件，其中HSG硅包括从至少一个注入的结晶核的生长转化成HSG硅的硅材料。

53. 发明授权

US4514636B1 失效
公开(公告)号：US4514636B1
公开(公告)日：1989-11-14
申请号：US64053884
申请日：1984-08-13
IPC分类号： C23C14/54 , C30B23/06 , C30B31/22 , H01L21/265
CPC分类号： C30B23/06 , C23C14/541 , C30B31/22 , H01L21/265

54. 发明授权

US4859908A Plasma processing apparatus for large area ion irradiation 失效
标题翻译：用于大面积离子照射的等离子体处理装置
公开(公告)号：US4859908A
公开(公告)日：1989-08-22
申请号：US100148
申请日：1987-09-23
申请人： Akihisa Yoshida , Kentaro Setsune , Takashi Hirao
发明人： Akihisa Yoshida , Kentaro Setsune , Takashi Hirao
IPC分类号： C30B31/22 , H01J37/32 , H01J27/02
CPC分类号： H01J37/32091 , C30B31/22 , H01J37/32357 , H01J37/3266
摘要： A plasma processing apparatus performs various plasma processings of a substrate having a large area in a semiconductor element manufacturing process, by using highly excited plasma generated at a low pressure under the application of RF power and a magnetic field. In this plasma processing apparatus, a gas is introduced into a vacuum chamber to be used as an ion source, RF power is applied to two electrodes having respective surfaces opposite to each other through the gas to thereby generate the plasma in the vacuum chamber, and a magnetic field is applied to the plasma from a magnetic field source arranged at a predetermined position. The intensity of the applied magnetic field is set to be 1.5 times or more the magnetic field intensity which causes electron cyclotron resonance to occur at the frequency f of the applied RF power. Particularly, when the frequency f of the RF power is 13.56 MHz, the magnetic field intensity is selected to be in the range from 25 gausses to 35 gausses.
摘要翻译：等离子体处理装置通过使用在RF功率和磁场的应用下在低压下产生的高激发等离子体，在半导体元件制造工艺中执行具有大面积的衬底的各种等离子体处理。在该等离子体处理装置中，将气体引入到真空室中以用作离子源，通过气体将两相电极的两个电极施加RF功率，从而在真空室中产生等离子体，从布置在预定位置的磁场源向等离子体施加磁场。所施加的磁场的强度被设定为在所施加的RF功率的频率f处发生电子回旋共振的磁场强度的1.5倍或更多。特别地，当RF功率的频率f为13.56MHz时，磁场强度被选择在从25高斯到35高斯的范围内。

55. 发明授权

US4832781A Methods and apparatus for thermal transfer with a semiconductor wafer in vacuum 失效
标题翻译：用于真空中半导体晶片的热转印的方法和装置
公开(公告)号：US4832781A
公开(公告)日：1989-05-23
申请号：US141709
申请日：1988-01-07
申请人： Eric L. Mears
发明人： Eric L. Mears
IPC分类号： B29C39/02 , B29C39/26 , B29L31/00 , C23C14/50 , C30B25/10 , C30B31/12 , C30B31/22 , H01J37/317 , H01L21/00 , H01L21/265
CPC分类号： H01L21/67103 , C23C14/50 , C30B25/10 , C30B31/12 , C30B31/22 , H01L21/67069
摘要： Thermal transfer between a semiconductor wafer and a platen during vacuum processing is provided through a soft, thermally-conductive polymer layer having a thin, hard surface film. The soft polymer layer, which is preferably silicone rubber containing thermally-conductive particles, conforms to surface irregularities on the wafer and has low thermal resistance. The surface film is preferably silicon dioxide in the form of a multiplicity of flat plates integrally formed on the silicone rubber. Adherence of the wafer and of foreign matter to the polymer layer is prevented by the surface film. In addition, the underlying polymer layer is protected by the surface film. A high purity polymer layer is fabricated by evacuating the mold cavity and the resin container prior to injection of resin. The mold for the polymer layer utilizes a hard, smooth mold release surface and a resilient gasket between the platen and the mold release surface. The gasket establishes the dimensions of the polymer layer and seals the mold cavity. The surface film is formed by oxygen plasma treatment of the silicone rubber layer.

56. 发明授权

US4638484A Solid state laser employing diamond having color centers as a laser active material 失效
标题翻译：采用具有彩色中心作为激光活性材料的金刚石的固态激光器
公开(公告)号：US4638484A
公开(公告)日：1987-01-20
申请号：US673304
申请日：1984-11-20
申请人： Stephen C. Rand , Larry G. DeShazer
发明人： Stephen C. Rand , Larry G. DeShazer
IPC分类号： H01S3/06 , C30B31/22 , C30B33/00 , H01S3/16 , H01S5/00
CPC分类号： H01S3/1681 , C30B29/04 , C30B31/22 , C30B33/00
摘要： A diamond (10) containing H3 and N3 color centers is employed as a laser active material in a color center laser. When excited by a suitable optical pumping source (22), the H3 color centers exhibit laser action and provide a beam (26, 28) which is tunable over the range of 500 to 600 nanometers.
摘要翻译：使用含有H3和N3颜色中心的菱形（10）作为彩色中心激光器中的激光活性材料。当由合适的光泵浦源（22）激发时，H3颜色中心呈现激光作用并提供可在500至600纳米范围内调节的光束（26,28）。

57. 发明授权

US4481406A Heater assembly for thermal processing of a semiconductor wafer in a vacuum chamber 失效
标题翻译：用于真空室中半导体晶片的热处理的加热器组件
公开(公告)号：US4481406A
公开(公告)日：1984-11-06
申请号：US459745
申请日：1983-01-21
申请人： Richard S. Muka
发明人： Richard S. Muka
IPC分类号： C30B1/02 , C30B31/22 , C30B33/00 , C30B35/00 , H05B3/22
CPC分类号： C30B1/02 , C30B31/22 , C30B33/00 , C30B35/00
摘要： A heater assembly for annealing a semiconductor wafer in a vacuum chamber includes a blackbody source having a constant planar energy flux charactertistic and a wafer support for supporting the wafer adjacent to, but not spaced apart from, the source in planar parallel alignment therewith. The heater assembly further includes radiation shields and a housing providing support for the source, the wafer support and the radiation shields in fixed relationship. The housing includes a heat sink for removal of thermal energy and a slot for insertion and removal of the wafer. The heater assembly confines thermal energy and reduces input energy requirements. In addition, the requirement for a movable shutter is eliminated.
摘要翻译：用于在真空室中退火半导体晶片的加热器组件包括具有恒定平面能量通量特性的黑体源和用于支撑晶片的晶片支撑件，所述晶片支撑件与平行对准的源极相邻但不间隔开。加热器组件还包括辐射屏蔽和壳体，其以固定关系为源提供支撑，晶片支撑和辐射屏蔽。壳体包括用于去除热能的散热器和用于插入和移除晶片的槽。加热器组件限制热能并降低输入能量需求。此外，消除了对可移动快门的需求。

58. 发明授权

US4472206A Method of activating implanted impurities in broad area compound semiconductors by short time contact annealing 失效
标题翻译：通过短时间接触退火激活广域化合物半导体中的植入杂质的方法
公开(公告)号：US4472206A
公开(公告)日：1984-09-18
申请号：US440655
申请日：1982-11-10
申请人： Rodney T. Hodgson , Thomas N. Jackson , Hans S. Rupprecht , Jerry M. Woodall
发明人： Rodney T. Hodgson , Thomas N. Jackson , Hans S. Rupprecht , Jerry M. Woodall
IPC分类号： C30B29/40 , C30B31/22 , H01L21/265 , H01L21/314 , H01L21/324 , H01L21/477
CPC分类号： H01L21/3245 , H01L21/26546 , H01L21/314
摘要： Ion implanted impurity activation in a multi-element compound semiconductor crystal such as gallium arsenide, GaAs, over a broad integrated circuit device area, is accomplished using a short time anneal, in the proximity of a uniform concentration of the most volatile element of said crystal, in solid form, over the broad integrated circuit device area surface. A GaAs integrated circuit wafer having ion implanted impurities in the surface for an integrated circuit is annealed in the vicinity of 800.degree.-900.degree. C. for a time of the order of 1-20 seconds in the proximity of a uniform layer of solid arsenic.
摘要翻译：在广泛的集成电路器件区域上的多元素化合物半导体晶体（例如砷化镓，GaAs）中的离子注入杂质活化是通过使用短时间退火在所述晶体的最易挥发元素的均匀浓度附近以固体形式，在广泛的集成电路器件区域表面上。在集成电路表面上具有离子注入杂质的GaAs集成电路晶片在800-900℃附近在均匀的固体砷层附近退火约1-20秒的时间。

59. 发明授权

US3982967A Method of proton-enhanced diffusion for simultaneously forming integrated circuit regions of varying depths 失效
标题翻译：用于同时形成不同深度的集成电路区域的质子增强扩散方法
公开(公告)号：US3982967A
公开(公告)日：1976-09-28
申请号：US562370
申请日：1975-03-26
申请人： San-Mei Ku , Charles A. Pillus , Michael R. Poponiak , Robert O. Schwenker
发明人： San-Mei Ku , Charles A. Pillus , Michael R. Poponiak , Robert O. Schwenker
IPC分类号： C30B31/22 , H01L21/22 , H01L21/265 , H01L21/761 , H01L21/263
CPC分类号： H01L21/263 , H01L21/26506
摘要： In integrated circuit fabrication, a method is provided for simultaneously forming two regions of the same conductivity-type such as the base and isolation regions. In one embodiment, an epitaxial layer of one conductivity-type is formed on a substrate of opposite conductivity-type, after which dopant ions of the opposite conductivity-type are introduced into the epitaxial surface areas which are to provide the base and isolation regions, and in addition, the isolation regions are bombarded with non-dopant ions having a maximum atomic number of two, e.g., hydrogen or helium ion while the base regions are appropriately masked and remain umbombarded, said bombardment is carried out at temperatures below 300.degree. C, preferably room temperature. The bombardment is preferably carried out so that the non-dopant ions are implanted primarily in regions below the isolation regions. Next, the wafer is heated at a temperature at a range of from 600.degree. - 900.degree. C which is substantially below normal drive-in diffusion temperatures for unbombarded doped regions. The heating to be maintained for a period sufficient to drive-in diffuse the bombarded isolation regions through the epitaxial layer into contact with the substrate but is insufficient to drive-in the unbombarded base regions to such a depth.
摘要翻译：在集成电路制造中，提供了一种用于同时形成相同导电类型的两个区域的方法，例如基极和隔离区域。在一个实施例中，在相反导电型的衬底上形成一种导电类型的外延层，之后将相反导电类型的掺杂剂离子引入到要提供基极和隔离区域的外延表面区域中，此外，隔离区域用最大原子数为2的非掺杂离子（例如氢或氦离子）进行轰击，同时基底区域被适当地掩蔽并且保持不变，所述轰击在低于300℃的温度下进行，优选室温。优选进行轰击，使得非掺杂剂离子主要被注入在隔离区域下方的区域中。接下来，将晶片在600-900℃的温度范围内加热，这对于未掺杂的掺杂区域基本上低于正常的驱动扩散温度。保持加热持续足以驱动的时间段将被轰击的隔离区域通过外延层与基板接触，但是不足以将未轰炸的基极区域驱动到这样的深度。

60. 发明授权

US11967530B2 Method for producing GaN layered substrate 有权
公开(公告)号：US11967530B2
公开(公告)日：2024-04-23
申请号：US17251483
申请日：2019-06-11
申请人： SHIN-ETSU CHEMICAL CO., LTD.
发明人： Sumio Sekiyama , Yoshihiro Kubota
IPC分类号： B32B43/00 , B32B9/00 , B32B37/00 , B32B38/00 , C23C16/30 , C30B25/18 , C30B29/40 , C30B31/22 , H01L21/02 , H01L21/78
CPC分类号： H01L21/7813 , B32B9/005 , B32B37/025 , B32B38/0008 , C23C16/303 , C30B25/186 , C30B29/406 , C30B31/22 , H01L21/0242 , H01L21/02433 , H01L21/02458 , H01L21/0254 , H01L21/0262 , B32B43/006 , B32B2310/0881 , Y10T156/1184 , Y10T156/1967
摘要： Provided is a method for producing a GaN layered substrate, comprising the steps of: subjecting a C-plane sapphire substrate 11 having an off-angle of 0.5° to 5° to a high-temperature nitriding treatment at 800° C. to 1,000° C. to carry out a surface treatment of the C-plane sapphire substrate; carrying out epitaxial growth of GaN on the surface of the surface-treated C-plane sapphire substrate 11 to produce a GaN film carrier having a surface of an N polar face; forming an ion implantation region 13ion by carrying out ion implantation on the GaN film 13; laminating and joining a support substrate 12 with the GaN film-side surface of the ion-implanted GaN film carrier; and separating at the ion-implanted region 13ion in the GaN film 13 to transfer a GaN thin film 13a onto the support substrate 12, to produce a GaN layered substrate 10 having, on the support substrate 12, a GaN thin film 13a having a surface of a Ga polar face. A GaN layered substrate having a good crystallinity and a surface of a Ga face is obtained by a single transfer process.

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