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51. 发明申请

US20070064834A1 DIRECT DIGITAL SYNTHESIZER, DIRECT DIGITAL SYNTHESIZER FOR TRANSMISSION AND DETECTION, AND MRI APPARATUS 有权
标题翻译：直接数字合成器，用于传输和检测的直接数字合成器和MRI设备
公开(公告)号：US20070064834A1
公开(公告)日：2007-03-22
申请号：US11532686
申请日：2006-09-18
申请人： Nobuhiro Yoshizawa
发明人： Nobuhiro Yoshizawa
IPC分类号： H04L27/00
CPC分类号： G06F1/0328 , G06F1/0342
摘要： In order to output amplitude data with the clock frequency higher than the clock frequency of phase data, the direct digital synthesizer for transmission and detection comprises: a transmitting phase for outputting a first phase data with a first clock frequency; a curtailing unit for outputting a second phase data with a second clock frequency smaller than the first clock frequency, and outputting additional data for compensating for phase information disappeared with curtailing process; an interpolating unit for outputting a third phase data with a third clock frequency larger than the first frequency by implementing interpolating process to the second phase data, and a detecting waveform for outputting amplitude data in accordance with the third phase data. The detecting signal amplitude data can be outputted with the third clock frequency higher than the second clock frequency of the second phase data transmitted.
摘要翻译：为了输出时钟频率高于相位数据的时钟频率的振幅数据，用于传输和检测的直接数字合成器包括：用于输出具有第一时钟频率的第一相位数据的发送相位; 用于输出具有小于第一时钟频率的第二时钟频率的第二相位数据的压缩单元，并且输出用于补偿相位信息的附加数据，该相位信息通过缩减处理消失; 内插单元，用于通过对第二相位数据进行内插处理，输出具有大于第一频率的第三时钟频率的第三相位数据;以及检测波形，用于根据第三相位数据输出幅度数据。检测信号幅度数据可以以高于所发送的第二相数据的第二时钟频率的第三时钟频率输出。

52. 发明申请

US20070040615A1 Direct digital synthesizer system and related methods 有权
标题翻译：直接数字合成器系统及相关方法
公开(公告)号：US20070040615A1
公开(公告)日：2007-02-22
申请号：US11204674
申请日：2005-08-16
申请人： Danny Ammar
发明人： Danny Ammar
IPC分类号： H03L7/00
CPC分类号： G06F1/0328 , G06F1/0342 , G06F2211/902 , H03L7/16
摘要： A direct digital synthesizer (DDS) has reduced spurious signals and includes a DDS core that produces a digital representation of a signal to be synthesized. A plurality of DDS circuits are operatively connected to the DDS core, each having a digital-to-analog converter connected to the DDS core for receiving the digital representation and converting it into a signal. A modulator is operatively connected to an oscillator circuit and digital-to-analog converter for receiving signals from the digital-to-analog converter and producing a modulated output signal. The individual frequencies of the respective DDS circuits are randomly and continuously changed from each other. A mixer receives and mixes the modulated output signals from the plurality of DDS circuits to create a mixed output signal at a selected and fixed frequency.
摘要翻译：直接数字合成器（DDS）具有减少的杂散信号，并且包括产生要合成的信号的数字表示的DDS核。多个DDS电路可操作地连接到DDS核心，每个DDS核心具有连接到DDS核心的数模转换器，用于接收数字表示并将其转换成信号。调制器可操作地连接到振荡器电路和数 - 模转换器，用于从数模转换器接收信号并产生调制输出信号。相应的DDS电路的各个频率彼此随机和连续地变化。混频器接收并混合来自多个DDS电路的调制输出信号，以选择和固定的频率创建混合输出信号。

53. 发明申请

US20050278403A1 Numerically controlled oscillator and method of operation 失效
标题翻译：数控振荡器和操作方法
公开(公告)号：US20050278403A1
公开(公告)日：2005-12-15
申请号：US10867025
申请日：2004-06-14
申请人： Brian Miller
发明人： Brian Miller
IPC分类号： G06F1/02 , G06F1/03 , G06F1/035
CPC分类号： G06F1/0353 , G06F1/0342
摘要： In one embodiment, the present invention is directed to a numerically controlled oscillator. The numerically controlled oscillator comprises: a phase accumulator for receiving an input digital word; and a phase to amplitude converter that is operatively coupled to the phase accumulator to receive a first phase signal and a second phase signal, the phase to amplitude converter calculating a sine value and a cosine value of each of the first and second phase signals, the phase to amplitude converter generating a summation of (i) a product of the sine value of the first phase signal and the cosine value of the second phase signal and (ii) a product of the sine value of the second phase signal and the cosine value of the first phase signal.
摘要翻译：在一个实施例中，本发明涉及数控振荡器。数控振荡器包括：相位累加器，用于接收输入数字字; 以及相位到幅度转换器，其可操作地耦合到所述相位累加器以接收第一相位信号和第二相位信号，所述相位幅度转换器计算所述第一和第二相位信号中的每一个的正弦值和余弦值，相位到幅度转换器产生（i）第一相位信号的正弦值与第二相位信号的余弦值的乘积和（ii）第二相位信号的正弦值与余弦值的乘积的相加的和的第一相信号。

54. 发明授权

US06333649B1 Error feed-forward direct digital synthesis 有权
标题翻译：前馈直接数字合成错误
公开(公告)号：US06333649B1
公开(公告)日：2001-12-25
申请号：US09652385
申请日：2000-08-31
申请人： Christopher H. Dick , Frederic J. Harris
发明人： Christopher H. Dick , Frederic J. Harris
IPC分类号： H03B2100
CPC分类号： G06F1/0342 , G06F1/0328 , G06F1/0353 , G06F2211/902 , H03B21/02
摘要： A circuit arrangement and method for direct digital synthesis (DDS). In various embodiments, the invention feeds forward the phase error introduced by a quantizer in a DDS system. The error is fed forward to adjust the sine and cosine values that are obtained based on output from the quantizer. Correction of the sine and cosine values based on the fed-forward error values results in a significant reduction in the effect of spectral artifacts.
摘要翻译：一种用于直接数字合成（DDS）的电路装置和方法。在各种实施例中，本发明提供了量化器在DDS系统中引入的相位误差。向前馈送误差，以根据量化器的输出调整获得的正弦和余弦值。基于前馈误差值校正正弦和余弦值导致光谱伪影的显着降低。

55. 发明授权

US5859905A Cycle-modulating type of dual-tone multifrequency generator 失效
标题翻译：循环调制型双音多频发生器
公开(公告)号：US5859905A
公开(公告)日：1999-01-12
申请号：US716937
申请日：1996-09-20
申请人： Rong-Tyan Wu , Herman Chung
发明人： Rong-Tyan Wu , Herman Chung
IPC分类号： G06F1/03 , H04L27/30 , H04M1/50 , H04M1/00 , H03M1/66 , H04M3/00
CPC分类号： H04L27/30 , G06F1/0342 , H04M1/505
摘要： A cycle-modulating DTMF generator for generating a DTMF signal; the generator comprises a programmable time-pulse generator, counters or up/down counters, a memory unit for storing data, a digital adder, and a digital-to-analog converter. The circuit of such generator is substantially a digital circuit so as to overcome the problem of signal distortion, which usually exists in an analog circuit.
摘要翻译：用于产生DTMF信号的循环调制DTMF发生器; 发生器包括可编程时脉脉冲发生器，计数器或上/下计数器，用于存储数据的存储单元，数字加法器和数模转换器。这种发生器的电路基本上是数字电路，以便克服通常存在于模拟电路中的信号失真问题。

56. 发明授权

US4654773A Inverter control circuit 失效
标题翻译：变频器控制电路
公开(公告)号：US4654773A
公开(公告)日：1987-03-31
申请号：US770526
申请日：1985-08-29
申请人： Tomotaka Ito , Katsuhiko Chonan
发明人： Tomotaka Ito , Katsuhiko Chonan
IPC分类号： G06F1/03 , H02M7/48 , H02M7/00 , G06F15/20
CPC分类号： G06F1/0342
摘要： An inverter control circuit produces pulse width modulated waveform patterns approximating an a.c. power sine wave signal from a sequence of data words stored in ROM wherein the sequence is cycled over an interval corresponding to 7.5.degree. or 15.degree. of the desired sine wave. Respective portions of a 0.degree.-60.degree. segment and a 120.degree.-180.degree. segment of the desired sine wave are generated from corresponding bits of the words during successive 7.5.degree. or 15.degree. intervals. The 60.degree.-120.degree. segment is approximated by a steady state signal. Inversions of the 0.degree.-60.degree., 60.degree.-120.degree. and 120.degree.-180.degree. segments form the corresponding 180.degree.-240.degree., 240.degree.-300.degree. and 300.degree.-360.degree. segments. Selection of the appropriate generated segments during successive 60.degree. intervals produces one or more phases of the desired power signal. Further reduction in ROM requirement is made by stored data corresponding to only the first 30.degree. portions of the 0.degree.-60.degree. and 120.degree.-180.degree. segments; the full 60.degree. segments are formed by reversing the read out sequence, as well as the selector operation, during the second 30.degree. portion of the 60.degree. segments.
摘要翻译：逆变器控制电路产生近似于a.c.的脉宽调制波形图案。来自存储在ROM中的数据字序列的功率正弦波信号，其中序列在对应于所需正弦波的7.5°或15°的间隔上循环。在连续的7.5°或15°间隔期间，从相应的位产生所需正弦波的0°-60°段和120°-180°的各部分。 60°-120°段由稳态信号近似。 0°-60°，60°-120°和120°-180°段的反转形成相应的180°-240°，240°-300°和300°-360°段。在连续60°间隔期间选择合适的生成段产生期望功率信号的一个或多个相位。通过对应于0°-60°和120°-180°段的前30°的存储数据进一步减少ROM要求。在60度段的第二个30度部分，通过反转读出顺序以及选择器操作形成完整的60度段。

57. 发明授权

US4105939A Direct digital technique for generating an AC waveform 失效
标题翻译：用于产生交流波形的直接数字技术
公开(公告)号：US4105939A
公开(公告)日：1978-08-08
申请号：US713177
申请日：1976-08-10
申请人： Charles H. Culbertson
发明人： Charles H. Culbertson
IPC分类号： H03B28/00 , G06F1/03 , H02M7/529 , G05B11/28
CPC分类号： H02M7/529 , G06F1/0342
摘要： A digital circuit employing a programmable read only memory (PROM) provides direct digital driving of semiconductor devices comprising a bridge circuit of an inverter to develop a predetermined AC output waveform. The combination of the programmable read only memory and an up-down counter provides the capability of stopping the output waveform at predetermined points as well as reversing the phase direction of the AC output waveform to thereby permit greater control of an electrical system driven by the AC output waveform.
摘要翻译：采用可编程只读存储器（PROM）的数字电路提供包括逆变器的桥式电路的半导体器件的直接数字驱动，以开发预定的AC输出波形。可编程只读存储器和升降计数器的组合提供在预定点停止输出波形的能力以及反转AC输出波形的相位方向，从而允许对由AC驱动的电气系统进行更大的控制输出波形。

58. 发明授权

US3633017A Digital waveform generator 失效
标题翻译：数字波形发生器
公开(公告)号：US3633017A
公开(公告)日：1972-01-04
申请号：US3633017D
申请日：1970-01-07
申请人： SPERRY RAND CORP
发明人： CROOKE ARTHUR W , HANNA MICHAEL E JR
IPC分类号： G06F1/03 , G06F17/17 , G06F7/385 , G06F15/34
CPC分类号： G06F17/17 , G06F1/0335 , G06F1/0342
摘要： A digital waveform generator for providing digital waveforms particularly of the sinusoidal type. The invention comprises means for providing a sequence of digital numbers whose values vary in accordance with the phase versus time function of the sinusoidal waveform to be generated. The function of time may be linear or nonlinear in accordance with the desired waveform. The sequence of numbers is utilized to address a digital memory wherein is stored the digital sinusoidal functional values corresponding to the digital phase values. As the sequence of phase numbers addresses the memory in accordance with the function of time, the corresponding sequence of sinusoidal numbers are provided by the memory, thus generating the desired digital waveform. Two embodiments are disclosed, one of which utilizes two registers for controlling the frequency and phase, respectively, of the output waveform. The other embodiment utilizes a difference equation computer to approximate the phase function by a recursively generated polynomial function of time.
摘要翻译：一种数字波形发生器，用于提供特别是正弦波型的数字波形。本发明包括用于提供数字序列序列的装置，其数值根据要产生的正弦波形的相位对时间函数而变化。根据期望的波形，时间的函数可以是线性的或非线性的。数字序列用于寻址数字存储器，其中存储对应于数字相位值的数字正弦函数值。由于相序序列根据时间的功能对存储器进行寻址，因此存储器提供相应的正弦数字序列，从而产生所需的数字波形。公开了两个实施例，其中之一使用两个寄存器来分别控制输出波形的频率和相位。另一个实施例利用差分方程计算机通过递归生成的时间多项式函数近似相位函数。

59. 发明申请

US20130181753A1 High Accuracy Sin-Cos Wave and Frequency Generators, and Related Systems and Methods 有权
标题翻译：高精度Sin-Cos波和频率发生器及相关系统和方法
公开(公告)号：US20130181753A1
公开(公告)日：2013-07-18
申请号：US13487804
申请日：2012-06-04
申请人： David J. Hoyle
发明人： David J. Hoyle
IPC分类号： H03B28/00
CPC分类号： G06F1/0356 , G06F1/0342 , G06F1/0353 , G06F2101/04
摘要： High accuracy sin-cos wave and frequency generators, and related systems and methods. In non-limiting embodiments disclosed herein, the sin-cos wave generators can provide highly accurate sin-cos values for sin-cos wave generation with low hardware costs and small lookup table requirements. The embodiments disclosed herein may include a circuit to conduct an arithmetic approximation of a sin-cos curve based on a phase input. The circuit may be in communication with a point lookup table and a correction lookup table. The tables may receive the phase input and match the phase input to main sin-cos endpoints associated with the phase, and to a correction value for the phase. These values which are selected based on the phase input, may be communicated to a converter circuit where the arithmetic functions are applied to the values resulting in a sin-cos curve value.
摘要翻译：高精度正弦波和频率发生器及相关系统和方法。在本文公开的非限制性实施例中，正弦波发生器可以以低硬件成本和小的查找表要求为正弦波产生提供高精度的sin-cos值。本文公开的实施例可以包括基于相位输入进行sin-cos曲线的算术近似的电路。电路可以与点查找表和校正查找表通信。这些表可以接收相位输入，并且将相位输入匹配到与相位相关联的主sin-cos端点以及相位的校正值。基于相位输入选择的这些值可以传送到转换器电路，其中将算术函数应用于产生sin-cos曲线值的值。

60. 发明授权

US08437427B2 Arbitrary frequency shifter in communication systems 有权
标题翻译：通信系统中任意移频器
公开(公告)号：US08437427B2
公开(公告)日：2013-05-07
申请号：US12569290
申请日：2009-09-29
申请人： Jeng-Hong Chen
发明人： Jeng-Hong Chen
IPC分类号： H03K9/00 , H04L27/001
CPC分类号： G06F1/022 , G06F1/0342
摘要： This invention describes a programmable, digital implementation to shift an arbitrary frequency, or various frequencies in various communication systems of the original signal in the frequency domain. The correspondent phase accumulation to perform the desired frequency shift per sampling instant is perfectly tracked by counting up or down a simple integer. Several arbitrary frequency shifters with different mathematical models are provided. The correspondent implementations with Look-Up-Tables (LUT) are derived for high-speed implementations without further calculations of the values of the sine and cosine functions every sampling instant. Furthermore, a simple shift-and-add phase rotation is described to replace the four required real multiplications. If the original complex signal contains only one-bit each from real part and imaginary part, a surprisingly simple implementation is derived and disclosed for the overall arbitrary frequency shift operation. Further simplifications are also disclosed to make this invention feasible for high sampling frequencies and small frequency drifts.
摘要翻译：本发明描述了一种可编程的数字实现，以在频域中移动原始信号的各种通信系统中的任意频率或各种频率。通过向上或向下计数一个简单的整数来完美地跟踪每个采样时刻执行所需频移的通讯相位累加。提供了具有不同数学模型的几个任意频率移位器。具有查找表（LUT）的通信实现被导出用于高速实现，而不需要在每个采样时刻进一步计算正弦和余弦函数的值。此外，描述了简单的移位和加法相位旋转来代替四个所需的实数乘法。如果原始复信号仅包含来自实部和虚部的一位，则导出并公开了用于总体任意频移操作的令人惊讶的简单实现。还公开了进一步简化以使本发明对于高采样频率和小的频率漂移是可行的。

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