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    • 60. 发明申请
    • Method of manufacturing wafer-level chip-size package and molding apparatus used in the method
    • 本方法中使用的晶圆级芯片尺寸封装和成型装置的制造方法
    • US20080187613A1
    • 2008-08-07
    • US12078638
    • 2008-04-02
    • Tae-Sung Yoon
    • Tae-Sung Yoon
    • B29C45/03B29C45/14
    • B29C43/36B29C43/32H01L23/3114H01L2224/16H01L2224/274
    • Provided are a method of manufacturing wafer-level chip-size packages and a molding apparatus suitable for practicing the method whereby a semiconductor wafer having a plurality of semiconductor chips formed thereon may be encapsulated. The semiconductor wafer, typically with a plurality of conductive bumps extending from the semiconductor chips, will be placed in a cavity formed between upper and lower molds. Injection molding of an encapsulant composition or compression molding of encapsulant sheets may then be used to apply encapsulating layers to the upper and lower surfaces of the semiconductor wafer in a substantially simultaneous manner, thereby reducing the likelihood of warping and mechanical damage to the semiconductor wafer. The wafer-level chip-size packages can then be separated from the encapsulated semiconductor wafer.
    • 提供一种制造晶片级芯片尺寸封装的方法和适于实施其上可形成其上形成有多个半导体芯片的半导体晶片的方法的成型装置。 通常具有从半导体芯片延伸的多个导电凸块的半导体晶片将被放置在形成在上模和下模之间的空腔中。 密封剂组合物的注射成型或密封片的压塑可以用于以基本上同时的方式将包封层施加到半导体晶片的上表面和下表面,从而减少翘曲和对半导体晶片的机械损伤的可能性。 然后可以将晶片级芯片尺寸封装与封装的半导体晶片分离。