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51. 发明授权

US10148571B2 Jump on a match optimization for longest prefix match using a binary search tree 有权
公开(公告)号：US10148571B2
公开(公告)日：2018-12-04
申请号：US15186562
申请日：2016-06-20
申请人： Mellanox Technologies TLV Ltd.
发明人： Aviv Kfir , Pedro Reviriego , Salvatore Pontarelli , Gil Levy
IPC分类号： H04L12/745 , H04L12/753
摘要： A routing table is represented as a binary search tree ordered by prefix lengths. Markers are placed to guide accessing nodes in designated subtrees to search for a longest prefix match with destination addresses of data packet. Destination descendant nodes in remote hierarchical levels of the tree are associated with the markers. The traversal of the binary search tree is conducted by accessing the respective destination descendant nodes while avoiding accessing nodes in intermediate hierarchical levels. The packet is processed using the longest prefix match.

52. 发明授权

US09853900B1 Using consistent hashing for ECMP routing 有权
公开(公告)号：US09853900B1
公开(公告)日：2017-12-26
申请号：US15670055
申请日：2017-08-07
申请人： Mellanox Technologies TLV Ltd.
发明人： Liron Mula , Gil Levy , Aviv Kfir
IPC分类号： H04L12/28 , H04L12/803 , H04L12/707 , H04L12/709 , H04L12/24 , H04L12/743
CPC分类号： H04L47/125 , H04L41/0893 , H04L45/24 , H04L45/245 , H04L45/7453
摘要： ECMP routing is carried out in fabric of network entities by representing valid destinations and invalid destinations in a group of the entities by a member vector. The order of the elements in the member vector is permuted and fanned out. A portion of the elements in the fanned out vector is pseudo-randomly masked. A flow of packets is transmitted to the first valid destination in the masked member vector.

53. 发明授权

US09673934B2 Error correction on demand 有权
公开(公告)号：US09673934B2
公开(公告)日：2017-06-06
申请号：US14870031
申请日：2015-09-30
申请人： Mellanox Technologies TLV Ltd.
发明人： Liron Mula , Ran Ravid , Oded Wertheim , Ran Sela , Roy Kriss
IPC分类号： H03M13/00 , H04L1/00 , H04L29/08
CPC分类号： H04L1/0045 , H04L1/0041 , H04L1/0053 , H04L69/324
摘要： Communication apparatus includes a PHY interface, which is configured to receive over a communication link and to decode a sequence of symbols arranged in a series of data blocks. The PHY interface includes an error correction circuit, which when actuated, corrects errors in decoded data symbols using FEC symbols in the data blocks. The decoded data include data packets containing respective error detection codes. A memory buffers the data blocks received by the PHY interface. A data link layer interface receives the data packets from the PHY interface, checks the data packets using respective error detection codes, and upon detecting an error in a given data packet, signals the PHY interface to read from the memory at least one buffered data block that contains the given data packet while actuating the error correction circuit to correct the error using the FEC symbols in the at least one buffered data block.

54. 发明授权

US09525623B2 Implementing MPLS pipe models in a lossless network 有权
标题翻译：在无损网络中实现MPLS管道模型
公开(公告)号：US09525623B2
公开(公告)日：2016-12-20
申请号：US14705003
申请日：2015-05-06
申请人： MELLANOX TECHNOLOGIES TLV LTD.
发明人： Barak Gafni , Ilya Vershkov
IPC分类号： H04L12/28 , H04L12/723 , H04L12/721
CPC分类号： H04L45/50 , H04L45/66
摘要： A method for communication includes defining a pipe traversing a sequence of routers through an MPLS network, and specifying for the pipe an outer label that indicates a first quality of service (QoS) for the packets in the pipe. Upon receiving a packet at the ingress to the pipe, the outer label is appended to the packet, and the packet with the outer label is forwarded through the pipe. At each of the routers in the sequence, the packet is forwarded through the pipe in accordance with the outer label at the first quality of service. At a transitional router, in proximity to the egress from the pipe, the outer label is popped from the packet, and a second QoS is identified based on a field remaining in the packet after popping the outer label. The packet is then forwarded at the second QoS.
摘要翻译：一种通信方法包括定义穿过MPLS网络的路由器序列的管道，并且为管道指定管道中的分组的第一服务质量（QoS）的外部标签。在入口处收到一个数据包后，外部标签被附加到数据包，外部标签的数据包通过管道传送。在序列中的每个路由器上，根据第一服务质量的外部标签，通过管道转发数据包。在过渡路由器处，在距离管道的出口附近，外部标签从分组中弹出，并且在弹出外部标签之后，基于分组中剩余的字段来识别第二QoS。然后以第二QoS转发该分组。

55. 发明授权

US09306769B2 Cell-based link-level retry scheme 有权
标题翻译：基于单元的链路级重试方案
公开(公告)号：US09306769B2
公开(公告)日：2016-04-05
申请号：US12897808
申请日：2010-10-05
申请人： Gil Bloch , Michael Kagan , Diego Crupnicoff , Tamir Azarzar , Ran Ravid
发明人： Gil Bloch , Michael Kagan , Diego Crupnicoff , Tamir Azarzar , Ran Ravid
IPC分类号： H04L12/28 , H04L12/56 , H04L12/54 , H04L12/801 , H04L12/70
CPC分类号： H04L12/5601 , H04L47/34 , H04L2012/5652
摘要： A method for communication includes receiving a packet at a first node for transmission over a link to a second node. The data in the packet is divided into a sequence of cells of a predetermined data size. The cells have respective sequence numbers. The cells are transmitted in sequence over the link, while storing the transmitted cells in a buffer at the first node. The first node receives acknowledgments indicating the respective sequence numbers of the transmitted cells that were received at the second node. Upon receiving an indication at the first node that a transmitted cell having a given sequence number was not properly received at the second node, the stored cells are retransmitted from the buffer starting from the cell with the given sequence number.
摘要翻译：一种用于通信的方法包括在第一节点处接收分组以便通过到第二节点的链路进行传输。分组中的数据被分成预定数据大小的小区序列。单元格具有各自的序列号。小区在链路上按顺序发送，同时将发送的小区存储在第一个节点的缓冲区中。第一节点接收指示在第二节点处接收到的发送小区的各个序列号的确认。在第一节点处接收到具有给定序列号的传送小区在第二节点处未被正确接收的指示时，从具有给定序列号的小区开始从缓冲区重传所存储的小区。

56. 发明授权

US11637739B2 Direct memory access (DMA) engine for diagnostic data 有权
公开(公告)号：US11637739B2
公开(公告)日：2023-04-25
申请号：US17145341
申请日：2021-01-10
申请人： MELLANOX TECHNOLOGIES TLV LTD.
发明人： Niv Aibester , Aviv Kfir , Gil Levy , Liron Mula
IPC分类号： H04L41/06
摘要： A network-connected device includes at least one communication port, packet processing circuitry and Diagnostics Direct Memory Access (DMA) Circuitry (DDC). The at least one communication port is configured to communicate packets over a network. The packet processing circuitry is configured to receive, buffer, process and transmit the packets. The DDC is configured to receive a definition of (i) one or more diagnostic events, and (ii) for each diagnostic event, a corresponding list of diagnostic data that is generated in the packet processing circuitry and that pertains to the diagnostic event, and, responsively to occurrence of a diagnostic event, to gather the corresponding list of diagnostic data from the packet processing circuitry.

57. 发明授权

US11558316B2 Zero-copy buffering of traffic of long-haul links 有权
公开(公告)号：US11558316B2
公开(公告)日：2023-01-17
申请号：US17175716
申请日：2021-02-15
申请人： MELLANOX TECHNOLOGIES TLV LTD.
发明人： Liron Mula , Idan Matari , Niv Aibester , George Elias , Lion Levi
IPC分类号： H04L12/861 , H04L49/90 , H04L47/32 , H04L49/9047
摘要： A network device includes multiple ports, multiple buffer slices, a controller, and buffer control circuitry. The multiple ports are configured to communicate packets over a network. The multiple buffer slices are linked respectively to the multiple ports. The controller is configured to allocate a group of two or more of the buffer slices to a selected port among the ports. The buffer control circuitry is configured to buffer the packets, communicated via the selected port, in the group of the buffer slices, using zero-copy buffering.

58. 发明授权

US11552882B2 Efficient propagation of fault routing notifications 有权
公开(公告)号：US11552882B2
公开(公告)日：2023-01-10
申请号：US17211904
申请日：2021-03-25
申请人： MELLANOX TECHNOLOGIES TLV LTD.
发明人： Jose Yallouz , Lion Levi , Gil Mey-Tal , Daniel Klein
IPC分类号： H04L12/703 , H04L12/721 , H04L12/707 , H04L12/717 , H04L45/28 , H04L45/42 , H04L45/00 , H04L45/12
摘要： A network element includes processing circuitry and multiple ports. The ports connect using links to a communication network. The processing circuitry is configured to receive packets via the ports and forward the received packets to respective destination addresses via the ports. The destination addresses are organized in address groups, each address group including multiple destination addresses of nodes connected to a common network element in the communication network. The processing circuitry is further configured to, in response to identifying that a given port connects to a faulty link, determine one or more address groups that became unreachable via the given port due to the faulty link, generate a notification reporting one or more of the determined address groups that are unreachable via any port other than the given port, and transmit the notification to one or more other network elements, via one or more ports other than the given port.

59. 发明授权

US11502912B2 Cache memory management using fingerprints 有权
公开(公告)号：US11502912B2
公开(公告)日：2022-11-15
申请号：US17137729
申请日：2020-12-30
申请人： MELLANOX TECHNOLOGIES TLV LTD.
发明人： Gil Levy , Pedro Reviriego , Salvatore Pontarelli
IPC分类号： H04L41/12 , H04L41/14 , H04L1/00 , H04L69/22 , H03M13/03 , H04L49/00 , H04L67/5682
摘要： A network device includes at least one communication ingress port, ingress packet processing circuitry and a packet-action cache memory (PACM). The at least one communication ingress port is configured to receive packets including packet headers from a network. The ingress packet processing circuitry is configured to receive the packets and to process the packets in accordance with respective packet actions specified for the packets. The PACM is configured to store one or more of the packet actions in association with one or more respective fingerprints which are calculated over the packet headers of the corresponding packets, for use by the ingress packet processing circuitry. The fingerprints are smaller than the corresponding packet headers.

60. 发明申请

US20220311702A1 Efficient propagation of fault routing notifications 有权
公开(公告)号：US20220311702A1
公开(公告)日：2022-09-29
申请号：US17211904
申请日：2021-03-25
申请人： MELLANOX TECHNOLOGIES TLV LTD.
发明人： Jose Yallouz , Lion Levi , Gil Mey-Tal , Daniel Klein
IPC分类号： H04L12/703 , H04L12/721 , H04L12/707 , H04L12/717
摘要： A network element includes processing circuitry and multiple ports. The ports connect using links to a communication network. The processing circuitry is configured to receive packets via the ports and forward the received packets to respective destination addresses via the ports. The destination addresses are organized in address groups, each address group including multiple destination addresses of nodes connected to a common network element in the communication network. The processing circuitry is further configured to, in response to identifying that a given port connects to a faulty link, determine one or more address groups that became unreachable via the given port due to the faulty link, generate a notification reporting one or more of the determined address groups that are unreachable via any port other than the given port, and transmit the notification to one or more other network elements, via one or more ports other than the given port.

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