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51. 发明授权

US6043118A Semiconductor memory circuit device and method for fabricating a semiconductor memory device circuit 失效
标题翻译：半导体存储器电路器件及半导体存储器件电路的制造方法
公开(公告)号：US6043118A
公开(公告)日：2000-03-28
申请号：US800018
申请日：1997-02-13
申请人： Naokatsu Suwanai , Hiroyuki Miyazawa , Atushi Ogishima , Masaki Nagao , Kyoichiro Asayama , Hiroyuki Uchiyama , Yoshiyuki Kaneko , Takashi Yoneoka , Kozo Watanabe , Kazuya Endo , Hiroki Soeda
发明人： Naokatsu Suwanai , Hiroyuki Miyazawa , Atushi Ogishima , Masaki Nagao , Kyoichiro Asayama , Hiroyuki Uchiyama , Yoshiyuki Kaneko , Takashi Yoneoka , Kozo Watanabe , Kazuya Endo , Hiroki Soeda
IPC分类号： H01L21/8242 , H01L27/108
CPC分类号： H01L27/10844 , H01L27/10805 , H01L27/10808
摘要： In a semiconductor memory circuit device wherein each memory cell is constituted by a series circuit of a memory cell selecting MISFET and an information storing capacitor of a stacked structure, there are present in a first region as a memory cell array region a first MISFET having a gate electrode and source and drain regions; first and second capacity electrodes and a dielectric film extending onto a first insulating film on the gate electrode; a second insulating film positioned on the second capacity electrode; and a first wiring positioned on the second insulating film, while in a second region as a peripheral circuit region there are present a second MISFET having a gate electrode and source and drain regions; a first insulating film on the gate electrode; a third insulating film on the first insulating film; a second insulating film on the third insulating film; and a second wiring on the second insulating film.
摘要翻译：在其中每个存储单元由存储单元选择MISFET的串联电路和层叠结构的信息存储电容器构成的半导体存储器电路器件中，在第一区域中存在作为存储单元阵列区域的第一MISFET，其具有栅极电极和源极和漏极区域; 第一和第二电容电极和延伸到栅电极上的第一绝缘膜上的电介质膜; 位于所述第二容量电极上的第二绝缘膜; 以及位于所述第二绝缘膜上的第一布线，而在作为外围电路区域的第二区域中存在具有栅极电极和源极和漏极区域的第二MISFET; 栅电极上的第一绝缘膜; 第一绝缘膜上的第三绝缘膜; 第三绝缘膜上的第二绝缘膜; 以及在第二绝缘膜上的第二布线。

52. 发明授权

US5389558A Method of making a semiconductor memory circuit device 失效
标题翻译：制造半导体存储器电路器件的方法
公开(公告)号：US5389558A
公开(公告)日：1995-02-14
申请号：US104014
申请日：1993-08-10
申请人： Naokatsu Suwanai , Hiroyuki Miyazawa , Atushi Ogishima , Masaki Nagao , Kyoichiro Asayama , Hiroyuki Uchiyama , Yoshiyuki Kaneko , Takashi Yoneoka , Kozo Watanabe , Kazuya Endo , Hiroki Soeda
发明人： Naokatsu Suwanai , Hiroyuki Miyazawa , Atushi Ogishima , Masaki Nagao , Kyoichiro Asayama , Hiroyuki Uchiyama , Yoshiyuki Kaneko , Takashi Yoneoka , Kozo Watanabe , Kazuya Endo , Hiroki Soeda
IPC分类号： H01L21/8242 , H01L27/108 , H01L21/70
CPC分类号： H01L27/10844 , H01L27/10805 , H01L27/10808
摘要： In a semiconductor memory circuit device wherein each memory cell is constituted by a series circuit of a memory cell selecting MISFET and an information storing capacitor of a stacked structure, there are present in a first region as a memory cell array region a first MISFET having a gate electrode and source and drain regions; first and second capacity electrodes and a dielectric film extending onto a first insulating film on the gate electrode; a second insulating film positioned on the second capacity electrode; and a first wiring positioned on the second insulating film, while in a second region as a peripheral circuit region there are present a second MISFET having a gate electrode and source and drain regions; a first insulating film on the gate electrode; a third insulating film on the first insulating film; a second insulating film on the third insulating film; and a second wiring on the second insulating film.
摘要翻译：在其中每个存储单元由存储单元选择MISFET的串联电路和层叠结构的信息存储电容器构成的半导体存储器电路器件中，在第一区域中存在作为存储单元阵列区域的第一MISFET，其具有栅极电极和源极和漏极区域; 第一和第二电容电极和延伸到栅电极上的第一绝缘膜上的电介质膜; 位于所述第二容量电极上的第二绝缘膜; 以及位于所述第二绝缘膜上的第一布线，而在作为外围电路区域的第二区域中存在具有栅极电极和源极和漏极区域的第二MISFET; 栅电极上的第一绝缘膜; 第一绝缘膜上的第三绝缘膜; 第三绝缘膜上的第二绝缘膜; 以及在第二绝缘膜上的第二布线。

53. 发明授权

US5266825A Thin-film device 失效
标题翻译：薄膜装置
公开(公告)号：US5266825A
公开(公告)日：1993-11-30
申请号：US864937
申请日：1992-04-07
申请人： Toshihisa Tsukada , Yoshiyuki Kaneko
发明人： Toshihisa Tsukada , Yoshiyuki Kaneko
IPC分类号： H01L29/423 , H01L29/45 , H01L29/786 , H01L27/01 , G02F1/13 , H01L27/12 , H01L29/78
CPC分类号： H01L29/458 , H01L29/42384 , H01L29/78606
摘要： A thin-film transistor using hydrogenated amorphous silicon (a-Si:H), and particularly a thin-film device such as a thin-film transistor having high conductivity, large drivability and high process margin, and a display panel using the same transistors. The object of the invention is to reduce defects due to shorts between the gate and the source or between the gate and the drain, to prevent signal line defect even in case defects develop due to shorts, and to expand the design margin and process margin in the array. A capacity is connected to the gate electrode of the channel side and a voltage is applied to the gate electrode via the capacity.
摘要翻译：使用氢化非晶硅（a-Si：H）的薄膜晶体管，特别是具有高导电性，大驱动性和高工艺裕度的诸如薄膜晶体管的薄膜器件以及使用相同晶体管的显示面板。本发明的目的是减少由于栅极和源极之间或者栅极与漏极之间的短路导致的缺陷，即使在由于短路导致的缺陷发生的情况下也可防止信号线缺陷，并且扩大设计余量和工艺裕度阵列。电容器连接到沟道侧的栅电极，并通过该电容将电压施加到栅电极。

54. 发明授权

US5153690A Thin-film device 失效
标题翻译：薄膜装置
公开(公告)号：US5153690A
公开(公告)日：1992-10-06
申请号：US597323
申请日：1990-10-15
申请人： Toshihisa Tsukada , Yoshiyuki Kaneko
发明人： Toshihisa Tsukada , Yoshiyuki Kaneko
IPC分类号： H01L29/423 , H01L29/45 , H01L29/786
CPC分类号： H01L29/42384 , H01L29/458 , H01L29/78606
摘要： A thin-film transistor using hydrogenated amorphous silicon (a-Si:H), and particularly a thin-film device such as a thin-film transistor having high conductivity, large drivability and high process margin, and a display panel using the same transistors. The object of the invention is to reduce defects due to shorts between the gate and the source or between the gate and the drain, to prevent signal line defect even in case defects develop due to shorts, and to expand the design margin and process margin in the array. A capacity is connected to the gate electrode of the channel side and a voltage is applied to the gate electrode via the capacity.
摘要翻译：使用氢化非晶硅（a-Si：H）的薄膜晶体管，特别是具有高导电性，大驱动性和高工艺裕度的诸如薄膜晶体管的薄膜器件以及使用相同晶体管的显示面板。本发明的目的是减少由于栅极和源极之间或者栅极与漏极之间的短路导致的缺陷，即使在由于短路导致的缺陷发生的情况下也可防止信号线缺陷，并且扩大设计余量和工艺裕度阵列。电容器连接到沟道侧的栅电极，并通过该电容将电压施加到栅电极。

55. 发明授权

US5066948A Receiver for use in remote control system 失效
标题翻译：接收机用于遥控系统
公开(公告)号：US5066948A
公开(公告)日：1991-11-19
申请号：US577075
申请日：1990-09-04
申请人： Yoshiyuki Kaneko
发明人： Yoshiyuki Kaneko
IPC分类号： H04Q9/00 , G05B24/02 , G08C23/04
CPC分类号： G08C23/04
摘要： A receiver for use in a remote control system such as a remote controller for remotely controlling, for example, shutter release operation of a camera. The remote control system makes use of a remote control signal such as infrared pulses of a predetermined period or frequency. The receiver has a counter for counting a received signal at a timing synchronous with the period of the remote control signal, and a judging circuit for judging the received signal as being the remote control signal when the value counted by the counter has reached a predetermined value in a predetermined counting period.
摘要翻译：用于遥控系统（例如遥控器）的接收器，用于远程控制例如相机的快门释放操作。遥控系统利用诸如预定周期或频率的红外脉冲的遥控信号。接收机具有用于在与遥控信号的周期同步的定时对接收信号进行计数的计数器，以及当由计数器计数的值已经达到预定值时，将接收信号判断为遥控信号的判断电路在预定的计数周期内。

56. 发明授权

US08474389B2 Personal watercraft 有权
标题翻译：个人船只
公开(公告)号：US08474389B2
公开(公告)日：2013-07-02
申请号：US13070641
申请日：2011-03-24
申请人： Kenichi Otsuka , Yoshiyuki Kaneko
发明人： Kenichi Otsuka , Yoshiyuki Kaneko
IPC分类号： B63B17/00
CPC分类号： B63B35/731 , B63B29/04 , B63B2029/043
摘要： A sectional shape of a seat provided on a personal watercraft includes first to third seat portions, first to third hip support portions, and first and second rearward inclined portions. The first hip support portion extends rearward to a height higher than the second seat portion from the first seat portion. The second hip support portion extends rearward to a height higher than the third seat portion and higher than the first hip support portion from the second seat portion. The third hip support portion extends rearward to a height higher than the second hip support portion from the third seat portion. The second rearward inclined portion is inclined at an inclination angle larger than an inclination angle of the first rearward inclined portion with respect to a horizontal plane.
摘要翻译：设置在个人船上的座椅的截面形状包括第一至第三座椅部分，第一至第三臀部支撑部分以及第一和第二后部倾斜部分。第一臀部支撑部从第一座部向后延伸到高于第二座部的高度。第二臀部支撑部分向后延伸到高于第三座椅部分的高度，并且比第二臀部支撑部分高。第三臀部支撑部分从第三座部分向后延伸到高于第二臀部支撑部分的高度。第二后倾部以比第一后方倾斜部相对于水平面的倾斜角大的倾斜角度倾斜。

57. 发明授权

US08432383B2 Display module 有权
标题翻译：显示模块
公开(公告)号：US08432383B2
公开(公告)日：2013-04-30
申请号：US13450523
申请日：2012-04-19
申请人： Toshihiro Sato , Yoshiyuki Kaneko
发明人： Toshihiro Sato , Yoshiyuki Kaneko
IPC分类号： G09G3/32
CPC分类号： G09G3/3233 , G09G3/2003 , G09G3/32 , G09G3/3225 , G09G3/3266 , G09G3/3275 , G09G2300/04 , G09G2300/0426 , G09G2300/0842 , G09G2310/0262 , G09G2310/0272 , G09G2310/0275 , G09G2310/0286 , G09G2310/0289 , G09G2330/04 , H01L27/124 , H01L27/1255 , H01L27/3248 , H01L27/3262 , H01L27/3265 , H01L27/3276 , H01L51/5228 , H01L51/524 , H01L51/5246
摘要： A display module including a substrate having a plurality of pixels, a data line that supplies a data signal to a pixel, a current supply line that supplies electric current to the pixel, a data driving circuit that supplies a data signal to the data line, and a gate driving circuit thereon. The plurality of pixels are arranged in a display area of the substrate, and each of the plurality of pixels include a light emitting device, a first thin film transistor connected to the data line that supplies the data signal, a second thin film transistor connected to the current supply line, and a capacitor. The light emitting device includes a first electrode layer connected to the second thin film transistor, an organic layer formed on the first electrode layer, and a second electrode layer formed on the organic layer.
摘要翻译：一种显示模块，包括具有多个像素的基板，向像素提供数据信号的数据线，向该像素提供电流的电流供给线，向数据线提供数据信号的数据驱动电路，和栅极驱动电路。多个像素被布置在基板的显示区域中，并且多个像素中的每个像素包括发光器件，连接到提供数据信号的数据线的第一薄膜晶体管，连接到电流供应线路和电容器。发光器件包括连接到第二薄膜晶体管的第一电极层，形成在第一电极层上的有机层和形成在有机层上的第二电极层。

58. 发明授权

US08174467B2 Picture image display device and method of driving the same 有权
标题翻译：图像显示装置及其驱动方法
公开(公告)号：US08174467B2
公开(公告)日：2012-05-08
申请号：US12359455
申请日：2009-01-26
申请人： Yoshiyuki Kaneko , Sukekazu Aratani
发明人： Yoshiyuki Kaneko , Sukekazu Aratani
IPC分类号： G09G3/30
CPC分类号： G09G3/3233 , G09G2300/0439 , G09G2300/0814 , G09G2300/0842 , G09G2300/0866 , G09G2310/0254 , G09G2310/0256 , G09G2310/061 , G09G2320/0261 , G09G2320/043 , G09G2320/10 , H01L27/3244 , Y10T82/16672
摘要： A display device including: a display portion with gate lines, a plurality of data lines, TFTs and OLED elements, a scanning line driving circuit which feeds scanning signals for the gate lines; a data line driving circuit which feeds picture image signals for the data lines; a display control controller which provides timing control signals to the scanning line driving circuit and the data line driving circuit and the picture image signals to the data line driving circuit. The timing control signals include a first control signal for driving the TFTs and introducing a light emitting period within each frame period in which the OLED elements are caused to emit light and a second control signal for driving the TFTs and introducing a no-light emitting period within each frame period in which the oled elements are caused to be quenched.
摘要翻译：一种显示装置，包括：具有栅极线的显示部分，多条数据线，TFT和OLED元件;扫描线驱动电路，为栅极线馈送扫描信号; 数据线驱动电路，用于馈送数据线的图像信号; 显示控制控制器，其向扫描线驱动电路和数据线驱动电路提供定时控制信号，并将图像信号提供给数据线驱动电路。定时控制信号包括用于驱动TFT的第一控制信号并且在OLED元件被发光的每个帧周期内引入发光周期，以及用于驱动TFT的第二控制信号并引入无发光周期在其中使排出的元件被淬火的每个帧周期内。

59. 发明授权

US08044590B2 Plasma display panel 失效
标题翻译：等离子显示面板
公开(公告)号：US08044590B2
公开(公告)日：2011-10-25
申请号：US12672572
申请日：2007-08-10
申请人： Yasuhito Yamaryo , Yoshiyuki Kaneko , Takahiro Ueno , Hiroyuki Tachihara , Atsuo Ohtomi
发明人： Yasuhito Yamaryo , Yoshiyuki Kaneko , Takahiro Ueno , Hiroyuki Tachihara , Atsuo Ohtomi
IPC分类号： H01J17/49
CPC分类号： H01J11/40 , H01J11/12
摘要： To provide a plasma display panel of improving a discharge time-lag.A plasma display panel of the present invention is characterized in that it comprises a pair of substrate assemblies opposed to each other sandwiching discharge spaces formed to seal a discharge gas therein, wherein one of the pair of substrate assemblies comprises: display electrodes arranged on a substrate; a dielectric layer for covering the display electrodes; and a protective layer for covering the dielectric layer, and the protective layer is configured so that a plurality of MgO single crystals are adhered to an MgO film in such a manner that crystal orientations of the plurality of MgO single crystals are aligned in one direction.
摘要翻译：提供一种提高放电时间延迟的等离子体显示面板。本发明的等离子体显示面板的特征在于，它包括一对基板组件，彼此相对的夹持放电空间被形成以将放电气体密封在其中，其中一对基板组件中的一个包括：布置在基板上的显示电极 ; 用于覆盖所述显示电极的介电层; 以及用于覆盖电介质层的保护层，并且保护层被构造成使得多个MgO单晶以使得多个MgO单晶的晶体取向沿一个方向排列的方式粘附到MgO膜。

60. 发明授权

US07491972B1 Polysilicon semiconductor thin film substrate, method for producing the same, semiconductor device, and electronic device 有权
标题翻译：多晶硅半导体薄膜基板，其制造方法，半导体器件和电子器件
公开(公告)号：US07491972B1
公开(公告)日：2009-02-17
申请号：US10019407
申请日：2000-06-23
申请人： Yoshinobu Kimura , Takahiro Kamo , Yoshiyuki Kaneko
发明人： Yoshinobu Kimura , Takahiro Kamo , Yoshiyuki Kaneko
IPC分类号： H01L21/00
CPC分类号： H01L21/02686 , H01L21/0242 , H01L21/02422 , H01L21/02532 , H01L27/1285 , H01L27/1296 , H01L29/66757
摘要： A semiconductor device and a method of manufacture thereof by forming an amorphous semiconductor film on the surface of an insulative substrate, and irradiating the amorphous semiconductor film with a laser beam to crystallize it to form a polycrystalline semiconductor thin film. A transistor is then formed in the polycrystalline semiconductor thin film. More specifically, a UV-ray is irradiated to the rear face of the insulative substrate or the amorphous semiconductor film to heat the amorphous semiconductor film to a melting temperature or lower. Then a laser beam at a suitable shape selection laser energy density Ec forms the crystal grains with the number of closest crystal grains of 6 most predominantly being irradiated to convert the amorphous semiconductor film into a polycrystalline semiconductor thin film. The thin film transistor formed in this structure has a high yield and is capable of high-speed operation.
摘要翻译：一种半导体器件及其制造方法，其通过在绝缘性基板的表面上形成非晶半导体膜，并用激光束照射所述非晶半导体膜，使其结晶而形成多晶半导体薄膜。然后在多晶半导体薄膜中形成晶体管。更具体地，将紫外线照射到绝缘基板或非晶半导体膜的背面，以将非晶半导体膜加热至熔融温度以下。然后以合适的形状选择激光能量密度Ec的激光束形成最主要被照射的最接近晶粒数6的晶粒，以将非晶半导体膜转换为多晶半导体薄膜。在该结构中形成的薄膜晶体管具有高产率并且能够高速操作。

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