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51. 发明授权

US07944132B2 Tuning-fork resonator with grooves on principal surfaces 有权
标题翻译：调谐叉式谐振器，主表面有凹槽
公开(公告)号：US07944132B2
公开(公告)日：2011-05-17
申请号：US12892096
申请日：2010-09-28
申请人： Makoto Furuhata , Takashi Yamazaki
发明人： Makoto Furuhata , Takashi Yamazaki
IPC分类号： H01L41/08 , H03H9/21
CPC分类号： H03H9/215 , H03H9/0547 , H03H9/1021
摘要： A resonator having a base part; and a resonating arm that performs flexing vibration, the resonating arm part has two principal surfaces, a first groove provided on one principal surface, a second groove provided in juxtaposition with the first groove on the other principal surface, a third groove provided in juxtaposition with the first groove and provided nearer the base part side than the first groove on the other principal surface, and a fourth groove provided in juxtaposition with the second groove and provided nearer the base part side than the second groove on the principal surface. The sum of a depth of the first and second groove part and a sum of a depth of the third and fourth groove part are larger than a distance between the one principal surface and the other principal surface.
摘要翻译：具有基部的谐振器; 以及谐振臂，其进行弯曲振动，所述谐振臂部分具有两个主表面，设置在一个主表面上的第一凹槽，与另一个主表面上的第一凹槽并置设置的第二凹槽，设置成与第一凹槽并排设置的第三凹槽，所述第一槽比所述另一主面上的所述第一槽更靠近所述基部侧;以及第四槽，与所述第二槽并列设置，并且在所述主面上设置为比所述基部侧更靠近所述第二槽。第一槽部分和第二槽部分的深度之和和第三和第四槽部分的深度之和大于一个主表面和另一个主表面之间的距离。

52. 发明授权

US07281088B2 Disk array apparatus and disk array apparatus controlling method 有权
标题翻译：磁盘阵列装置和磁盘阵列装置控制方法
公开(公告)号：US07281088B2
公开(公告)日：2007-10-09
申请号：US10812893
申请日：2004-03-31
申请人： Takashi Yamazaki , Kazuo Hakamata , Azuma Kano
发明人： Takashi Yamazaki , Kazuo Hakamata , Azuma Kano
IPC分类号： G06F12/00
CPC分类号： G06F3/0625 , G06F1/3221 , G06F1/3268 , G06F3/0634 , G06F3/0653 , G06F3/0659 , G06F3/0689 , G06F11/1662 , G06F11/2094 , G06F11/2097 , G11B19/00 , Y02D10/154 , Y02D50/20
摘要： Times at which requests for a data read or data write from/to a logical volume are received are stored in memory as access times of a RAID group making up the logical volume. When a predetermined time has elapsed after the access time, a number of the hard disk drives according to the redundancy of the RAID group are set to a power saving mode. Assume there are first hard disk drives and second hard disk drives having shorter lifes and the RAID group exceeds a predetermined time after the access time. When the RAID group consists of only the first drives, a number of the first drives according to the redundancy of the RAID group are set to a power saving mode and when it consists of only the second drives, an arbitrary number of second drives are set to a power saving mode.
摘要翻译：接收来自/向逻辑卷的数据读取或数据写入的请求的时间作为构成逻辑卷的RAID组的访问时间被存储在存储器中。当在访问时间之后经过预定时间时，根据RAID组的冗余将多个硬盘驱动器设置为省电模式。假设有第一个硬盘驱动器和第二个硬盘驱动器具有较短的寿命，并且RAID组在访问时间之后超过预定时间。当RAID组仅由第一个驱动器组成时，根据RAID组的冗余将多个第一个驱动器设置为省电模式，并且当仅由第二个驱动器组成时，将设置任意数量的第二个驱动器进入省电模式。

53. 发明授权

US07203101B2 Semiconductor memory device and defect remedying method thereof 失效
标题翻译：半导体存储器件及其缺陷补救方法
公开(公告)号：US07203101B2
公开(公告)日：2007-04-10
申请号：US11330220
申请日：2006-01-12
申请人： Kazuhiko Kajigaya , Kazuyuki Miyazawa , Manabu Tsunozaki , Kazuyoshi Oshima , Takashi Yamazaki , Yuji Sakai , Jiro Sawada , Yasunori Yamaguchi , Tetsurou Matsumoto , Shinji Udo , Hiroshi Yoshioka , Hirokazu Saito , Mitsuhiro Takano , Makoto Morino , Sinichi Miyatake , Eiji Miyamoto , Yasuhiro Kasama , Akira Endo , Ryoichi Hori , Jun Etoh , Masashi Horiguchi , Shinichi Ikenaga , Atsushi Kumata
发明人： Kazuhiko Kajigaya , Kazuyuki Miyazawa , Manabu Tsunozaki , Kazuyoshi Oshima , Takashi Yamazaki , Yuji Sakai , Jiro Sawada , Yasunori Yamaguchi , Tetsurou Matsumoto , Shinji Udo , Hiroshi Yoshioka , Hirokazu Saito , Mitsuhiro Takano , Makoto Morino , Sinichi Miyatake , Eiji Miyamoto , Yasuhiro Kasama , Akira Endo , Ryoichi Hori , Jun Etoh , Masashi Horiguchi , Shinichi Ikenaga , Atsushi Kumata
IPC分类号： G11C7/10
CPC分类号： H01L24/06 , G11C5/025 , G11C5/04 , G11C5/063 , G11C11/406 , G11C29/06 , G11C29/12005 , G11C29/12015 , G11C29/24 , G11C29/34 , G11C29/50 , G11C29/50012 , G11C29/70 , G11C29/80 , G11C29/804 , G11C29/832 , G11C29/844 , G11C2029/2602 , H01L24/05 , H01L24/45 , H01L24/48 , H01L27/0207 , H01L27/105 , H01L27/10897 , H01L27/11898 , H01L2224/04042 , H01L2224/05553 , H01L2224/05556 , H01L2224/05624 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/4826 , H01L2224/48465 , H01L2224/48624 , H01L2224/73215 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01021 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01037 , H01L2924/01038 , H01L2924/01039 , H01L2924/01041 , H01L2924/01043 , H01L2924/0105 , H01L2924/01051 , H01L2924/01052 , H01L2924/01054 , H01L2924/01055 , H01L2924/01058 , H01L2924/01059 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01083 , H01L2924/01084 , H01L2924/12042 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H01L2924/00 , H01L2924/00012
摘要： A semiconductor memory device formed on a semiconductor chip comprises a plurality of first memory arrays, a plurality of second memory arrays, a first voltage generator, and a plurality of first bonding pads. The semiconductor chip is divided into a first rectangle region, a second rectangle region, and a third rectangle region and the third rectangle region is arranged between the first rectangle region and the second rectangle region. The plurality of first memory arrays are formed in the first rectangle region. The plurality of second memory arrays are formed in the second rectangle region. The voltage generator and the plurality of first bonding pads are arranged in the third rectangle region. The plurality of first bonding pads are arranged between the first rectangle region and the voltage generator and no bonding pads are arranged between the voltage generator and the plurality of second memory arrays.
摘要翻译：形成在半导体芯片上的半导体存储器件包括多个第一存储器阵列，多个第二存储器阵列，第一电压发生器和多个第一焊盘。半导体芯片被分成第一矩形区域，第二矩形区域和第三矩形区域，并且第三矩形区域布置在第一矩形区域和第二矩形区域之间。多个第一存储器阵列形成在第一矩形区域中。多个第二存储器阵列形成在第二矩形区域中。电压发生器和多个第一接合焊盘被布置在第三矩形区域中。多个第一接合焊盘布置在第一矩形区域和电压发生器之间，并且在电压发生器和多个第二存储器阵列之间没有布置接合焊盘。

54. 发明申请

US20070073970A1 Disk array apparatus and disk array apparatus controlling method 有权
公开(公告)号：US20070073970A1
公开(公告)日：2007-03-29
申请号：US11604216
申请日：2006-11-27
申请人： Takashi Yamazaki , Kazuo Hakamata , Azuma Kano
发明人： Takashi Yamazaki , Kazuo Hakamata , Azuma Kano
IPC分类号： G06F12/16 , G06F1/26
CPC分类号： G06F3/0625 , G06F1/3221 , G06F1/3268 , G06F3/0634 , G06F3/0653 , G06F3/0659 , G06F3/0689 , G06F11/1662 , G06F11/2094 , G06F11/2097 , G11B19/00 , Y02D10/154 , Y02D50/20
摘要： Times at which requests for a data read or data write from/to a logical volume are received are stored in memory as access times of a RAID group making up the logical volume. When a predetermined time has elapsed after the access time, a number of the hard disk drives according to the redundancy of the RAID group are set to a power saving mode. Assume there are first hard disk drives and second hard disk drives having shorter lifes and the RAID group exceeds a predetermined time after the access time. When the RAID group consists of only the first drives, a number of the first drives according to the redundancy of the RAID group are set to a power saving mode and when it consists of only the second drives, an arbitrary number of second drives are set to a power saving mode.

55. 发明申请

US20050199014A1 Apparatus for producing glass particles deposit 审中-公开
标题翻译：玻璃颗粒沉积装置
公开(公告)号：US20050199014A1
公开(公告)日：2005-09-15
申请号：US11069039
申请日：2005-03-02
申请人： Motonori Nakamura , Takashi Yamazaki , Toshihiro Ooishi
发明人： Motonori Nakamura , Takashi Yamazaki , Toshihiro Ooishi
IPC分类号： C03B37/014 , C03B37/018
CPC分类号： C03B37/0144 , C03B37/01406
摘要： In an apparatus for producing glass particles deposit according to the present invention, a plurality of glass particle synthesis burners are placed on a front face of a reaction vessel, and at least one exhaust port is provided on a rear face of the reaction vessel. Two wall faces extending from both sides of the exhaust port and being in contact with two side faces of the reaction vessel are provided so that its contained angle is 90 degrees or less. Assuming that the shorter distance between the shortest distance from a rotation axis of a target rod to the side face of the reaction vessel and the shortest distance from the rotation axis of the target rod to the wall face is L, and the outer diameter of the glass particles deposit deposited on the target rod is d, L is greater than d.
摘要翻译：在本发明的玻璃粒子沉积物的制造装置中，多个玻璃粒子合成燃烧器配置在反应容器的正面，在反应容器的背面设有至少一个排气口。设置从排气口两侧延伸并与反应容器的两个侧面接触的两个壁面，使得它的夹角为90度以下。假设从目标棒的旋转轴到反应容器的侧面的最短距离与从靶棒的旋转轴到壁面的最短距离之间的较短距离为L，沉积在目标棒上的玻璃颗粒沉积物是d，L大于d。

56. 发明申请

US20050179058A1 Semiconductor memory device and defect remedying method thereof 失效
标题翻译：半导体存储器件及其缺陷补救方法
公开(公告)号：US20050179058A1
公开(公告)日：2005-08-18
申请号：US11101504
申请日：2005-04-08
申请人： Kazuhiko Kajigaya , Kazuyuki Miyazawa , Manabu Tsunozaki , Kazuyoshi Oshima , Takashi Yamazaki , Yuji Sakai , Jiro Sawada , Yasunori Yamaguchi , Tetsurou Matsumoto , Shinji Udo , Hiroshi Yoshioka , Hirokazu Saito , Mitsuhiro Takano , Makoto Morino , Sinichi Miyatake , Eiji Miyamoto , Yasuhiro Kasama , Akira Endo , Ryoichi Hori , Jun Etoh , Masashi Horiguchi , Shinichi Ikenaga , Atsushi Kumata
发明人： Kazuhiko Kajigaya , Kazuyuki Miyazawa , Manabu Tsunozaki , Kazuyoshi Oshima , Takashi Yamazaki , Yuji Sakai , Jiro Sawada , Yasunori Yamaguchi , Tetsurou Matsumoto , Shinji Udo , Hiroshi Yoshioka , Hirokazu Saito , Mitsuhiro Takano , Makoto Morino , Sinichi Miyatake , Eiji Miyamoto , Yasuhiro Kasama , Akira Endo , Ryoichi Hori , Jun Etoh , Masashi Horiguchi , Shinichi Ikenaga , Atsushi Kumata
IPC分类号： G11C5/00 , G11C5/02 , G11C5/06 , G11C11/406 , H01L23/485 , H01L27/108 , H01L21/3205
CPC分类号： H01L24/06 , G11C5/025 , G11C5/04 , G11C5/063 , G11C11/406 , G11C29/06 , G11C29/12005 , G11C29/12015 , G11C29/24 , G11C29/34 , G11C29/50 , G11C29/50012 , G11C29/70 , G11C29/80 , G11C29/804 , G11C29/832 , G11C29/844 , G11C2029/2602 , H01L24/05 , H01L24/45 , H01L24/48 , H01L27/0207 , H01L27/105 , H01L27/10897 , H01L27/11898 , H01L2224/04042 , H01L2224/05553 , H01L2224/05556 , H01L2224/05624 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/4826 , H01L2224/48465 , H01L2224/48624 , H01L2224/73215 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01021 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01037 , H01L2924/01038 , H01L2924/01039 , H01L2924/01041 , H01L2924/01043 , H01L2924/0105 , H01L2924/01051 , H01L2924/01052 , H01L2924/01054 , H01L2924/01055 , H01L2924/01058 , H01L2924/01059 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01083 , H01L2924/01084 , H01L2924/12042 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H01L2924/00 , H01L2924/00012
摘要： A semiconductor memory device formed on a semiconductor chip comprises a plurality of first memory arrays, a plurality of second memory arrays, a first voltage generator, and a plurality of first bonding pads. The semiconductor chip is divided into a first rectangle region, a second rectangle region, and a third rectangle region and the third rectangle region is arranged between the first rectangle region and the second rectangle region. The plurality of first memory arrays are formed in the first rectangle region. The plurality of second memory arrays are formed in the second rectangle region. The voltage generator and the plurality of first bonding pads are arranged in the third rectangle region. The plurality of first bonding pads are arranged between the first rectangle region and the voltage generator and no bonding pads are arranged between the voltage generator and the plurality of second memory arrays.
摘要翻译：形成在半导体芯片上的半导体存储器件包括多个第一存储器阵列，多个第二存储器阵列，第一电压发生器和多个第一焊盘。半导体芯片被分成第一矩形区域，第二矩形区域和第三矩形区域，并且第三矩形区域被布置在第一矩形区域和第二矩形区域之间。多个第一存储器阵列形成在第一矩形区域中。多个第二存储器阵列形成在第二矩形区域中。电压发生器和多个第一接合焊盘被布置在第三矩形区域中。多个第一接合焊盘布置在第一矩形区域和电压发生器之间，并且在电压发生器和多个第二存储器阵列之间没有布置接合焊盘。

57. 发明申请

US20050160221A1 Disk array apparatus and disk array apparatus controlling method 有权
标题翻译：磁盘阵列装置和磁盘阵列装置控制方法
公开(公告)号：US20050160221A1
公开(公告)日：2005-07-21
申请号：US10812893
申请日：2004-03-31
申请人： Takashi Yamazaki , Kazuo Hakamata , Azuma Kano
发明人： Takashi Yamazaki , Kazuo Hakamata , Azuma Kano
IPC分类号： G06F1/32 , G06F1/26 , G06F3/06 , G06F12/00 , G11B19/00 , G11B19/02
CPC分类号： G06F3/0625 , G06F1/3221 , G06F1/3268 , G06F3/0634 , G06F3/0653 , G06F3/0659 , G06F3/0689 , G06F11/1662 , G06F11/2094 , G06F11/2097 , G11B19/00 , Y02D10/154 , Y02D50/20
摘要： Times at which requests for a data read or data write from/to a logical volume are received are stored in memory as access times of a RAID group making up the logical volume. When a predetermined time has elapsed after the access time, a number of the hard disk drives according to the redundancy of the RAID group are set to a power saving mode. Assume there are first hard disk drives and second hard disk drives having shorter lifes and the RAID group exceeds a predetermined time after the access time. When the RAID group consists of only the first drives, a number of the first drives according to the redundancy of the RAID group are set to a power saving mode and when it consists of only the second drives, an arbitrary number of second drives are set to a power saving mode.
摘要翻译：接收来自/向逻辑卷的数据读取或数据写入的请求的时间作为构成逻辑卷的RAID组的访问时间被存储在存储器中。当在访问时间之后经过预定时间时，根据RAID组的冗余将多个硬盘驱动器设置为省电模式。假设有第一个硬盘驱动器和第二个硬盘驱动器具有较短的寿命，并且RAID组在访问时间之后超过预定时间。当RAID组仅由第一个驱动器组成时，根据RAID组的冗余将多个第一个驱动器设置为省电模式，并且当仅由第二个驱动器组成时，将设置任意数量的第二个驱动器进入省电模式。

58. 发明授权

US06898130B2 Semiconductor memory device and defect remedying method thereof 失效
标题翻译：半导体存储器件及其缺陷补救方法
公开(公告)号：US06898130B2
公开(公告)日：2005-05-24
申请号：US10683260
申请日：2003-10-14
申请人： Kazuhiko Kajigaya , Kazuyuki Miyazawa , Manabu Tsunozaki , Kazuyoshi Oshima , Takashi Yamazaki , Yuji Sakai , Jiro Sawada , Yasunori Yamaguchi , Tetsurou Matsumoto , Shinji Udo , Hiroshi Yoshioka , Hirokazu Saito , Mitsuhiro Takano , Makoto Morino , Sinichi Miyatake , Eiji Miyamoto , Yasuhiro Kasama , Akira Endo , Ryoichi Hori , Jun Etoh , Masashi Horiguchi , Shinichi Ikenaga , Atsushi Kumata
发明人： Kazuhiko Kajigaya , Kazuyuki Miyazawa , Manabu Tsunozaki , Kazuyoshi Oshima , Takashi Yamazaki , Yuji Sakai , Jiro Sawada , Yasunori Yamaguchi , Tetsurou Matsumoto , Shinji Udo , Hiroshi Yoshioka , Hirokazu Saito , Mitsuhiro Takano , Makoto Morino , Sinichi Miyatake , Eiji Miyamoto , Yasuhiro Kasama , Akira Endo , Ryoichi Hori , Jun Etoh , Masashi Horiguchi , Shinichi Ikenaga , Atsushi Kumata
IPC分类号： G11C5/00 , G11C5/02 , G11C5/06 , G11C11/406 , H01L23/485 , G11C16/04
CPC分类号： H01L24/06 , G11C5/025 , G11C5/04 , G11C5/063 , G11C11/406 , G11C29/06 , G11C29/12005 , G11C29/12015 , G11C29/24 , G11C29/34 , G11C29/50 , G11C29/50012 , G11C29/70 , G11C29/80 , G11C29/804 , G11C29/832 , G11C29/844 , G11C2029/2602 , H01L24/05 , H01L24/45 , H01L24/48 , H01L27/0207 , H01L27/105 , H01L27/10897 , H01L27/11898 , H01L2224/04042 , H01L2224/05553 , H01L2224/05556 , H01L2224/05624 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/4826 , H01L2224/48465 , H01L2224/48624 , H01L2224/73215 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01021 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01037 , H01L2924/01038 , H01L2924/01039 , H01L2924/01041 , H01L2924/01043 , H01L2924/0105 , H01L2924/01051 , H01L2924/01052 , H01L2924/01054 , H01L2924/01055 , H01L2924/01058 , H01L2924/01059 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01083 , H01L2924/01084 , H01L2924/12042 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H01L2924/00 , H01L2924/00012
摘要： A semiconductor memory device, in which peripheral circuits are arranged in a cross area of a semiconductor chip composed of the longitudinal center portions and the transverse center portions, and in which memory arrays are arranged in the four regions which are divided by the cross area. This structure in which the peripheral circuits are arranged at the center portion of the chip permits the longest signal transition paths to be shortened to about one half of the chip size to speed up the DRAM which is intended to have a large storage capacity.
摘要翻译：一种半导体存储器件，其中外围电路布置在由纵向中心部分和横向中心部分组成的半导体芯片的交叉区域中，并且其中存储器阵列布置在由横截面划分的四个区域中。其中外围电路布置在芯片的中心部分的这种结构允许将最长的信号转换路径缩短到芯片尺寸的大约一半，以加速旨在具有大存储容量的DRAM。

59. 发明申请

US20050045321A1 Control apparatus and control method of vehicle cooling fan 审中-公开
标题翻译：车辆冷却风扇的控制装置及控制方法
公开(公告)号：US20050045321A1
公开(公告)日：2005-03-03
申请号：US10899224
申请日：2004-07-26
申请人： Takashi Yamazaki
发明人： Takashi Yamazaki
IPC分类号： B60H1/32 , F01P7/04 , F01P7/08 , B60H3/00 , B60H1/00 , B61D27/00 , F25B15/00 , F25B27/00 , F25B39/04
CPC分类号： B60H1/3208 , B60H2001/3248 , B60H2001/3266 , B60H2001/3277 , F01P7/048 , F01P7/08 , F01P2025/04 , F01P2025/66 , F01P2060/14
摘要： A controller of a cooling fan cools a radiator of a vehicle driving system cooling water and a condenser incorporated in a refrigeration cycle of a vehicle air conditioning system. When a high-pressure side refrigerant pressure of the refrigeration cycle is equal to or higher than a predetermined value, the controller drives the cooling fan irrespective of operation/non-operation state of the vehicle air conditioning system.
摘要翻译：冷却风扇的控制器冷却车辆驱动系统冷却水的散热器和结合在车辆空调系统的制冷循环中的冷凝器。当制冷循环的高压侧制冷剂压力等于或高于预定值时，控制器驱动冷却风扇，而与车辆空调系统的操作/非操作状态无关。

60. 发明授权

US06861738B2 Laminated-chip semiconductor device 失效
标题翻译：层压半导体器件
公开(公告)号：US06861738B2
公开(公告)日：2005-03-01
申请号：US10156819
申请日：2002-05-30
申请人： Katsuhiko Oyama , Mitsuyoshi Endo , Chiaki Takubo , Takashi Yamazaki , Takashi Imoto
发明人： Katsuhiko Oyama , Mitsuyoshi Endo , Chiaki Takubo , Takashi Yamazaki , Takashi Imoto
IPC分类号： H01L25/18 , H01L23/50 , H01L23/538 , H01L25/065 , H01L25/07 , H01L25/10 , H01L23/02
CPC分类号： H01L23/5382 , H01L25/0657 , H01L25/105 , H01L2224/16
摘要： There is disclosed a laminated-chip semiconductor device which comprises two chip-mounting substrates on each of which at least one semiconductor chip having a plurality of terminals for signals is mounted, and a plurality of chip connecting wirings electrically connected to the terminals for signals of the each semiconductor chip which are mounted on the chip-mounting substrates are formed in a same pattern, and which are laminated along a thickness direction, and one intermediate substrate which is arranged between the two chip-mounting substrates, and in which a plurality of interlayer connecting wirings electrically connected to each of the plurality of chip connecting wirings of the adjacent chip-mounting substrate are formed in a predetermined wiring pattern.
摘要翻译：公开了一种层叠芯片半导体器件，其包括两个芯片安装基板，每个芯片安装基板上安装有至少一个具有多个用于信号的端子的半导体芯片，以及电连接到端子的多个芯片连接布线，安装在芯片安装基板上的每个半导体芯片以相同的图案形成，并且沿着厚度方向层叠，并且一个中间基板被布置在两个芯片安装基板之间，并且其中多个电连接到相邻芯片安装基板的多个芯片连接布线中的每一个的层间连接布线以预定布线图形形成。

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