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    • 53. 发明授权
    • Film formation apparatus and method for using same
    • 成膜装置及其使用方法
    • US08697578B2
    • 2014-04-15
    • US12285575
    • 2008-10-08
    • Nobutake NoderaJun SatoKazuya YamamotoKazuhide Hasebe
    • Nobutake NoderaJun SatoKazuya YamamotoKazuhide Hasebe
    • H01L21/311
    • C23C16/345C23C16/0218C23C16/4405C23C16/452C23C16/45542H01J37/32082H01J37/3244H01J37/32522
    • A method for using a film formation apparatus for a semiconductor process to form a thin film on a target substrate while supplying a film formation reactive gas from a first nozzle inside a reaction chamber includes performing a cleaning process to remove a by-product film deposited inside the reaction chamber and the first nozzle, in a state where the reaction chamber does not accommodate the target substrate. The cleaning process includes, in order, an etching step of supplying a cleaning reactive gas for etching the by-product film into the reaction chamber, and activating the cleaning reactive gas, thereby etching the by-product film, and an exhaust step of stopping supply of the cleaning reactive gas and exhausting gas from inside the reaction chamber. The etching step is arranged to use conditions that cause the cleaning reactive gas supplied in the reaction chamber to flow into the first nozzle.
    • 在反应室内的第一喷嘴供给成膜反应性气体的同时,使用半导体工艺的成膜装置在目标基板上形成薄膜的方法包括进行清洗处理以除去内部沉积的副产物膜 反应室和第一喷嘴,处于反应室不容纳目标基板的状态。 清洗工序依次包括:将清洗反应性气体供给到反应室内的蚀刻工序,激活清洗反应性气体,蚀刻副产物膜,以及停止排出工序 从反应室内供给清洗反应气体和排气。 蚀刻步骤被设置为使得在反应室中供应的清洁反应气体流入第一喷嘴的条件。
    • 59. 发明授权
    • Power amplifier
    • 功率放大器
    • US08217722B2
    • 2012-07-10
    • US13079046
    • 2011-04-04
    • Kazuya YamamotoMiyo MiyashitaSatoshi SuzukiTakayuki Matsuzuka
    • Kazuya YamamotoMiyo MiyashitaSatoshi SuzukiTakayuki Matsuzuka
    • H03F3/20
    • H03F3/195H03F1/0277H03F3/189H03F3/245H03F3/72H03F2200/27H03F2200/411H03F2203/7206H03F2203/7236H03G1/0088
    • A power amplifier comprises: an amplifying transistor for amplifying an input signal; a reference voltage generating circuit which generates a reference voltage; a bias circuit generating a bias voltage based on the reference voltage and supplying the bias voltage to the amplifying transistor; and a booster elevating an enable voltage input from outside and outputting the enable voltage. The reference voltage generating circuit is turned ON/OFF in correspondence with an output voltage of the booster. The booster includes: an enable terminal to which the enable voltage is applied; a power source terminal connected to a power source; a transistor having a control electrode connected to the enable terminal, a first electrode connected to the power source terminal, and a second electrode that is grounded; and a FET resistor connected between the first electrode of the transistor and the power source terminal. A gate electrode of the FET resistor is open.
    • 功率放大器包括:放大晶体管,用于放大输入信号; 产生参考电压的基准电压产生电路; 偏置电路,基于所述参考电压产生偏置电压,并将所述偏置电压提供给所述放大晶体管; 并且升压器提升从外部输入的使能电压并输出使能电压。 基准电压发生电路与增压器的输出电压对应地接通/断开。 升压器包括:施加使能电压的使能端子; 连接到电源的电源端子; 具有连接到使能端子的控制电极的晶体管,连接到电源端子的第一电极和接地的第二电极; 以及连接在晶体管的第一电极和电源端子之间的FET电阻器。 FET电阻的栅电极断开。