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51. 发明授权

US06898695B2 Use of a future file for data address calculations in a pipelined processor 有权
标题翻译：在流水线处理器中使用未来文件进行数据地址计算
公开(公告)号：US06898695B2
公开(公告)日：2005-05-24
申请号：US09820514
申请日：2001-03-28
申请人： William C. Anderson , Ryo Inoue
发明人： William C. Anderson , Ryo Inoue
IPC分类号： G06F9/345 , G06F9/38 , G06F9/00
CPC分类号： G06F9/3842 , G06F9/345 , G06F9/383 , G06F9/3863
摘要： In an embodiment, a pipelined processor includes a future file for storing updated data address values generated by a data address generator (DAG). These updated values may be provided to the DAG for subsequent address calculation operations.
摘要翻译：在一个实施例中，流水线处理器包括用于存储由数据地址发生器（DAG）生成的更新的数据地址值的未来文件。可以将这些更新的值提供给DAG用于随后的地址计算操作。

52. 发明授权

US06889316B2 Method and apparatus for restoring registers after cancelling a multi-cycle instruction 有权
标题翻译：取消多周期指令后恢复寄存器的方法和装置
公开(公告)号：US06889316B2
公开(公告)日：2005-05-03
申请号：US09820570
申请日：2001-03-28
申请人： Ryo Inoue , Gregory A. Overkamp
发明人： Ryo Inoue , Gregory A. Overkamp
IPC分类号： G06F9/312 , G06F9/38
CPC分类号： G06F9/30043 , G06F9/3842 , G06F9/3861
摘要： In an embodiment, a pipelined processor may be adapted to process multi-cycle instructions (MCIs). Results generated in response to non-terminal sub-instructions may be written to a speculative commit register. When the MCI commits, i.e., a terminal sub-instruction reaches the WB stage, the value in the speculative commit register may be written to the architectural register.
摘要翻译：在一个实施例中，流水线处理器可以适于处理多周期指令（MCI）。响应于非终端子指令生成的结果可写入推测提交寄存器。当MCI提交时，即终端子指令到达WB阶段时，推测性提交寄存器中的值可以写入架构寄存器。

53. 发明授权

US06681273B1 High performance, variable data width FIFO buffer 有权
标题翻译：高性能，可变数据宽度FIFO缓冲区
公开(公告)号：US06681273B1
公开(公告)日：2004-01-20
申请号：US09652685
申请日：2000-08-31
申请人： Michael Allen , Tim Landreth , Ryo Inoue , Ravi Pratap Singh
发明人： Michael Allen , Tim Landreth , Ryo Inoue , Ravi Pratap Singh
IPC分类号： G06F1300
CPC分类号： G06F5/10 , G06F2205/106
摘要： Methods and apparatus are provided for transferring data words from a source to a destination. The apparatus includes a datapath buffer coupled by a first data bus to the source and coupled by a second data bus to the destination, write control logic for writing a first number of data words in the datapath buffer in response to a first source transfer condition and for writing a second number of data words in the datapath buffer in response to a second source transfer condition, and read control logic for reading the first number of data words from the datapath buffer in response to a first destination transfer condition and for reading the second number of data words from the datapath buffer in response to a second destination transfer condition.
摘要翻译：提供了用于将数据字从源传送到目的地的方法和装置。该装置包括数据路径缓冲器，其通过第一数据总线耦合到源并由第二数据总线耦合到目的地;写控制逻辑，用于响应于第一源传输条件将第一数量的数据字写入数据路径缓冲器;以及用于响应于第二源传输条件在数据路径缓冲器中写入第二数量的数据字，以及用于响应于第一目的地传送条件从数据路径缓冲器读取第一数量数据字的读控制逻辑，并且用于读取第二数据字来自数据路径缓冲器的响应于第二目的地传送条件的数据字数。

54. 发明授权

US06205234B1 Image processing system 失效
标题翻译：图像处理系统
公开(公告)号：US06205234B1
公开(公告)日：2001-03-20
申请号：US08903726
申请日：1997-07-21
申请人： Toshiaki Kakinami , Yoshikatsu Kimura , Ryo Inoue
发明人： Toshiaki Kakinami , Yoshikatsu Kimura , Ryo Inoue
IPC分类号： G06K946
CPC分类号： G08G1/167 , G06T7/12 , G06T2207/10016 , G06T2207/30256
摘要： The invention is directed to an image processing system, which includes an image sensor (DD) for introducing image information of an object to detect image data for indicating at least a density of the object. A scanning table memory (TM) is adapted to provide addresses in accordance with horizontal or vertical scanning lines, and provide a horizontal or vertical location information for each address. Also, the memory (TM) is adapted to provide a window on the basis of the location information and in accordance with the object, and store the window in a table memory. And, an image processor (DP) is adapted to provide a desired image on the basis of a logical product of the image data and the window. The memory (TM) is adapted to provide the window for the image which will be used at the next iteration step on the basis of the desired image formed by the image processor (DP). The memory (TM) may include a window setting unit (WM) which is adapted to set a x-coordinate and a y-coordinate to at least a reference point for each address on the basis of the image data provided for forming the desired image, and set a predetermined width to each reference point to provide the window and store the window in the table memory.
摘要翻译：本发明涉及一种图像处理系统，其包括用于引入对象的图像信息的图像传感器（DD），以检测用于指示对象的至少密度的图像数据。扫描表存储器（TM）适于根据水平或垂直扫描线提供地址，并为每个地址提供水平或垂直位置信息。此外，存储器（TM）适于基于位置信息并根据对象提供窗口，并将窗口存储在表存储器中。并且，图像处理器（DP）适于基于图像数据和窗口的逻辑积提供期望的图像。存储器（TM）适于为基于由图像处理器（DP）形成的期望图像在下一个迭代步骤中使用的图像提供窗口。存储器（TM）可以包括窗口设置单元（WM），其适于基于为形成所需图像提供的图像数据将x坐标和y坐标设置为至少每个地址的参考点并为每个参考点设置预定的宽度以提供窗口并将窗口存储在表存储器中。

55. 发明授权

US5991427A Method and apparatus for detecting a lane on a road 失效
标题翻译：用于检测道路上车道的方法和装置
公开(公告)号：US5991427A
公开(公告)日：1999-11-23
申请号：US903729
申请日：1997-07-31
申请人： Toshiaki Kakinami , Yoshikatsu Kimura , Ryo Inoue
发明人： Toshiaki Kakinami , Yoshikatsu Kimura , Ryo Inoue
IPC分类号： G06K9/46 , G06K9/00
CPC分类号： G06K9/4604
摘要： The invention is directed to a method and apparatus for detecting a lane on a road, the latter of which includes an edge sensor (ED) for detecting edges indicative of boundaries of opposite sides of each lane, an edge memory (EM) for storing the edges to form a couple of continuous lines of edge groups indicative of the opposite boundaries of the lane, and an image processor (DP) for defining the opposite boundaries of the lane on a plane in a three-dimensional geometry. A center of curvature defining device (RC) defines a center of curvature to the opposite boundaries of the lane. An edge line extracting device (ES) divides the edge groups stored in the edge memory into a plurality of continuous regions each having a predetermined length along a concentric circle arc having the same center as the center of curvature, and extracts a pair of edge lines from each region. A tangent defining device (TL) defines a couple of tangents to the edge lines, and a normal defining device (NL) defines a normal to the tangents. Then, a segment setting device (SD) defines a couple of intersections of the normal with the tangents, and sets a line segment between the intersections as a segment of the lane. The image processor (DP) renews the opposite boundaries of the lane on the basis of the segment of the lane.
摘要翻译：本发明涉及一种用于检测道路上的车道的方法和装置，该方法和装置包括用于检测指示每个车道的相对边界的边缘的边缘传感器（ED）;边缘存储器（EM），用于存储边缘以形成指示车道相反边界的一组连续的边缘组线，以及用于在三维几何形状的平面上限定车道相对边界的图像处理器（DP）。曲率中心定义装置（RC）将曲率中心定义到车道的相对边界。边缘线提取装置（ES）将存储在边缘存储器中的边缘组沿着具有与曲率中心相同中心的同心圆弧分割成具有预定长度的多个连续区域，并且提取一对边缘线从每个地区。切线定义装置（TL）定义了与边缘线相切的一对切线，并且正常的限定装置（NL）限定了切线的法线。然后，段设定装置（SD）定义法线与切线的两对交点，并将交点之间的线段设置为车道的一段。图像处理器（DP）基于车道段更新车道的相对边界。

56. 发明授权

US5835821A Image forming apparatus 失效
标题翻译：图像形成装置
公开(公告)号：US5835821A
公开(公告)日：1998-11-10
申请号：US724499
申请日：1996-09-30
申请人： Hiroyuki Suzuki , Masahiro Itoh , Masahiro Inoue , Kenichiro Waki , Takeo Yamamoto , Ryo Inoue
发明人： Hiroyuki Suzuki , Masahiro Itoh , Masahiro Inoue , Kenichiro Waki , Takeo Yamamoto , Ryo Inoue
IPC分类号： G03G15/02
CPC分类号： G03G15/0225 , G03G15/0266 , G03G2215/021 , G03G2215/022
摘要： An image forming apparatus includes image bearing member for bearing a toner image; charging member contactable to the image bearing member to electrically charge the image bearing member; wherein .delta.V=.vertline.Vdc-Vs.vertline. is different between a first area of the image bearing member which is going to be image area and second area of the image bearing member which is going to be non-image area, where Vdc is a DC component of a voltage applied to the charging member, and Vs is is a potential of the image bearing member charged by the charging member.
摘要翻译：图像形成装置包括用于承载调色剂图像的图像承载部件; 充电构件可与图像承载构件接触以对图像承载构件进行充电; 其中ΔV= | Vdc-Vs | 在将成为图像区域的图像承载部件的第一区域和将成为非图像区域的图像承载部件的第二区域之间是不同的，其中Vdc是施加到充电部件的电压的DC分量并且Vs是由充电部件充电的图像承载部件的电位。

57. 发明授权

US5145532A Solder precipitating composition 失效
标题翻译：焊剂预处理组合物
公开(公告)号：US5145532A
公开(公告)日：1992-09-08
申请号：US244791
申请日：1988-09-14
申请人： Takao Fukunaga , Hisao Nakajima , Kenzo Kobayashi , Masanao Kono , Hisao Irie , Ryo Inoue
发明人： Takao Fukunaga , Hisao Nakajima , Kenzo Kobayashi , Masanao Kono , Hisao Irie , Ryo Inoue
IPC分类号： B23K35/22 , B23K35/26 , B23K35/34 , H05K3/34
CPC分类号： B23K35/34 , B23K35/262 , H05K3/3484 , H05K2203/125
摘要： A solder precipitating composition comprises a powder of a metal having the highest ionization level among metals constituting a solder alloy to be prepared, and a salt between a carboxylic acid and a remaining metal of the solder alloy. The composition is applied to a surface on which the solder is to be precipitated, and the solder is precipitated, thereby performing soldering.

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