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    • 58. 发明申请
    • LITHO CLUSTER AND MODULIZATION TO ENHANCE PRODUCTIVITY
    • LITHO集群和模块化以提高生产力
    • US20150076371A1
    • 2015-03-19
    • US14551302
    • 2014-11-24
    • Taiwan Semiconductor Manufacturing Co., Ltd.
    • I-Hsiung HuangHeng-Hsin LiuHeng-Jen LeeChin-Hsiang Lin
    • H01L21/67H01J37/20H01J37/16H01J37/32H01J37/317
    • H01L21/67225G03F7/16G03F7/30G03F7/70991H01J37/16H01J37/20H01J37/3174H01J37/32899H01L21/67276H01L21/67745
    • The present disclosure relates to a lithographic tool arrangement for semiconductor workpiece processing. The lithographic tool arrangement groups lithographic tools into clusters, and selectively transfers a semiconductor workpiece between a plurality of lithographic tools of a first type in a first cluster to a plurality of lithographic tools of a second type in a second cluster. The selective transfer is achieved though a transfer assembly, which is coupled to a defect scan tool that identifies defects generated in the lithographic tool of the first type. The disclosed lithographic tool arrangement also utilizes shared structural elements such as a housing assembly, and shared functional elements such as gases and chemicals. The lithographic tool arrangement may consist of baking, coating, exposure, and development units configured to provide a modularization of these various components in order to optimize throughput and efficiency for a given lithographic fabrication process.
    • 本公开涉及一种用于半导体工件加工的平版印刷工具装置。 光刻工具装置将光刻工具组合成簇,并且将半导体工件在第一簇中的第一类型的多个光刻工具之间选择性地传输到第二簇中的第二类型的光刻工具。 通过转移组件实现选择性转移,转移组件耦合到识别第一类型的光刻工具中产生的缺陷的缺陷扫描工具。 所公开的平版印刷工具装置还利用共同的结构元件,例如壳体组件和诸如气体和化学品的共享功能元件。 光刻工具装置可以包括被配置成提供这些各种部件的模块化的烘烤,涂覆,曝光和显影单元,以便为给定的光刻制造工艺优化产量和效率。
    • 59. 发明申请
    • 2D/3D Analysis for Abnormal Tools and Stages Diagnosis
    • 异常工具和阶段的2D / 3D分析诊断
    • US20140100684A1
    • 2014-04-10
    • US13647643
    • 2012-10-09
    • TAIWAN SEMICONDUCTOR MANUFACTURING CO. LTD.
    • Chun-Hsien LinJui-Long ChenHui-Yun ChaoJong-I MouChin-Hsiang Lin
    • G06F19/00
    • G06F17/50G03F7/70533G03F7/70616G05B23/024
    • A method for analyzing abnormalities in a semiconductor processing system provides performing an analysis of variance on a production history associated with each of a plurality of tools at each of a plurality of process steps for each of a plurality of processed wafers, and key process steps are identified. A regression analysis on a plurality of measurements of the plurality of wafers at each process step is performed and key measurement parameters are identified. An analysis of covariance on the key measurement parameters and key process steps, and the key process steps are ranked based on an f-ratio, therein ranking an abnormality of the key process steps. Further, the plurality of tools associated with each of the key process steps are ranked based on an orthogonal t-ratio associated with an analysis of covariance, therein ranking an abnormality each tool associated with the key process steps.
    • 一种用于分析半导体处理系统中的异常的方法,提供了在多个处理晶片中的每一个的多个处理步骤中的每一个处执行与多个工具中的每一个相关联的生产历史上的方差分析,并且关键处理步骤 确定。 执行在每个处理步骤对多个晶片的多个测量的回归分析,并且识别关键测量参数。 关键测量参数和关键过程步骤的协方差分析以及关键过程步骤基于f比进行排序,其中排列关键过程步骤的异常。 此外,与关键处理步骤中的每一个相关联的多个工具基于与协方差分析相关联的正交t比进行排序,其中对与关键处理步骤相关联的每个工具进行排序。