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51. 发明授权

US07701726B2 Method of manufacturing a wiring substrate and semiconductor device 失效
标题翻译：制造布线基板和半导体器件的方法
公开(公告)号：US07701726B2
公开(公告)日：2010-04-20
申请号：US12340267
申请日：2008-12-19
申请人： Jun Tsukano , Kenta Ogawa , Takehiko Maeda , Shintaro Yamamichi , Katsumi Kikuchi
发明人： Jun Tsukano , Kenta Ogawa , Takehiko Maeda , Shintaro Yamamichi , Katsumi Kikuchi
IPC分类号： H05K1/11 , H01K1/14
CPC分类号： H05K1/0271 , H01L21/4846 , H01L21/563 , H01L21/6835 , H01L23/13 , H01L23/49816 , H01L23/49827 , H01L2224/16 , H01L2224/16225 , H01L2224/16235 , H01L2224/16237 , H01L2224/32225 , H01L2224/73204 , H01L2924/00011 , H01L2924/00014 , H01L2924/01019 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/10253 , H01L2924/15311 , H05K3/205 , H05K3/4644 , H05K2201/09018 , H05K2201/09481 , H05K2201/09781 , H01L2924/00 , H01L2224/0401
摘要： A wiring substrate includes a base insulating film, a first interconnection formed on a top surface side of the base insulating film, a via conductor provided in a via hole formed in the base insulating film, and a second interconnection provided on a bottom surface side of the base insulating film, the second interconnection being connected to the first interconnection via the via conductor. The wiring substrate includes divided-substrate-unit regions, in each of which the first interconnection, the via conductor, and the second interconnection are formed.
摘要翻译：布线基板包括基底绝缘膜，形成在基底绝缘膜的上表面侧上的第一互连，设置在形成在基底绝缘膜中的通孔中的通孔导体，以及设置在基底绝缘膜的底面侧的第二互连基底绝缘膜，第二互连件经由通孔导体连接到第一互连件。布线基板包括分割的基板单元区域，其中形成有第一互连，通孔导体和第二互连。

52. 发明授权

US07649749B2 Wiring substrate, semiconductor device, and method of manufacturing the same 失效
标题翻译：接线基板，半导体装置及其制造方法
公开(公告)号：US07649749B2
公开(公告)日：2010-01-19
申请号：US11822599
申请日：2007-07-09
申请人： Jun Tsukano , Kenta Ogawa , Takehiko Maeda , Shintaro Yamamichi , Katsumi Kikuchi
发明人： Jun Tsukano , Kenta Ogawa , Takehiko Maeda , Shintaro Yamamichi , Katsumi Kikuchi
IPC分类号： H05K1/11 , H05K1/14
CPC分类号： H05K1/0271 , H01L21/4846 , H01L21/563 , H01L21/6835 , H01L23/13 , H01L23/49816 , H01L23/49827 , H01L2224/16 , H01L2224/16225 , H01L2224/16235 , H01L2224/16237 , H01L2224/32225 , H01L2224/73204 , H01L2924/00011 , H01L2924/00014 , H01L2924/01019 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/10253 , H01L2924/15311 , H05K3/205 , H05K3/4644 , H05K2201/09018 , H05K2201/09481 , H05K2201/09781 , H01L2924/00 , H01L2224/0401
摘要： A wiring substrate includes a base insulating film, a first interconnection formed on a top surface side of the base insulating film, a via conductor provided in a via formed in the base insulating film, and a second interconnection provided on a bottom surface side of the base insulating film. The second interconnection is connected to the first interconnection via the via. The wiring substrate includes divided-substrate-unit regions, in each of which the first interconnection, the via, and the second interconnection are formed. The wiring substrate includes a warpage-controlling pattern on the base insulating film, with a warped shape such that when the wiring substrate rests on a horizontal plate, at least a central part of a plane surface of the substrate contacts the horizontal plate, with both ends of the side raised.
摘要翻译：布线基板包括基底绝缘膜，形成在基底绝缘膜的顶表面侧的第一互连，设置在形成在基底绝缘膜中的通孔中的通孔导体，以及设置在基底绝缘膜的底表面侧的第二互连基底绝缘膜。第二互连通过通孔连接到第一互连。布线基板包括分开的基板单元区域，其中形成有第一互连，通孔和第二互连。布线基板包括在基底绝缘膜上的翘曲控制图案，具有翘曲形状，使得当布线基板搁置在水平板上时，基板的平面的至少中心部分接触水平板，两者一边抬起头。

53. 发明授权

US4856353A Nondestructive inspection apparatus for heat-transfer tubes in boilers 失效
标题翻译：锅炉换热管无损检测装置
公开(公告)号：US4856353A
公开(公告)日：1989-08-15
申请号：US323192
申请日：1989-03-13
申请人： Yoshimi Okabe , Katsumi Kikuchi
发明人： Yoshimi Okabe , Katsumi Kikuchi
IPC分类号： G01N21/88 , F22B37/02 , F28F11/00 , G01N21/954 , G02B23/24
CPC分类号： G01N21/954 , G02B23/2492
摘要： When a measuring instrument is inserted through a header into a boiler heat-transfer tube so as to carry out inspection, a guide for insertion of the measuring instrument is positively and correctly aligned with a heat transfer tube hole of the header.
摘要翻译：当将测量仪器通过集管插入锅炉传热管中进行检查时，用于插入测量仪器的引导件与插头的传热管孔正确对准。

54. 发明授权

US08692364B2 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US08692364B2
公开(公告)日：2014-04-08
申请号：US13389234
申请日：2010-08-06
申请人： Katsumi Kikuchi , Yoshiki Nakashima , Kentaro Mori , Shintaro Yamamichi
发明人： Katsumi Kikuchi , Yoshiki Nakashima , Kentaro Mori , Shintaro Yamamichi
IPC分类号： H01L23/06 , H01L23/48 , H01L23/02 , H01L23/522 , H01L21/4763 , H01L21/48
CPC分类号： H05K1/185 , H01L23/49827 , H01L23/5389 , H01L24/24 , H01L24/82 , H01L25/105 , H01L2224/04105 , H01L2224/12105 , H01L2224/24226 , H01L2224/73267 , H01L2224/92 , H01L2225/1035 , H01L2225/1058 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01049 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/10329 , H01L2924/12044 , H01L2924/1461 , H01L2924/15311 , H01L2924/15331 , H01L2924/19041 , H01L2924/3511 , H05K1/0366 , H05K3/4682 , H05K2201/029 , H05K2201/10674 , H05K2203/063 , H05K2203/1469 , H01L2224/83 , H01L2224/82 , H01L2924/00
摘要： A semiconductor device includes an embedding layer in which one or more semiconductor element(s) is embedded and one or more interconnect layers as well as one or more insulation layers on one or both sides of the embedding layer. The embedding layer includes a woven cloth formed by reinforcement fibers. The woven cloth has an opening on its site embedding the semiconductor element. The opening is arranged so that direction of the reinforcement fibers will have a preset angle with respect to a direction of a side of or a tangent to at least a portion of the opening, the preset angle being other than a square angle or a zero angle (parallelism).
摘要翻译：一种半导体器件包括其中嵌入一个或多个半导体元件的嵌入层和一个或多个互连层以及在嵌入层的一侧或两侧上的一个或多个绝缘层。嵌入层包括由增强纤维形成的织布。编织布在其内部具有嵌入半导体元件的开口。开口被布置成使得加强纤维的方向相对于开口的至少一部分的一侧的方向或切线的方向具有预设角度，预设角度不同于方角或零角度（并行）。

55. 发明申请

US20120133052A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120133052A1
公开(公告)日：2012-05-31
申请号：US13389234
申请日：2010-08-06
申请人： Katsumi Kikuchi , Yoshiki Nakashima , Kentaro Mori , Shintaro Yamamichi
发明人： Katsumi Kikuchi , Yoshiki Nakashima , Kentaro Mori , Shintaro Yamamichi
IPC分类号： H01L23/522 , H01L21/768
CPC分类号： H05K1/185 , H01L23/49827 , H01L23/5389 , H01L24/24 , H01L24/82 , H01L25/105 , H01L2224/04105 , H01L2224/12105 , H01L2224/24226 , H01L2224/73267 , H01L2224/92 , H01L2225/1035 , H01L2225/1058 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01049 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/10329 , H01L2924/12044 , H01L2924/1461 , H01L2924/15311 , H01L2924/15331 , H01L2924/19041 , H01L2924/3511 , H05K1/0366 , H05K3/4682 , H05K2201/029 , H05K2201/10674 , H05K2203/063 , H05K2203/1469 , H01L2224/83 , H01L2224/82 , H01L2924/00
摘要： A semiconductor device includes an embedding layer in which one or more semiconductor element(s) is embedded and one or more interconnect layers as well as one or more insulation layers on one or both sides of the embedding layer. The embedding layer includes a woven cloth formed by reinforcement fibers. The woven cloth has an opening on its site embedding the semiconductor element. The opening is arranged so that direction of the reinforcement fibers will have a preset angle with respect to a direction of a side of or a tangent to at least a portion of the opening, the preset angle being other than a square angle or a zero angle (parallelism).
摘要翻译：一种半导体器件包括其中嵌入一个或多个半导体元件的嵌入层和一个或多个互连层以及在嵌入层的一侧或两侧上的一个或多个绝缘层。嵌入层包括由增强纤维形成的织布。编织布在其内部具有嵌入半导体元件的开口。开口被布置成使得加强纤维的方向相对于开口的至少一部分的一侧的方向或切线的方向具有预设角度，预设角度不同于方角或零角度（并行）。

56. 发明授权

US08050050B2 Wiring board, semiconductor device, and method of manufacturing the same 有权
公开(公告)号：US08050050B2
公开(公告)日：2011-11-01
申请号：US12960148
申请日：2010-12-03
申请人： Shintaro Yamamichi , Katsumi Kikuchi , Yoichiro Kurita , Koji Soejima
发明人： Shintaro Yamamichi , Katsumi Kikuchi , Yoichiro Kurita , Koji Soejima
IPC分类号： H05K1/11
CPC分类号： H01L23/49816 , H01L21/6835 , H01L23/5383 , H01L23/5386 , H01L24/81 , H01L24/97 , H01L25/0657 , H01L2221/68345 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/16235 , H01L2224/81801 , H01L2224/97 , H01L2225/06517 , H01L2225/06572 , H01L2225/06586 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01056 , H01L2924/01057 , H01L2924/01072 , H01L2924/01073 , H01L2924/01082 , H01L2924/09701 , H01L2924/10329 , H01L2924/12044 , H01L2924/14 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/00 , H01L2224/05599
摘要： A semiconductor device comprising a flat wiring board, a first LSI disposed on one surface of the wiring board, a sealing resin for covering the one surface and a side face of the first semiconductor element, and a second LSI disposed on another surface of the wiring board. The wiring board has conductive wiring as a wiring layer, an insulation resin as a support layer for the wiring layer, and a conductive through-hole that passes through the wiring layer and the support layer. Connection points between lands disposed in positions in which the external peripheral edges of the semiconductor elements transverse the interior of the lands as viewed vertically from above, which lands are selected from land portions on which the external connection terminals are formed, and the wiring board formed in the same plane as the lands, are unevenly distributed toward one side of the wiring board. Connections for very small wiring are thereby made possible, and a plurality of semiconductor elements can be very densely connected.

57. 发明授权

US08004085B2 Semiconductor device and method of manufacturing semiconductor device 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08004085B2
公开(公告)日：2011-08-23
申请号：US12593824
申请日：2008-02-13
申请人： Shintaro Yamamichi , Katsumi Kikuchi , Jun Sakai , Hikaru Kouta
发明人： Shintaro Yamamichi , Katsumi Kikuchi , Jun Sakai , Hikaru Kouta
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40 , H01L27/10 , H01L29/73 , H01L29/74
CPC分类号： H01L23/5283 , H01L23/3171 , H01L23/5286 , H01L24/14 , H01L2224/05001 , H01L2224/05009 , H01L2224/05022 , H01L2224/05568 , H01L2224/0557 , H01L2224/05572 , H01L2224/056 , H01L2224/13022 , H01L2224/13111 , H01L2924/00013 , H01L2924/00014 , H01L2924/01029 , H01L2924/14 , H01L2924/19041 , H01L2924/01047 , H01L2224/13099 , H01L2924/00 , H01L2224/05099
摘要： A semiconductor device has an element interconnection 2, a top-layer element interconnection 4, a super-connect interconnection 10 and a bump 7. The element interconnection 2 is provided on a semiconductor substrate 1 through a plurality of insulating layers 50. The top-layer element interconnection 4 is formed above the element interconnection 2 by using a substantially equivalent process equipment. The super-connect interconnection 10 is provided on the top-layer element interconnection 4 through a super-connect insulating layer 9 having a thickness five or more times larger than that of the insulating layer 5, and has a thickness three or more times larger than that of each the element interconnection 2 and the top-layer element interconnection 4. The bump 7 is formed on the super-connect interconnection 10. The top-layer element interconnection 4 has a signal pad 4s, a power source pad 4v and a ground pad 4g. An area of the signal pad 4s is smaller than each area of the power source pad 4v and the ground pad 4g.
摘要翻译：半导体器件具有元件互连2，顶层元件互连4，超连接互连10和凸块7.元件互连2通过多个绝缘层50设置在半导体衬底1上。层元件互连4通过使用基本相同的处理设备形成在元件互连2上方。超连接互连10通过具有比绝缘层5的厚度大五倍以上的厚度的超连接绝缘层9设置在顶层元件布线4上，并且具有比绝缘层5的厚度大三倍以上的厚度元件互连2和顶层元件互连4中的每一个。凸块7形成在超连接互连10上。顶层元件互连4具有信号焊盘4s，电源焊盘4v和接地垫4g。信号焊盘4s的面积比电源焊盘4v和接地焊盘4g的面积小。

58. 发明授权

US07784653B2 Discharge device and discharge method 有权
标题翻译：放电装置及放电方式
公开(公告)号：US07784653B2
公开(公告)日：2010-08-31
申请号：US11199131
申请日：2005-08-09
申请人： Katsumi Kikuchi
发明人： Katsumi Kikuchi
IPC分类号： B65D5/72 , B65D83/00 , B65D35/38 , B43K5/18 , B43K7/04 , B43K5/00 , B43K5/16 , B67D3/00
CPC分类号： B05C17/00503 , B05C5/02 , H01L21/67126
摘要： By means of a fluid material discharge device of simple construction, a technique for fluid material discharge is provided which has few or no inadequate discharge, high productivity, and which enables easy modification and adjustment of the amount of fluid material discharge. The fluid material discharge device comprises a nozzle for discharge of fluid material and a filament-shape member inserted into the nozzle for use. The filament-shape member has a tip portion AA, which is exposed outside of the nozzle when no pressure is exerted on the tip of the filament-shape member, a portion BB which can be inserted into the nozzle, and a portion CC, on the side of the filament-shape member opposite the tip portion AA, and being bent from the portion BB. The spring structure of the filament-shape member is utilized to discharge fluid material.
摘要翻译：通过简单结构的流体物料排出装置，提供了一种液体材料排出技术，其排放量很少或排放不足，生产率高，能够容易地改变和调节流体材料的排出量。流体材料排出装置包括用于排出流体材料的喷嘴和插入喷嘴中的丝状构件用于使用。长丝状构件具有尖端部AA，当没有压力施加在丝状构件的顶端上时，暴露在喷嘴外部，可以插入到喷嘴中的部分BB和部分CC 长丝状部件的与末端部分AA相对的一侧，并从部分BB弯曲。丝状构件的弹簧结构用于排出流体材料。

59. 发明申请

US20100117228A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件及制造半导体器件的方法
公开(公告)号：US20100117228A1
公开(公告)日：2010-05-13
申请号：US12593824
申请日：2008-02-13
申请人： Shintaro Yamamichi , Katsumi Kikuchi , Jun Sakai , Hikaru Kouta
发明人： Shintaro Yamamichi , Katsumi Kikuchi , Jun Sakai , Hikaru Kouta
IPC分类号： H01L23/52 , H01L23/48
CPC分类号： H01L23/5283 , H01L23/3171 , H01L23/5286 , H01L24/14 , H01L2224/05001 , H01L2224/05009 , H01L2224/05022 , H01L2224/05568 , H01L2224/0557 , H01L2224/05572 , H01L2224/056 , H01L2224/13022 , H01L2224/13111 , H01L2924/00013 , H01L2924/00014 , H01L2924/01029 , H01L2924/14 , H01L2924/19041 , H01L2924/01047 , H01L2224/13099 , H01L2924/00 , H01L2224/05099
摘要： A semiconductor device has an element interconnection 2, a top-layer element interconnection 4, a super-connect interconnection 10 and a bump 7. The element interconnection 2 is provided on a semiconductor substrate 1 through a plurality of insulating layers 50. The top-layer element interconnection 4 is formed above the element interconnection 2 by using a substantially equivalent process equipment. The super-connect interconnection 10 is provided on the top-layer element interconnection 4 through a super-connect insulating layer 9 having a thickness five or more times larger than that of the insulating layer 5, and has a thickness three or more times larger than that of each the element interconnection 2 and the top-layer element interconnection 4. The bump 7 is formed on the super-connect interconnection 10. The top-layer element interconnection 4 has a signal pad 4s, a power source pad 4v and a ground pad 4g. An area of the signal pad 4s is smaller than each area of the power source pad 4v and the ground pad 4g.
摘要翻译：半导体器件具有元件互连2，顶层元件互连4，超连接互连10和凸块7.元件互连2通过多个绝缘层50设置在半导体衬底1上。层元件互连4通过使用基本相同的处理设备形成在元件互连2上方。超连接互连10通过具有比绝缘层5的厚度大五倍以上的厚度的超连接绝缘层9设置在顶层元件布线4上，并且具有比绝缘层5的厚度大三倍以上的厚度元件互连2和顶层元件互连4中的每一个。凸块7形成在超连接互连10上。顶层元件互连4具有信号焊盘4s，电源焊盘4v和接地垫4g。信号焊盘4s的面积比电源焊盘4v和接地焊盘4g的面积小。

60. 发明申请

US20090137085A1 METHOD OF MANUFACTURING A WIRING SUBSTRATE AND SEMICONDUCTOR DEVICE 失效
标题翻译：制造接线基板和半导体器件的方法
公开(公告)号：US20090137085A1
公开(公告)日：2009-05-28
申请号：US12340267
申请日：2008-12-19
申请人： Jun TSUKANO , Kenta Ogawa , Takehiko Maeda , Shintaro Yamamichi , Katsumi Kikuchi
发明人： Jun TSUKANO , Kenta Ogawa , Takehiko Maeda , Shintaro Yamamichi , Katsumi Kikuchi
IPC分类号： H01L21/58
CPC分类号： H05K1/0271 , H01L21/4846 , H01L21/563 , H01L21/6835 , H01L23/13 , H01L23/49816 , H01L23/49827 , H01L2224/16 , H01L2224/16225 , H01L2224/16235 , H01L2224/16237 , H01L2224/32225 , H01L2224/73204 , H01L2924/00011 , H01L2924/00014 , H01L2924/01019 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/10253 , H01L2924/15311 , H05K3/205 , H05K3/4644 , H05K2201/09018 , H05K2201/09481 , H05K2201/09781 , H01L2924/00 , H01L2224/0401
摘要： A wiring substrate includes a base insulating film, a first interconnection formed on a top surface side of the base insulating film, a via conductor provided in a via hole formed in the base insulating film, and a second interconnection provided on a bottom surface side of the base insulating film, the second interconnection being connected to the first interconnection via the via conductor. The wiring substrate includes divided-substrate-unit regions, in each of which the first interconnection, the via conductor, and the second interconnection are formed. The wiring substrate includes a warpage-controlling pattern on the base insulating film, and has a warped shape such that when the wiring substrate is left at rest on a horizontal plate, at least a central part of each side of a plane surface of the substrate contacts the horizontal plate, with both ends of the side raised, where each of the sides extends along a second direction perpendicular to a first direction in the plane surface of the substrate.
摘要翻译：布线基板包括基底绝缘膜，形成在基底绝缘膜的上表面侧上的第一互连，设置在形成在基底绝缘膜中的通孔中的通孔导体，以及设置在基底绝缘膜的底面侧的第二互连基底绝缘膜，第二互连件经由通孔导体连接到第一互连件。布线基板包括分割的基板单元区域，其中形成有第一互连，通孔导体和第二互连。布线基板包括在基底绝缘膜上的翘曲控制图案，并且具有翘曲形状，使得当布线基板静止在水平板上时，基板的平面的每一侧的至少中心部分接触水平板，其侧面的两端被凸起，其中每个侧面沿着垂直于基板的平面表面中的第一方向的第二方向延伸。

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