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51. 发明申请

US20120012949A1 PRESSURE SENSOR PACKAGE SYSTEMS AND METHODS 有权
标题翻译：压力传感器包装系统和方法
公开(公告)号：US20120012949A1
公开(公告)日：2012-01-19
申请号：US12835111
申请日：2010-07-13
申请人： Bernhard Winkler , Rainer Leuschner , Horst Theuss
发明人： Bernhard Winkler , Rainer Leuschner , Horst Theuss
IPC分类号： H01L29/84 , B29C70/68 , H01L31/0203
CPC分类号： B81B7/0058 , B81B2201/025 , B81B2201/0264 , B81B2207/012 , B81B2207/015 , B81C2203/0154 , G01L9/0054 , G01L15/00 , G01L19/141 , G01L19/148 , H01L29/84 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/48465 , H01L2924/1461 , H01L2924/181 , H01L2924/1815 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： Embodiments relate to integrated circuit (IC) sensors and sensing systems and methods. In an embodiment, an IC sensor device includes at least one sensing element; a framing element disposed around the at least one sensing element at a wafer-level; and a package having at least one port predefined at the wafer-level by the framing element, the at least one port configured to expose at least a portion of the at least one sensing element to an ambient environment.
摘要翻译：实施例涉及集成电路（IC）传感器和感测系统和方法。在一个实施例中，IC传感器装置包括至少一个感测元件; 在晶片级周围设置在所述至少一个感测元件周围的成帧元件; 以及封装，其具有通过框架元件在晶片级预定义的至少一个端口，所述至少一个端口被配置为将所述至少一个感测元件的至少一部分暴露于周围环境。

52. 发明申请

US20100002501A1 MRAM Device Structure Employing Thermally-Assisted Write Operations and Thermally-Unassisted Self-Referencing Operations 有权
标题翻译：采用热辅助写入操作和热辅助自我参考操作的MRAM器件结构
公开(公告)号：US20100002501A1
公开(公告)日：2010-01-07
申请号：US12168671
申请日：2008-07-07
申请人： Rainer Leuschner , Ulrich Klostermann , Richard Ferrant
发明人： Rainer Leuschner , Ulrich Klostermann , Richard Ferrant
IPC分类号： G11C11/02 , H01L21/00 , G11C7/00
CPC分类号： G11C7/04 , B82Y25/00 , B82Y40/00 , G11C11/16 , G11C11/1675 , H01F10/3254 , H01F10/3272 , H01F41/307 , H01L27/228 , H01L43/08 , H01L43/12
摘要： A thermally-assisted MRAM structure which is programmable at a writing mode operating temperature is presented and includes an anti-ferromagnet, an artificial anti-ferromagnet, a barrier layer, and a free magnetic layer. The anti-ferromagnet is composed of a material having a blocking temperature Tb which is lower than the writing mode operating temperature of the magnetic random access memory structure. The artificial anti-ferromagnet is magnetically coupled to the anti-ferromagnet, and includes first and second magnetic layers, and a coupling layer interposed therebetween, the first and second magnetic layers having different Curie point temperatures. The barrier layer is positioned to be between the second magnetic layer and the free magnetic layer.
摘要翻译：提出了一种在写入模式工作温度下可编程的热辅助MRAM结构，其包括反铁磁体，人造抗铁磁体，阻挡层和自由磁性层。抗铁磁体由具有比磁性随机存取存储器结构的写入模式工作温度低的阻挡温度Tb的材料构成。人造抗铁磁体磁耦合到抗铁磁体，并且包括第一和第二磁性层以及插入其间的耦合层，第一和第二磁性层具有不同的居里点温度。阻挡层被定位在第二磁性层和自由磁性层之间。

53. 发明申请

US20090073737A1 Integrated Circuits; Methods for Manufacturing an Integrating Circuit; Memory Modules 审中-公开
标题翻译：集成电路; 集成电路制造方法; 内存模块
公开(公告)号：US20090073737A1
公开(公告)日：2009-03-19
申请号：US11856659
申请日：2007-09-17
申请人： Ulrich Klostermann , Rainer Leuschner
发明人： Ulrich Klostermann , Rainer Leuschner
IPC分类号： G11C7/02 , G11C11/02 , H01L21/00
CPC分类号： H01L27/222 , G11C11/161 , H01L43/08
摘要： Embodiments of the invention relate generally to integrated circuits, to methods for manufacturing an integrating circuit, and to memory modules. In an embodiment of the invention, an integrated circuit is provided having a memory cell. The memory cell may include a first magnetic layer structure, a tunnel barrier layer structure disposed above the first magnetic layer structure, a second magnetic layer structure disposed above the tunnel barrier layer structure, and at least one sacrificial material layer to suppress electrochemical corrosion of the first magnetic layer structure or the second magnetic layer structure.
摘要翻译：本发明的实施例一般涉及集成电路，用于制造集成电路的方法以及存储器模块。在本发明的实施例中，提供了具有存储单元的集成电路。存储单元可以包括第一磁性层结构，设置在第一磁性层结构之上的隧道阻挡层结构，设置在隧道势垒层结构之上的第二磁性层结构，以及至少一个牺牲材料层，以抑制第一磁性层结构或第二磁性层结构。

54. 发明授权

US07344896B2 Ferromagnetic liner for conductive lines of magnetic memory cells and methods of manufacturing thereof 有权
标题翻译：用于磁记忆单元导电线的铁磁衬垫及其制造方法
公开(公告)号：US07344896B2
公开(公告)日：2008-03-18
申请号：US10899488
申请日：2004-07-26
申请人： Rainer Leuschner , Wolfgang Raberg , Stephen L. Brown , Frank Findeis , Sivanandha K. Kanakasabapathy , Michael Vieth
发明人： Rainer Leuschner , Wolfgang Raberg , Stephen L. Brown , Frank Findeis , Sivanandha K. Kanakasabapathy , Michael Vieth
IPC分类号： H01L21/00
CPC分类号： G11C11/16 , H01L21/76844 , H01L21/76846 , H01L21/76849 , H01L21/76874 , H01L27/222
摘要： Methods of forming ferromagnetic liners on the top surface and sidewalls of conductive lines of magnetic memory devices. The ferromagnetic liners increase the flux concentration of current run through the conductive lines, reducing the amount of write current needed to switch magnetic memory cells. In one embodiment, an in-bound pole is formed at the bottom edge of conductive lines, further concentrating the flux.
摘要翻译：在磁存储器件的导线的顶表面和侧壁上形成铁磁衬垫的方法。铁磁衬垫增加通过导线的电流的通量浓度，减少了切换磁存储单元所需的写入电流。在一个实施例中，在导线的底部边缘处形成入极，进一步集中焊剂。

55. 发明申请

US20070010031A1 Method of treating a substrate in manufacturing a magnetoresistive memory cell 有权
标题翻译：在制造磁阻存储单元时处理衬底的方法
公开(公告)号：US20070010031A1
公开(公告)日：2007-01-11
申请号：US11175386
申请日：2005-07-07
申请人： Stefan Ottow , Kim Woosik , Rainer Leuschner
发明人： Stefan Ottow , Kim Woosik , Rainer Leuschner
IPC分类号： H01L21/00
CPC分类号： H01L43/12 , Y10S438/906
摘要： A method of treating a substrate in manufacturing a magnetoresistive memory cell includes performing a cleaning operation on the substrate using a mask layer as a protection layer for etching of a peripheral via. Further, an etch stop layer can used as a protection layer in a cleaning operation on the substrate.
摘要翻译：在制造磁阻存储单元中处理衬底的方法包括使用掩模层作为用于蚀刻周边通孔的保护层来对衬底进行清洁操作。此外，在衬底上的清洁操作中，可以使用蚀刻停止层作为保护层。

56. 发明授权

US07088612B2 MRAM with vertical storage element in two layer-arrangement and field sensor 失效
标题翻译： MRAM具有垂直存储元件，在两层布置和场传感器中
公开(公告)号：US07088612B2
公开(公告)日：2006-08-08
申请号：US10923639
申请日：2004-08-20
申请人： Daniel Braun , Peter Beer , Rainer Leuschner , Ulrich Klostermann
发明人： Daniel Braun , Peter Beer , Rainer Leuschner , Ulrich Klostermann
IPC分类号： G11C11/15
CPC分类号： G11C11/15
摘要： A magnetic memory element including a magnetic storage element including two magnetic layers made of magnetic material, said two magnetic layers opposing each other in a parallel relationship and being vertically oriented relative to a wafer surface on which the magnetic memory element is formed, said two magnetic layers further having a magnetic anisotropy, while its magnetization vectors are magnetically coupled to at least one current line, wherein said two magnetic layers are arranged on a same side of said at least one current line, and a magnetic sensor element including at least one magnetic layer having a magnetization vector being magnetically coupled to said magnetization vectors of said two magnetic layers of said magnetic storage element, said magnetic sensor element being electrically coupled to said at least one current line.
摘要翻译：一种磁存储元件，包括由磁性材料制成的两个磁性层的磁存储元件，所述两个磁性层相对于彼此相对并且相对于其上形成有磁存储元件的晶片表面垂直取向，所述两个磁性层进一步具有磁各向异性的层，而其磁化矢量磁耦合到至少一个电流线，其中所述两个磁性层布置在所述至少一条电流线的同一侧，以及包括至少一个磁性的磁性传感器元件层，其磁化矢量磁耦合到所述磁存储元件的所述两个磁性层的所述磁化矢量，所述磁传感器元件电耦合到所述至少一条电流线。

57. 发明申请

US20060039186A1 MRAM with vertical storage element in two layer-arrangement and field sensor 失效
标题翻译： MRAM具有垂直存储元件，在两层布置和场传感器中
公开(公告)号：US20060039186A1
公开(公告)日：2006-02-23
申请号：US10923639
申请日：2004-08-20
申请人： Daniel Braun , Peter Beer , Rainer Leuschner , Ulrich Klostermann
发明人： Daniel Braun , Peter Beer , Rainer Leuschner , Ulrich Klostermann
IPC分类号： G11C11/00
CPC分类号： G11C11/15
摘要： The present invention relates to a magnetic memory element comprising a magnetic storage element comprised of two magnetic layers made of magnetic material, said two magnetic layers opposing each other in a parallel relationship and being vertically oriented relative to a wafer surface on which the magnetic memory element is formed, said two magnetic layers further having a magnetic anisotropy, while its magnetization vectors are magnetically coupled to at least one current line, wherein said two magnetic layers are arranged on a same side of said at least one current line, and a magnetic sensor element comprising at least one magnetic layer having a magnetization vector being magnetically coupled to said magnetization vectors of said two magnetic layers of said magnetic storage element, said magnetic sensor element being electrically coupled to said at least one current line.
摘要翻译：磁存储元件本发明涉及一种磁存储元件，它包括由磁性材料制成的两个磁性层构成的磁存储元件，所述两个磁性层相对于彼此相对并且相对于晶片表面垂直取向，在该晶片表面上磁性存储元件所述两个磁性层进一步具有磁各向异性，而其磁化矢量磁耦合到至少一条电流线，其中所述两个磁性层布置在所述至少一条电流线的同一侧，并且磁传感器元件包括至少一个磁性层，其磁化矢量磁耦合到所述磁存储元件的所述两个磁性层的所述磁化矢量，所述磁性传感器元件电耦合到所述至少一条电流线。

58. 发明申请

US20060039185A1 MRAM with magnetic via for storage of information and field sensor 失效
标题翻译：磁通用MRAM存储信息和现场传感器
公开(公告)号：US20060039185A1
公开(公告)日：2006-02-23
申请号：US10922434
申请日：2004-08-20
申请人： Daniel Braun , Rainer Leuschner , Ulrich Klostermann
发明人： Daniel Braun , Rainer Leuschner , Ulrich Klostermann
IPC分类号： G11C11/00
CPC分类号： G11C11/15
摘要： A magnetic memory element is disclosed. The magnetic memory element includes a magnetic via for storing information, made of a magnetic material and being vertically oriented relative to a wafer surface on which the magnetic memory element is formed, the magnetic via having a magnetic anisotropy with its magnetization vector being magnetically coupled to at least one current line, and a magnetic sensor element comprising at least one magnetic layer having a magnetization vector being magnetically coupled to the magnetization vector of the magnetic via, wherein the magnetic sensor element being conductively connected to said at least one current line.
摘要翻译：公开了一种磁存储元件。磁存储元件包括用于存储由磁性材料制成并且相对于其上形成有磁存储元件的晶片表面垂直定向的磁通孔，磁通量具有磁各向异性，其磁化矢量磁耦合到至少一个电流线，以及包括至少一个磁性层的磁性传感器元件，所述至少一个磁性层具有与磁通孔的磁化矢量磁耦合的磁化矢量，其中所述磁性传感器元件导电连接到所述至少一条电流线。

59. 发明申请

US20060019487A1 Ferromagnetic liner for conductive lines of magnetic memory cells and methods of manufacturing thereof 有权
标题翻译：用于磁记忆单元导电线的铁磁衬垫及其制造方法
公开(公告)号：US20060019487A1
公开(公告)日：2006-01-26
申请号：US10899488
申请日：2004-07-26
申请人： Rainer Leuschner , Wolfgang Raberg , Stephen Brown , Frank Findeis , Sivanandha Kanakasabapathy , Michael Vieth
发明人： Rainer Leuschner , Wolfgang Raberg , Stephen Brown , Frank Findeis , Sivanandha Kanakasabapathy , Michael Vieth
IPC分类号： H01L21/4763
CPC分类号： G11C11/16 , H01L21/76844 , H01L21/76846 , H01L21/76849 , H01L21/76874 , H01L27/222
摘要： Methods of forming ferromagnetic liners on the top surface and sidewalls of conductive lines of magnetic memory devices. The ferromagnetic liners increase the flux concentration of current run through the conductive lines, reducing the amount of write current needed to switch magnetic memory cells. In one embodiment, an in-bound pole is formed at the bottom edge of conductive lines, further concentrating the flux.
摘要翻译：在磁存储器件的导线的顶表面和侧壁上形成铁磁衬垫的方法。铁磁衬垫增加通过导线的电流的通量浓度，减少了切换磁存储单元所需的写入电流。在一个实施例中，在导线的底部边缘处形成入极，进一步集中焊剂。

60. 发明授权

US06704230B1 Error detection and correction method and apparatus in a magnetoresistive random access memory 有权
标题翻译：磁阻随机存取存储器中的误差检测和校正方法及装置
公开(公告)号：US06704230B1
公开(公告)日：2004-03-09
申请号：US10250201
申请日：2003-06-12
申请人： John K. DeBrosse , Heinz Hoenigschmid , Rainer Leuschner , Gerhard Mueller
发明人： John K. DeBrosse , Heinz Hoenigschmid , Rainer Leuschner , Gerhard Mueller
IPC分类号： G11C2900
CPC分类号： G11C7/24 , G06F11/106 , G11C11/406
摘要： The present invention relates to a method and apparatus for reducing data errors in a magneto-resistive random access memory (MRAM). According to the disclosed method, data bits and associated error correction code (ECC) check bits are stored into a storage area. Thereafter, the data bits and ECC check bits are read out and any errors are detected and corrected. A data refresh is then initiated based on a count and data bits and associated ECC check bits stored in the storage area are then refreshed by accessing the stored data bits and the associated ECC check bits, and ultimately by checking, correcting and restoring the data bits and the ECC check bits to the storage area.
摘要翻译：本发明涉及一种用于减少磁阻随机存取存储器（MRAM）中的数据错误的方法和装置。根据所公开的方法，将数据位和相关联的纠错码（ECC）校验位存储到存储区域中。此后，读出数据位和ECC校验位，并检测和校正任何错误。然后基于计数开始数据刷新，然后通过访问存储的数据位和相关联的ECC校验位来刷新存储在存储区域中的相关ECC校验位，并且最终通过检查，校正和恢复数据位并将ECC校验位存储到存储区域。

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