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    • 51. 发明授权
    • Liquid crystal display device
    • 液晶显示装置
    • US08952948B2
    • 2015-02-10
    • US13292892
    • 2011-11-09
    • Myung Kook MoonHyun Taek NamJong Woo Kim
    • Myung Kook MoonHyun Taek NamJong Woo Kim
    • G09G5/00G09G3/34G09G3/36
    • G09G3/3648G09G3/3614G09G3/3677G09G2300/0408G09G2310/0224G09G2310/0289G09G2310/08
    • An LCD device is discussed in which a level shifter generates two switching signals, and transmits the generated signals to a gate driver of a liquid crystal display panel by the use of one voltage signal transmitted from a timing controller. The LCD device according to an embodiment includes a liquid crystal display panel in which a gate driver for alternately driving two transistors is formed; a data driver which drives data lines of the liquid crystal display panel; a timing controller which generates one voltage signal for switching the two transistors, and outputs the one voltage signal; and a level shifter which generates two of first and second switching signals to switch the two transistors by using the one voltage signal, and outputs the generated switching signals to the gate driver.
    • 讨论了一种LCD装置,其中电平移位器产生两个开关信号,并且通过使用从定时控制器发送的一个电压信号将所生成的信号发送到液晶显示面板的栅极驱动器。 根据实施例的LCD装置包括:液晶显示面板,其中形成用于交替驱动两个晶体管的栅极驱动器; 驱动液晶显示面板的数据线的数据驱动器; 定时控制器,其产生用于切换所述两个晶体管的一个电压信号,并输出所述一个电压信号; 以及电平移位器,其通过使用一个电压信号产生第一和第二开关信号中的两个以切换两个晶体管,并将所生成的开关信号输出到栅极驱动器。
    • 54. 发明授权
    • Method for fabricating an enlarged oxide-nitride-oxide structure for NAND flash memory semiconductor devices
    • 制造用于NAND闪速存储器半导体器件的增大的氧化物 - 氮化物 - 氧化物结构的方法
    • US08354704B2
    • 2013-01-15
    • US12917419
    • 2010-11-01
    • Li JiangHong Xiu PengJong Woo Kim
    • Li JiangHong Xiu PengJong Woo Kim
    • H01L29/76
    • H01L29/7881H01L29/42336H01L29/66825
    • A method of processing a flash memory device provides a semiconductor substrate including a surface region and forming a gate dielectric layer overlying the surface region. The method forms a floating gate layer having a thickness and including a first floating gate structure overlying a first portion of the gate dielectric layer and a second floating gate structure overlying a second portion of the gate dielectric layer. The method forms a trench region interposed between the first and second floating gate structures and extending through the entire thickness and through a portion of the surface region into a depth of the substrate. The method fills the entire depth of the trench region in the substrate and a portion of the trench region over the substrate using a dielectric fill material. The method forms an oxide on nitride on oxide (ONO) layer overlying the first and second floating gate structures and the dielectric material and a control gate overlying the ONO layer.
    • 一种处理闪速存储器件的方法提供了包括表面区域并形成覆盖在表面区域上的栅极电介质层的半导体衬底。 该方法形成具有厚度并包括覆盖栅极电介质层的第一部分的第一浮动栅极结构和覆盖栅极电介质层的第二部分的第二浮动栅极结构的浮动栅极层。 该方法形成插入在第一和第二浮栅结构之间并且延伸穿过整个厚度并且通过表面区域的一部分延伸到衬底的深度的沟槽区域。 该方法使用电介质填充材料填充衬底中的沟槽区域的整个深度以及衬底上的沟槽区域的一部分。 该方法在覆盖第一和第二浮栅结构和电介质材料的氧化物(ONO)层上的氮化物上形成氧化物,以及覆盖ONO层的控制栅极。
    • 56. 发明授权
    • Method for inspecting the electrical performance of a flash memory cell
    • 用于检查闪存单元的电性能的方法
    • US07940584B2
    • 2011-05-10
    • US11927432
    • 2007-10-29
    • Tae Kyu KimJong Woo KimXianghua Ye
    • Tae Kyu KimJong Woo KimXianghua Ye
    • G11C7/00
    • G11C29/50G11C16/04G11C29/50004
    • The present invention discloses a method for inspecting the electrical performance of a flash memory cell, which comprises: performing electron-storage programming on a flash memory cell for a pre-determined period; screening out flash memory cells that reach a specified reference value as a mother batch of flash memory cells that meet the preliminary requirement, by measuring the threshold voltage; then performing a second electron-storage programming on the flash memory cells screened out for a certain time period; baking these flash memory cells; and finally, measuring the threshold voltage of these baked flash memory cells again and determining whether the threshold voltage can still be maintained at or above the reference value, so that it can be determined ultimately whether the flash memory cells meet the electrical performance requirements.
    • 本发明公开了一种用于检查闪速存储单元的电气性能的方法,该方法包括:在闪速存储单元上进行预定周期的电子存储编程; 通过测量阈值电压,筛选达到指定参考值的闪存单元作为满足初步要求的母版闪存单元; 然后在闪存单元上执行第二电子存储节目,屏蔽一段时间; 烘烤这些闪存单元; 最后,再次测量这些烘焙闪速存储器单元的阈值电压,并确定阈值电压是否仍然可以保持在基准值以上,从而可以最终确定闪存单元是否满足电气性能要求。
    • 57. 发明授权
    • Multi-channel pulse width modulation apparatus
    • 多通道脉宽调制装置
    • US07580532B2
    • 2009-08-25
    • US10628380
    • 2003-07-29
    • Dong Han SeoOh Suk KwonJong Woo KimJae Gun LeeChan Tae Kim
    • Dong Han SeoOh Suk KwonJong Woo KimJae Gun LeeChan Tae Kim
    • H04R3/00
    • H03G3/001H03F3/217H03F3/68H03M1/662H03M1/70H03M1/822
    • Disclosed are multi-channel PWM (Pulse Width Modulation) apparatuses and methods for modulating PCM-based multi-channel audio signals read from an optical medium into PWM-based multi-channel audio signals. A multi-channel PWM apparatus and method can reduce noise from amplifying PCM-based audio signals having adjacent signal processing paths. The multi-channel PWM apparatus and method selectively vary only gains of some channels in a plurality of channels in order to allow an audio signal applied to a pulse width modulator to have a different level in individual channels in a prescribed system condition (e.g., overload). The multi-channel PWM apparatus can selectively enable a subset among a plurality of pulse width modulators to reduce unnecessary driving and noise. Thus, preferred embodiments can reduce or prevent deterioration of output audio signals.
    • 公开了用于将从光学介质读取的基于PCM的多声道音频信号调制为基于PWM的多声道音频信号的多通道PWM(脉宽调制)装置和方法。 多通道PWM装置和方法可以减少放大具有相邻信号处理路径的基于PCM的音频信号的噪声。 多通道PWM装置和方法仅选择性地仅改变多个通道中的一些通道的增益,以便允许施加到脉宽调制器的音频信号在规定的系统条件下在各个通道中具有不同的电平(例如,过载 )。 多通道PWM装置可以选择性地使多个脉冲宽度调制器中的子集能够减少不必要的驱动和噪声。 因此,优选实施例可以减少或防止输出音频信号的恶化。
    • 59. 发明授权
    • Mass measurement system and method using inertial force and standard mass in gravity-free environment
    • 质量测量系统和方法在无重力环境中使用惯性力和标准质量
    • US07161096B2
    • 2007-01-09
    • US11179453
    • 2005-07-12
    • Hong Yul PaikHae Jin ChoiGi Hyuk ChoiJong Woo KimYoun Kyu Kim
    • Hong Yul PaikHae Jin ChoiGi Hyuk ChoiJong Woo KimYoun Kyu Kim
    • G01G9/00
    • G01G9/00
    • The mass measurement system includes a linear acceleration motion unit that is a linear motion driving source, a first load cell fastened to the linear acceleration motion unit to measure an inertial force of a sample caused by linearly accelerated motion of the 10 linear acceleration motion unit, a second load cell fastened to the linear acceleration motion unit while being spaced apart from the first load cell by a predetermined distance, the second load cell measuring an inertial force of a standard sample having a known standard mass caused by the linearly accelerated motion of the linear acceleration motion unit, and a main control unit for calculating and outputting mass of the sample through an arithmetic operation based on the inertial forces, measured by the first and second load cells, and the standard mass, and controlling an entire operation of the system.
    • 质量测量系统包括作为线性运动驱动源的线性加速运动单元,紧固到线性加速运动单元的第一负载单元,用于测量由线性加速运动单元的线性加速运动引起的样本的惯性力, 第二测力传感器,其在与所述第一测力传感器间隔开预定距离的状态下紧固到所述线性加速运动单元,所述第二称重传感器测量由所述线性加速运动单元的线性加速运动引起的具有已知标准质量的标准样品的惯性力 线性加速运动单元,以及主控制单元,用于通过基于由第一和第二称重传感器测量的惯性力和标准质量的惯性运算来计算和输出样本的质量,并且控制系统的整个操作 。