专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

51. 发明授权

US06867996B2 Single-polarity programmable resistance-variable memory element 有权
标题翻译：单极性可编程电阻变量存储元件
公开(公告)号：US06867996B2
公开(公告)日：2005-03-15
申请号：US10230201
申请日：2002-08-29
申请人： Kristy A. Campbell , John T. Moore , Terry L. Gilton
发明人： Kristy A. Campbell , John T. Moore , Terry L. Gilton
IPC分类号： G11C13/02 , G11C16/02 , H01L45/00 , G11C17/00
CPC分类号： G11C13/0004 , G11C13/0011 , G11C13/0069 , G11C2013/009 , G11C2213/55 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/143 , H01L45/1616 , H01L45/1625
摘要： A resistance variable memory element with improved data retention and switching characteristics switched between resistance memory states upon the application of write pulses having the same polarity. The resistance variable memory element can be provided having at least one silver-selenide layer in between glass layers, the glass layers are a chalcogenide glass having a GexSe100−x composition.
摘要翻译：具有改进的数据保持和开关特性的电阻可变存储元件在施加具有相同极性的写入脉冲时在电阻存储器状态之间切换。可以提供电阻可变记忆元件，其在玻璃层之间具有至少一个硒化银层，玻璃层是具有GexSe100-x组成的硫族化物玻璃。

52. 发明授权

US06813178B2 Chalcogenide glass constant current device, and its method of fabrication and operation 有权
公开(公告)号：US06813178B2
公开(公告)日：2004-11-02
申请号：US10386028
申请日：2003-03-12
申请人： Kristy A. Campbell , Terry L. Gilton , John T. Moore , Joseph F. Brooks
发明人： Kristy A. Campbell , Terry L. Gilton , John T. Moore , Joseph F. Brooks
IPC分类号： G11C1100
CPC分类号： C03C3/321 , C03C17/02 , G11C13/0004 , G11C13/0011 , G11C27/00 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/143 , H01L45/1608 , H01L45/1641
摘要： The invention is related to methods and apparatus for providing a two-terminal constant current device, and its operation thereof. The invention provides a constant current device that maintains a constant current over an applied voltage range of at least approximately 700 mV. The invention also provides a method of changing and resetting the constant current value in a constant current device by either applying a positive potential to decrease the constant current value, or by applying a voltage more negative than the existing constant current's voltage upper limit, thereby resetting or increasing its constant current level to its original fabricated value. The invention further provides a method of forming and converting a memory device into a constant current device. The invention also provides a method for using a constant current device as an analog memory device.

53. 发明授权

US06806175B2 Method for forming protective films and spacers 失效
标题翻译：形成保护膜和垫片的方法
公开(公告)号：US06806175B2
公开(公告)日：2004-10-19
申请号：US10300582
申请日：2002-11-21
申请人： John T. Moore
发明人： John T. Moore
IPC分类号： H01L213205
CPC分类号： H01L21/76897 , H01L29/6656 , Y10S257/90
摘要： A method for protecting a gate stack in an integrated circuit wafer involves the deposition of a thin nucleation or seed layer of silicon nitride on the gate stack. Following deposition of the nucleation layer, a second, primary layer of silicon nitride is formed on the nucleation layer using a BTBAS precursor to thereby form a spacer film. The primary layer may have carbon incorporated therein.
摘要翻译：用于保护集成电路晶片中的栅极堆叠的方法涉及在栅极堆叠上沉积氮化硅的薄成核或种子层。在成核层沉积之后，使用BTBAS前体在成核层上形成第二个氮化硅一次层，从而形成间隔膜。主层可以含有碳。

54. 发明授权

US06710423B2 Chalcogenide comprising device 有权
标题翻译：含硫元素的装置
公开(公告)号：US06710423B2
公开(公告)日：2004-03-23
申请号：US10227316
申请日：2002-08-23
申请人： John T. Moore , Terry L. Gilton
发明人： John T. Moore , Terry L. Gilton
IPC分类号： H01L2900
CPC分类号： H01L45/04 , H01L27/101 , H01L28/24 , H01L45/085 , H01L45/1233 , H01L45/141 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/1658 , H01L45/1675
摘要： A method of metal doping a chalcogenide material includes forming a metal over a substrate. A chalcogenide material is formed on the metal. Irradiating is conducted through the chalcogenide material to the metal effective to break a chalcogenide bond of the chalcogenide material at an interface of the metal and chalcogenide material and diffuse at least some of the metal outwardly into the chalcogenide material. A method of metal doping a chalcogenide material includes surrounding exposed outer surfaces of a projecting metal mass with chalcogenide material. Irradiating is conducted through the chalcogenide material to the projecting metal mass effective to break a chalcogenide bond of the chalcogenide material at an interface of the projecting metal mass outer surfaces and diffuse at least some of the projecting metal mass outwardly into the chalcogenide material. In certain aspects, the above implementations are incorporated in methods of forming non-volatile resistance variable devices. In one implementation, a non-volatile resistance variable device in a highest resistance state for a given ambient temperature and pressure includes a resistance variable chalcogenide material having metal ions diffused therein. Opposing first and second electrodes are received operatively proximate the resistance variable chalcogenide material. At least one of the electrodes has a conductive projection extending into the resistance variable chalcogenide material.
摘要翻译：金属掺杂硫族化物材料的方法包括在衬底上形成金属。在金属上形成硫族化物材料。通过硫属化物材料对金属进行辐射，有效地在金属和硫族化物材料的界面处破坏硫族化物材料的硫族化物键，并将至少一些金属向外扩散到硫族化物材料中。金属掺杂硫族化物材料的方法包括用硫族化物材料包围突出的金属块的暴露的外表面。通过硫族化物材料将辐射照射到突出金属质量块上，有效地在突出的金属质量外表面的界面处破坏硫族化物材料的硫族化物键，并将至少一些突出的金属块向外扩散到硫族化物材料中。在某些方面，上述实施方式被并入形成非易失性电阻可变器件的方法中。在一个实施方案中，对于给定的环境温度和压力，最高电阻状态的非易失性电阻可变器件包括在其中扩散有金属离子的电阻变化硫属化物材料。反向的第一和第二电极在电阻可变硫属化物材料上可操作地接收。至少一个电极具有延伸到电阻可变硫族化物材料中的导电突起。

55. 发明授权

US06682979B2 Methods of forming transistors associated with semiconductor substrates 有权
标题翻译：形成与半导体衬底相关的晶体管的方法
公开(公告)号：US06682979B2
公开(公告)日：2004-01-27
申请号：US09951152
申请日：2001-09-12
申请人： John T. Moore
发明人： John T. Moore
IPC分类号： H01L218234
CPC分类号： H01L21/823462 , H01L21/3145 , H01L21/31612
摘要： The invention encompasses a method of forming an oxide region over a semiconductor substrate. A nitrogen-containing layer is formed across at least some of the substrate. After the nitrogen-containing layer is formed, an oxide region is grown from at least some of the substrate. The nitrogen of the nitrogen-containing layer is dispersed within the oxide region. The invention also encompasses a method of forming a pair of transistors associated with a semiconductor substrate. A substrate is provided. A first region of the substrate is defined, and additionally a second region of the substrate is defined. A first oxide region is formed which covers at least some of the first region of the substrate, and which does not cover any of the second region of the substrate. A nitrogen-comprising layer is formed across at least some of the first oxide region and across at least some of the second region of the substrate. After the nitrogen-comprising layer is formed, a second oxide region is grown from the second region of the substrate. A first transistor gate is formed over the first oxide region, and a second transistor gate is formed over the second oxide region.
摘要翻译：本发明包括在半导体衬底上形成氧化物区域的方法。在至少一些基底上形成含氮层。在形成含氮层之后，从衬底中的至少一些生长氧化物区域。含氮层的氮分散在氧化物区域内。本发明还包括形成与半导体衬底相关联的一对晶体管的方法。提供基板。限定衬底的第一区域，并且另外定义衬底的第二区域。形成第一氧化物区域，其覆盖衬底的第一区域中的至少一些，并且不覆盖衬底的任何第二区域。跨越第一氧化物区域中的至少一些并穿过衬底的至少一些第二区域形成含氮层。在形成含氮层之后，从衬底的第二区域生长第二氧化物区域。在第一氧化物区域上形成第一晶体管栅极，在第二氧化物区域上形成第二晶体管栅极。

56. 发明授权

US06677661B1 Semiconductive wafer assemblies 失效
标题翻译：半导体晶片组件
公开(公告)号：US06677661B1
公开(公告)日：2004-01-13
申请号：US09429220
申请日：1999-10-28
申请人： Scott Jeffrey DeBoer , John T. Moore , Mark Fischer , Randhir P. S. Thakur
发明人： Scott Jeffrey DeBoer , John T. Moore , Mark Fischer , Randhir P. S. Thakur
IPC分类号： H01L2358
CPC分类号： H01L21/28123 , H01L21/0276 , H01L21/31144 , H01L21/3185
摘要： In one aspect, the invention includes a semiconductor fabrication process, comprising: a) providing a substrate; b) forming a layer of silicon nitride over the substrate, the layer having a thickness; and c) enriching a portion of the thickness of the silicon nitride layer with silicon, the portion comprising less than or equal to about 95% of the thickness of the layer of silicon nitride. In another aspect, the invention includes a semiconductor fabrication process, comprising: a) providing a substrate; b) forming a layer of silicon nitride over the substrate, the layer having a thickness; and c) increasing a refractive index of a first portion of the thickness of the silicon nitride layer relative to a refractive index of a second portion of the silicon nitride layer, the first portion comprising less than or equal to about 95% of the thickness of the silicon nitride layer. In yet another aspect, the invention includes semiconductor wafer assembly, comprising: a) a semiconductor wafer substrate; and b) a layer of silicon nitride over the substrate, the layer comprising a thickness and two portions elevationally displaced relative to one another, a first of the two portions having less resistance than a second of the two portions, the first portion comprising less than or equal to about 95% of the thickness of the silicon nitride layer.
摘要翻译：一方面，本发明包括半导体制造工艺，其包括：a）提供衬底; b）在衬底上形成氮化硅层，该层具有厚度; 以及c）用硅富集氮化硅层的一部分厚度，该部分包含小于或等于氮化硅层厚度的约95％。在另一方面，本发明包括半导体制造工艺，其包括：a）提供衬底; b）在衬底上形成氮化硅层，该层具有厚度; 以及c）相对于所述氮化硅层的第二部分的折射率增加所述氮化硅层的厚度的第一部分的折射率，所述第一部分包括小于或等于所述氮化硅层的厚度的约95％氮化硅层。在另一方面，本发明包括半导体晶片组件，包括：a）半导体晶片衬底; 以及b）在所述衬底上的一层氮化硅，所述层包括相对于彼此高度位移的厚度和两个部分，所述两个部分中的第一部分具有比所述两个部分中的第二部分更小的电阻，所述第一部分包括小于或等于氮化硅层厚度的约95％。

57. 发明授权

US06670288B1 Methods of forming a layer of silicon nitride in a semiconductor fabrication process 失效
标题翻译：在半导体制造工艺中形成氮化硅层的方法
公开(公告)号：US06670288B1
公开(公告)日：2003-12-30
申请号：US09604850
申请日：2000-06-27
申请人： Scott Jeffrey DeBoer , John T. Moore , Mark Fischer , Randhir P. S. Thakur
发明人： Scott Jeffrey DeBoer , John T. Moore , Mark Fischer , Randhir P. S. Thakur
IPC分类号： H01L2131
CPC分类号： H01L21/28123 , H01L21/0276 , H01L21/31144 , H01L21/3185
摘要： In one aspect, the invention includes a semiconductor fabrication process, comprising: a) providing a substrate; b) forming a layer of silicon nitride over the substrate, the layer having a thickness; and c) enriching a portion of the thickness of the silicon nitride layer with silicon, the portion comprising less than or equal to about 95% of the thickness of the layer of silicon nitride. In another aspect, the invention includes a semiconductor fabrication process, comprising: a) providing a substrate; b) forming a layer of silicon nitride over the substrate, the layer having a thickness; and c) increasing a refractive index of a first portion of the thickness of the silicon nitride layer relative to a refractive index of a second portion of the silicon nitride layer, the first portion comprising less than or equal to about 95% of the thickness of the silicon nitride layer. In yet another aspect, the invention includes semiconductor wafer assembly, comprising: a) a semiconductor wafer substrate; and b) a layer of silicon nitride over the substrate, the layer comprising a thickness and two portions elevationally displaced relative to one another, a first of the two portions having less resistance than a second of the two portions, the first portion comprising less than or equal to about 95% of the thickness of the silicon nitride layer.
摘要翻译：一方面，本发明包括半导体制造工艺，其包括：a）提供衬底; b）在衬底上形成氮化硅层，该层具有厚度; 以及c）用硅富集氮化硅层的一部分厚度，该部分包含小于或等于氮化硅层厚度的约95％。在另一方面，本发明包括半导体制造工艺，其包括：a）提供衬底; b）在衬底上形成氮化硅层，该层具有厚度; 以及c）相对于所述氮化硅层的第二部分的折射率增加所述氮化硅层的厚度的第一部分的折射率，所述第一部分包括小于或等于所述氮化硅层的厚度的约95％氮化硅层。在另一方面，本发明包括半导体晶片组件，包括：a）半导体晶片衬底; 以及b）在所述衬底上的一层氮化硅，所述层包括相对于彼此高度位移的厚度和两个部分，所述两个部分中的第一部分具有比所述两个部分中的第二部分更小的电阻，所述第一部分包括小于或等于氮化硅层厚度的约95％。

58. 发明授权

US06660658B2 Transistor structures, methods of incorporating nitrogen into silicon-oxide-containing layers; and methods of forming transistors 有权
公开(公告)号：US06660658B2
公开(公告)日：2003-12-09
申请号：US10205235
申请日：2002-07-26
申请人： Gurtej S. Sandhu , John T. Moore , Neal R. Rueger
发明人： Gurtej S. Sandhu , John T. Moore , Neal R. Rueger
IPC分类号： H01L2131
CPC分类号： H01L21/02332 , H01L21/0234 , H01L21/265 , H01L21/28061 , H01L21/28167 , H01L21/28185 , H01L21/28202 , H01L21/3144 , H01L29/513 , H01L29/518 , H01L29/6659 , H01L29/7833
摘要： The invention encompasses a method of incorporating nitrogen into a silicon-oxide-containing layer. The silicon-oxide-containing layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer. The nitrogen is subsequently thermally annealed within the layer to bond at least some of the nitrogen to silicon within the layer. The invention also encompasses a method of forming a transistor. A gate oxide layer is formed over a semiconductive substrate. The gate oxide layer comprises silicon dioxide. The gate oxide layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer, and the layer is maintained at less than or equal to 400° C. during the exposing. Subsequently, the nitrogen within the layer is thermally annealed to bond at least a majority of the nitrogen to silicon. At least one conductive layer is formed over the gate oxide layer. Source/drain regions are formed within the semiconductive substrate, and are gatedly connected to one another by the at least one conductive layer. The invention also encompasses transistor structures.

59. 发明授权

US06653184B2 Method of forming transistors associated with semiconductor substrates comprising forming a nitrogen-comprising region across an oxide region of a transistor gate 有权
标题翻译：形成与半导体衬底相关的晶体管的方法包括在晶体管栅极的氧化物区域上形成含氮区域
公开(公告)号：US06653184B2
公开(公告)日：2003-11-25
申请号：US09951307
申请日：2001-09-12
申请人： John T. Moore
发明人： John T. Moore
IPC分类号： H01L218238
CPC分类号： H01L21/823462 , H01L21/3145 , H01L21/31612
摘要： The invention encompasses a method of forming an oxide region over a semiconductor substrate. A nitrogen-containing layer is formed across at least some of the substrate. After the nitrogen-containing layer is formed, an oxide region is grown from at least some of the substrate. The nitrogen of the nitrogen-containing layer is dispersed within the oxide region. The invention also encompasses a method of forming a pair of transistors associated with a semiconductor substrate. A substrate is provided. A first region of the substrate is defined, and additionally a second region of the substrate is defined. A first oxide region is formed which covers at least some of the first region of the substrate, and which does not cover any of the second region of the substrate. A nitrogen-comprising layer is formed across at least some of the first oxide region and across at least some of the second region of the substrate. After the nitrogen-comprising layer is formed, a second oxide region is grown from the second region of the substrate. A first transistor gate is formed over the first oxide region, and a second transistor gate is formed over the second oxide region.
摘要翻译：本发明包括在半导体衬底上形成氧化物区域的方法。在至少一些基底上形成含氮层。在形成含氮层之后，从衬底中的至少一些生长氧化物区域。含氮层的氮分散在氧化物区域内。本发明还包括形成与半导体衬底相关联的一对晶体管的方法。提供基板。限定衬底的第一区域，并且另外定义衬底的第二区域。形成第一氧化物区域，其覆盖衬底的第一区域中的至少一些，并且不覆盖衬底的任何第二区域。跨越第一氧化物区域中的至少一些并穿过衬底的至少一些第二区域形成含氮层。在形成含氮层之后，从衬底的第二区域生长第二氧化物区域。在第一氧化物区域上形成第一晶体管栅极，在第二氧化物区域上形成第二晶体管栅极。

60. 发明授权

US06638820B2 Method of forming chalcogenide comprising devices, method of precluding diffusion of a metal into adjacent chalcogenide material, and chalcogenide comprising devices 有权
标题翻译：形成硫族化物的方法，包括器件，排除金属扩散到相邻硫族化物材料中的方法，以及包括器件的硫族化物
公开(公告)号：US06638820B2
公开(公告)日：2003-10-28
申请号：US09779983
申请日：2001-02-08
申请人： John T. Moore
发明人： John T. Moore
IPC分类号： H01L218242
CPC分类号： H01L45/1658 , H01C17/075 , H01C17/288 , H01L27/24 , H01L29/685 , H01L45/085 , H01L45/1233 , H01L45/1253 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/1625 , H01L45/1675 , Y10S438/942 , Y10S438/953
摘要： A method of precluding diffusion of a metal into adjacent chalcogenide material upon exposure to a quanta of actinic energy capable of causing diffusion of the metal into the chalcogenide material includes forming an actinic energy blocking material layer over the metal to a thickness of no greater than 500 Angstroms and subsequently exposing the actinic energy blocking material layer to said quanta of actinic energy. In one implementation, an homogenous actinic energy blocking material layer is formed over the metal and subsequently exposed to said quanta of actinic energy. A method of forming a non-volatile resistance variable device includes providing conductive electrode material over chalcogenide material having metal ions diffused therein. An actinic energy blocking material layer is formed on the conductive electrode material, the actinic energy blocking material layer being effective to shield actinic energy from reaching an interface of the conductive electrode material and the actinic energy blocking material to substantially preclude diffusion of the conductive electrode material into the chalcogenide material upon exposure to said actinic energy. A dielectric layer is formed on the actinic energy blocking material layer. The conductive electrode material is formed into a first electrode. A second electrode is provided proximate the chalcogenide material having the metal diffused therein. Non-volatile resistance variable devices manufacture by these and other methods are contemplated.
摘要翻译：在暴露于能够使金属扩散到硫族化物材料中的光化能的量子时，排除金属扩散到相邻硫族化物材料中的方法包括在金属上形成光化能量阻挡材料层至厚度不大于500 然后将光化性能量阻挡材料层暴露于所述光化能量级。在一个实施方案中，在金属上形成均匀的光化能阻挡材料层，随后暴露于所述光化能量级。形成非易失性电阻可变器件的方法包括在其中扩散金属离子的硫族化物材料上提供导电电极材料。在导电电极材料上形成光化学能量阻挡材料层，光化学能量阻挡材料层有效地屏蔽光化能到达导电电极材料和光化能阻挡材料的界面，从而基本排除导电电极材料的扩散在暴露于所述光化能之后进入硫族化物材料。在光化能阻挡材料层上形成介电层。导电电极材料形成为第一电极。靠近硫属化物材料设置第二电极，其中金属在其中扩散。考虑通过这些和其他方法制造的非易失性电阻可变器件。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式