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51. 发明授权

US06287959B1 Deep submicron metallization using deep UV photoresist 失效
标题翻译：深亚微米金属化使用深紫外光致抗蚀剂
公开(公告)号：US06287959B1
公开(公告)日：2001-09-11
申请号：US09065352
申请日：1998-04-23
申请人： Christopher F. Lyons , Bhanwar Singh
发明人： Christopher F. Lyons , Bhanwar Singh
IPC分类号： H01L214763
CPC分类号： H01L21/0276 , H01L21/31116 , H01L21/3144 , H01L21/76802 , Y10S438/952 , Y10S438/97
摘要： Reflection of incident optical radiation from a highly reflective metal layer (12), such as aluminum, copper or titanium, into a photoresist layer (16) is reduced by interposing a layer of silicon oxynitride (14) between the metal and photoresist layers. The silicon oxynitride layer (14) is pre-treated with an oxidizing plasma to deplete surface nitrogen and condition the silicon oxynitride layer (14) to be more compatible with deep ultraviolet photoresists. The silicon oxynitride layer (14) further serves as an etch stop in the formation of interconnect openings (40), such as vias, contacts and trenches. The interconnect opening (40) is filled with a second metallization layer to achieve multi-layer electrical interconnection.
摘要翻译：通过在金属和光致抗蚀剂层之间插入一层氮氧化硅（14），将来自诸如铝，铜或钛的高反射金属层（12）的入射光辐射反射到光致抗蚀剂层（16）中。氮氧化硅层（14）用氧化等离子体进行预处理以消除表面氮，并且使氮氧化硅层（14）与深紫外光致抗蚀剂更相容。氧氮化硅层（14）还用作形成互连开口（40）的蚀刻停止层，例如通路，触点和沟槽。互连开口（40）填充有第二金属化层以实现多层电互连。

52. 发明授权

US06270929B1 Damascene T-gate using a relacs flow 有权
标题翻译：大马士革T门使用相关资料流
公开(公告)号：US06270929B1
公开(公告)日：2001-08-07
申请号：US09619789
申请日：2000-07-20
申请人： Christopher F. Lyons , Ramkumar Subramanian , Bhanwar Singh , Marina Plat
发明人： Christopher F. Lyons , Ramkumar Subramanian , Bhanwar Singh , Marina Plat
IPC分类号： H01L21302
CPC分类号： H01L21/28114 , H01L21/0273 , H01L21/0338 , H01L21/31144 , H01L21/76802 , H01L29/42376
摘要： A method for fabricating a T-gate structure is provided. A structure is provided that has a silicon layer having a gate oxide layer, a polysilicon layer over the gate oxide layer and an insulating layer over the gate oxide layer. A photoresist layer is formed over the insulating layer. An opening is the formed extending through the photoresist layer and partially into the insulating layer. The opening in the insulating layer extends from a top surface of the insulating layer to a first depth. The photoresist layer is swelled to reduce the size of the opening in the photoresist layer. The opening is then extended in the insulating layer from the first depth to a second depth. The opening is wider from the top surface of the insulating layer to the first depth than the opening is from the first depth to the second depth. The opening is then filled with a conductive material to form a T-gate structure.
摘要翻译：提供了一种制造T型栅结构的方法。提供一种结构，其具有硅层，该硅层具有栅极氧化物层，栅极氧化物层上的多晶硅层和栅极氧化物层上的绝缘层。在绝缘层上形成光致抗蚀剂层。开口形成为延伸穿过光致抗蚀剂层并部分地进入绝缘层。绝缘层中的开口从绝缘层的顶表面延伸到第一深度。光致抗蚀剂层被膨胀以减小光致抗蚀剂层中的开口的尺寸。然后将开口在绝缘层中从第一深度延伸到第二深度。开口从绝缘层的顶表面到比第一深度从第一深度到第二深度的第一深度更宽。然后用导电材料填充开口以形成T形栅结构。

53. 发明授权

US6156658A Ultra-thin resist and silicon/oxide hard mask for metal etch 有权
标题翻译：用于金属蚀刻的超薄抗蚀剂和硅/氧化物硬掩模
公开(公告)号：US6156658A
公开(公告)日：2000-12-05
申请号：US203774
申请日：1998-12-02
申请人： Fei Wang , Christopher F. Lyons , Khanh B. Nguyen , Scott A. Bell , Harry J. Levinson , Chih Yuh Yang
发明人： Fei Wang , Christopher F. Lyons , Khanh B. Nguyen , Scott A. Bell , Harry J. Levinson , Chih Yuh Yang
IPC分类号： H01L21/027 , H01L21/3213 , H01L21/44 , H01L21/302 , H01L21/461
CPC分类号： H01L21/32139 , H01L21/0274 , H01L21/32136
摘要： In one embodiment, the present invention relates to a method of forming a metal line, involving the steps of providing a semiconductor substrate comprising a metal layer, an oxide layer over the metal layer, and a silicon layer over the oxide layer; depositing an ultra-thin photoresist over the silicon layer, the ultra-thin photoresist having a thickness less than about 2,000 .ANG.; irradiating the ultra-thin photoresist with electromagnetic radiation having a wavelength of about 250 nm or less; developing the ultra-thin photoresist exposing a portion of the silicon layer; etching the exposed portion of the silicon layer exposing a portion of the oxide layer; etching the exposed portion of the oxide layer exposing a portion of the metal layer; and etching the exposed portion of the metal layer thereby forming the metal line.
摘要翻译：在一个实施例中，本发明涉及一种形成金属线的方法，包括以下步骤：提供包括金属层的半导体衬底，金属层上的氧化物层和氧化物层上的硅层; 在硅层上沉积超薄光致抗蚀剂，超薄光致抗蚀剂的厚度小于约2,000安培; 用波长约250nm或更小的电磁辐射照射超薄光致抗蚀剂; 开发暴露一部分硅层的超薄光刻胶; 蚀刻暴露出氧化物层的一部分的硅层的暴露部分; 蚀刻暴露出金属层的一部分的氧化物层的暴露部分; 并且蚀刻金属层的暴露部分从而形成金属线。

54. 发明授权

US06057206A Mark protection scheme with no masking 有权
标题翻译：标记保护方案，无掩蔽
公开(公告)号：US06057206A
公开(公告)日：2000-05-02
申请号：US410526
申请日：1999-10-01
申请人： Khanh B. Nguyen , Marina Plat , Christopher F. Lyons , Harry J. Levinson
发明人： Khanh B. Nguyen , Marina Plat , Christopher F. Lyons , Harry J. Levinson
IPC分类号： H01L23/544 , H01L21/76
CPC分类号： H01L23/544 , H01L2223/54426 , H01L2223/54453 , H01L2223/54493 , H01L2924/0002
摘要： A method of forming an alignment mark protection structure is disclosed and includes forming an alignment mark protection layer over a substrate which has an alignment mark associated therewith. The method also includes forming a negative photoresist layer over the alignment mark protection layer and removing a portion of the negative photoresist layer which does not overlie the alignment mark. The removal exposes a portion of the alignment mark protection layer which does not overlie the alignment mark and the exposed portion of the alignment mark protection layer is then removed. Preferably, the removal of a portion of the negative photoresist includes selectively exposing a peripheral portion thereof using an edge-bead removal tool, thereby allowing for the formation of an alignment mark protection structure without an extra masking step.
摘要翻译：公开了一种形成对准标记保护结构的方法，并且包括在具有与其相关联的对准标记的衬底上形成对准标记保护层。该方法还包括在对准标记保护层上形成负光致抗蚀剂层，并且去除不覆盖对准标记的负光致抗蚀剂层的一部分。去除暴露出不覆盖对准标记的对准标记保护层的一部分，然后去除对准标记保护层的暴露部分。优选地，去除负光致抗蚀剂的一部分包括使用边缘珠去除工具选择性地暴露其周边部分，从而允许形成对准标记保护结构而没有额外的掩模步骤。

55. 发明授权

US5821036A Method of developing positive photoresist and compositions therefor 失效
标题翻译：开发正性光致抗蚀剂及其组合物的方法
公开(公告)号：US5821036A
公开(公告)日：1998-10-13
申请号：US960105
申请日：1997-10-27
申请人： Stanley A. Ficner , John Magvas , Christopher F. Lyons , Wayne M. Moreau , Marina V. Plat
发明人： Stanley A. Ficner , John Magvas , Christopher F. Lyons , Wayne M. Moreau , Marina V. Plat
IPC分类号： G03F7/022 , G03F7/32 , G03F7/30
CPC分类号： G03F7/322
摘要： A method and composition for developing positive photoresists is illustrated. The developer of the present invention includes an ammonium hydroxide aqueous base and a surfactant of the fluorinated alkyl alkoxylate class most preferably present in an amount of from 10 to 30 ppm. A particularly preferred surfactant includes sulfonyl and amine moieties.
摘要翻译：示出了用于开发正性光致抗蚀剂的方法和组合物。本发明的显影剂包括氢氧化铵水性碱和氟化烷基烷氧基化物类的表面活性剂，最优选以10至30ppm的量存在。特别优选的表面活性剂包括磺酰基和胺部分。

56. 发明授权

US5227280A Resists with enhanced sensitivity and contrast 失效
标题翻译：抵抗增强灵敏度和对比度
公开(公告)号：US5227280A
公开(公告)日：1993-07-13
申请号：US754847
申请日：1991-09-04
申请人： James A. Jubinsky , Steven M. Katz , Christopher F. Lyons , Wayne M. Moreau
发明人： James A. Jubinsky , Steven M. Katz , Christopher F. Lyons , Wayne M. Moreau
IPC分类号： G03F7/004 , G03F7/037 , G03F7/039 , G03F7/09 , G03F7/26 , H01L21/027 , H01L21/30
CPC分类号： G03F7/0045 , G03F7/094
摘要： A PMGI bilayer resist for integrated circuit fabrication having increased sensitivity to light and formed by the addition of cyclic anhydrides to the resist and the formation of an accompanying bilayer resist structure of a portable conforming mask having a desirable undercut profile for lift-off of patterned metallic circuitry.
摘要翻译：用于集成电路制造的PMGI双层抗蚀剂具有增加的光的灵敏度并通过向抗蚀剂添加环状酸酐形成，并形成具有用于剥离图案化金属的期望的底切轮廓的便携式贴合掩模的伴随双层抗蚀剂结构电路。

57. 发明授权

US07608855B2 Polymer dielectrics for memory element array interconnect 有权
标题翻译：用于存储元件阵列互连的聚合物电介质
公开(公告)号：US07608855B2
公开(公告)日：2009-10-27
申请号：US10817467
申请日：2004-04-02
申请人： Christopher F. Lyons
发明人： Christopher F. Lyons
IPC分类号： H01L29/08 , H01L35/24 , H01L51/00
CPC分类号： G11C13/0014 , B82Y10/00 , G11C11/5664 , G11C13/0009 , G11C13/0016 , G11C13/0069 , G11C2013/009 , G11C2213/71 , G11C2213/77 , H01L27/285 , H01L51/0034 , H01L51/0035 , H01L51/0036 , H01L51/0041 , H01L51/0042 , H01L51/0078 , H01L51/0094 , H01L51/0583 , H01L2924/0002 , H01L2924/00
摘要： Disclosed are semiconductor devices containing a polymer dielectric and at least one active device containing an organic semiconductor material and a passive layer. Also disclosed are semiconductor devices further containing a conductive polymer. Such devices are characterized by light weight and robust reliability.
摘要翻译：公开了包含聚合物电介质的半导体器件和包含有机半导体材料和无源层的至少一个有源器件。还公开了还包含导电聚合物的半导体器件。这样的装置的特征在于重量轻和鲁棒的可靠性。

58. 发明授权

US07268066B2 Method for semiconductor gate line dimension reduction 有权
标题翻译：半导体栅极线尺寸减小的方法
公开(公告)号：US07268066B2
公开(公告)日：2007-09-11
申请号：US10922093
申请日：2004-08-19
申请人： Douglas J. Bonser , Marina V. Plat , Chih Yuh Yang , Scott A. Bell , Srikanteswara Dakshina-Murthy , Philip A. Fisher , Christopher F. Lyons
发明人： Douglas J. Bonser , Marina V. Plat , Chih Yuh Yang , Scott A. Bell , Srikanteswara Dakshina-Murthy , Philip A. Fisher , Christopher F. Lyons
IPC分类号： H01L21/4763
CPC分类号： H01L29/66477 , H01L21/28123 , H01L29/1045 , H01L29/1054 , H01L29/665
摘要： To reduce the width of a MOSFET gate, the gate is formed with a hardmask formed thereupon. An isotropic etch is then performed to trim the gate in order to reduce the width of the gate. The resulting gate may be formed with a width that is narrower than a minimum width achievable solely through conventional projection lithography techniques.
摘要翻译：为了减小MOSFET栅极的宽度，栅极形成有在其上形成的硬掩模。然后执行各向同性蚀刻以修剪栅极，以便减小栅极的宽度。所形成的栅极可以形成为比仅通过常规投影光刻技术可实现的最小宽度窄的宽度。

59. 发明授权

US07125652B2 Immersion lithographic process using a conforming immersion medium 失效
标题翻译：浸渍光刻工艺使用一致的浸渍介质
公开(公告)号：US07125652B2
公开(公告)日：2006-10-24
申请号：US10726413
申请日：2003-12-03
申请人： Christopher F. Lyons , Carl P. Babcock , Jongwook Kye
发明人： Christopher F. Lyons , Carl P. Babcock , Jongwook Kye
IPC分类号： G03F7/20
CPC分类号： G03F7/70341
摘要： A method of making a device using a lithographic system having a lens from which an exposure pattern is emitted. A conforming immersion medium can be positioned between a photo resist layer and the lens. The photo resist layer, which can be disposed over a wafer, and the lens can be brought into intimate contact with the conforming immersion medium. The photo resist can then be exposed with the exposure pattern so that the exposure pattern traverses the conforming immersion medium.
摘要翻译：一种制造使用具有透镜的光刻系统的装置的方法，曝光图案从该透镜发射。适配浸没介质可以位于光致抗蚀剂层和透镜之间。可以设置在晶片上的光致抗蚀剂层，并且透镜可以与合适的浸渍介质紧密接触。然后可以用曝光图案曝光光致抗蚀剂，使得曝光图案穿过合适的浸渍介质。

60. 发明授权

US07056804B1 Shallow trench isolation polish stop layer for reduced topography 失效
标题翻译：浅沟隔离抛光停止层减少地形
公开(公告)号：US07056804B1
公开(公告)日：2006-06-06
申请号：US10790366
申请日：2004-03-01
申请人： Christopher F. Lyons , Ramkumar Subramanian
发明人： Christopher F. Lyons , Ramkumar Subramanian
IPC分类号： H01L21/76
CPC分类号： H01L21/76224
摘要： A method of making and shallow trench isolation feature including 1) providing a semiconductor substrate, 2) forming a polish stop layer over the semiconductor substrate, 3) forming a nitride containing layer over the polish stop layer, 4) forming a shallow trench layer through a portion of the nitride containing layer, a portion of the polish stop layer and a portion of the semiconductor substrate, 5) removing the nitride containing layer by a chemical mechanical polishing process, and 6) planarizing the shallow trench layer and the polish stop layer until a surface of the shallow trench layer and a surface of the polish stop layer are co-planar.
摘要翻译：一种制造和浅沟槽隔离特征的方法，包括1）提供半导体衬底，2）在半导体衬底上形成抛光停止层，3）在抛光停止层上形成含氮化物层，4）形成浅沟槽层，含氮化物层的一部分，抛光停止层的一部分和半导体衬底的一部分，5）通过化学机械抛光工艺除去含氮化物层，以及6）使浅沟槽层和抛光停止层平坦化直到浅沟槽层的表面和抛光停止层的表面是共面的。

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