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51. 发明授权

US07952442B2 Integrated circuit package having inductance loop formed from same-pin-to-same-bonding-pad structure 有权
标题翻译：集成电路封装，具有由相同引脚到同一焊盘结构形成的电感环路
公开(公告)号：US07952442B2
公开(公告)日：2011-05-31
申请号：US11274825
申请日：2005-11-16
申请人： Yido Koo , Hyungki Huh , Kang Yoon Lee , Jeong-Woo Lee , Joonbae Park , Kyeongho Lee
发明人： Yido Koo , Hyungki Huh , Kang Yoon Lee , Jeong-Woo Lee , Joonbae Park , Kyeongho Lee
IPC分类号： H03B5/12
CPC分类号： H01L23/645 , H01L24/48 , H01L24/49 , H01L2224/48091 , H01L2224/48247 , H01L2224/49111 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01023 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30107 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： An integrated circuit package includes an inductance loop formed from a connection of bonding wires and one or more input/output (I/O) package pins. In one embodiment, the inductance loop is formed from a first wire which connects a bonding pad on the integrated circuit chip to an I/O pin of the package and a second wire which connects the same bonding pad to the same pin. By forming the inductor loop within the limits of the integrated circuit package, a substantial reduction in space requirements is realized, which, in turn, promotes miniaturization.
摘要翻译：集成电路封装包括由接合线和一个或多个输入/输出（I / O）封装引脚的连接形成的电感环路。在一个实施例中，电感环由将集成电路芯片上的焊盘连接到封装的I / O引脚的第一布线和将相同的焊盘连接到同一引脚的第二布线形成。通过在集成电路封装的极限内形成电感器回路，实现了空间要求的显着降低，这反过来促进了小型化。

52. 发明申请

US20100237294A1 Conductive polymer compound and organic photoelectric device including same 有权
标题翻译：导电性高分子化合物及包括其的有机光电装置
公开(公告)号：US20100237294A1
公开(公告)日：2010-09-23
申请号：US12801263
申请日：2010-06-01
申请人： Jeong-Woo Lee , Dal-Ho Huh , Mi-Young Chae , Tae-Woo Lee , Eui-Su Kang
发明人： Jeong-Woo Lee , Dal-Ho Huh , Mi-Young Chae , Tae-Woo Lee , Eui-Su Kang
IPC分类号： H01B1/12 , C08F112/00
CPC分类号： C08L27/18 , C08L25/18 , C08L53/00 , C08L2205/03 , C09D125/18 , C09D127/18 , H01B1/127 , H01L51/0021 , H01L51/0037 , H01L51/5088 , H01L51/5092 , H01L51/5203 , C08L2666/04
摘要： A conductive polymer compound includes: a conductive polymer; a first repeating unit represented by the following Chemical Formula 1; a second repeating unit represented by the following Chemical Formula 2; and a third repeating unit represented by the following Chemical Formula 3 and/or Chemical Formula 4,
摘要翻译：导电聚合物化合物包括：导电聚合物; 由以下化学式1表示的第一重复单元; 由以下化学式2表示的第二重复单元; 和由以下化学式3和/或化学式4表示的第三重复单元，

53. 发明授权

US07760583B2 Apparatus for controlling column selecting signal for semiconductor memory apparatus and method of controlling the same 失效
标题翻译：用于控制半导体存储装置的列选择信号的装置及其控制方法
公开(公告)号：US07760583B2
公开(公告)日：2010-07-20
申请号：US12400969
申请日：2009-03-10
申请人： Jeong-Woo Lee
发明人： Jeong-Woo Lee
IPC分类号： G11C8/00
CPC分类号： G11C7/12
摘要： An apparatus for controlling a column selecting signal of semiconductor memory apparatus comprising a column decoder that outputs a first column selecting signal, a signal control unit that outputs a second column selecting signal that is generated by controlling an enable period of the first column selecting signal, and an output control unit that outputs the first column selecting signal or the second column selecting signal in response to the input of a predetermined voltage detecting signal.
摘要翻译：一种用于控制半导体存储装置的列选择信号的装置，包括：输出第一列选择信号的列解码器;输出通过控制第一列选择信号的使能周期产生的第二列选择信号的信号控制单元，以及输出控制单元，其响应于预定电压检测信号的输入而输出第一列选择信号或第二列选择信号。

54. 发明授权

US07715259B2 Word line driving circuit and method of testing a word line using the word line driving circuit 失效
标题翻译：字线驱动电路和使用字线驱动电路测试字线的方法
公开(公告)号：US07715259B2
公开(公告)日：2010-05-11
申请号：US12181896
申请日：2008-07-29
申请人： Jeong-Woo Lee , Hyung-Wook Moon , Won-Jun Choi
发明人： Jeong-Woo Lee , Hyung-Wook Moon , Won-Jun Choi
IPC分类号： G11C29/00
CPC分类号： G11C8/08 , G11C29/02 , G11C29/025 , G11C2029/1202
摘要： A method of testing a word line using a word line driving circuit comprising; activating a word line by activating a word line driving signal; floating the word line by activating a test mode signal after the activating of the word line; recording data having a predetermined logic value into a memory cell by inputting a write command while the word line is floated; and reading out data from the memory cell by inputting a read command after the recording of data.
摘要翻译：一种使用字线驱动电路测试字线的方法，包括：通过激活字线驱动信号激活字线; 在字线激活之后激活测试模式信号来浮动字线; 通过在字线浮动的同时输入写命令将具有预定逻辑值的数据记录到存储单元中; 并且通过在记录数据之后输入读取命令从存储器单元读出数据。

55. 发明申请

US20080311333A1 Silicone Release Compositions with Controlled Peeling Force and Silicone Release Coating Films Coated with the Same 审中-公开
标题翻译：具有受控剥离力的硅酮释放组合物和涂覆其的硅酮剥离涂膜
公开(公告)号：US20080311333A1
公开(公告)日：2008-12-18
申请号：US12096277
申请日：2006-11-20
申请人： Jong-Uk Yoon , Jeong-Woo Lee , Moon-Bok Lee , Sang-Pil Kim
发明人： Jong-Uk Yoon , Jeong-Woo Lee , Moon-Bok Lee , Sang-Pil Kim
IPC分类号： B32B33/00 , C08L83/06
CPC分类号： C09D5/20 , C08G77/12 , C08G77/20 , C08G77/70 , C08L83/04 , C09D183/04 , Y10T428/1476 , C08L83/00
摘要： The invention pertains to a silicone release composition of which the peeling force can be controlled and also a silicone release film coated with the composition. With the inventive composition and the release film coated with the composition, it is possible to obtain a reproducible peeling force with a given value, and also possible to produce a uniformly coated release film without discharged harmful solvent. The silicone release film produced as such can have controlled peeling force with a stable peeling force characteristic compatible with viscous agent. To this end, the invention is characterized in that the silicone release composition of which the peeling force can be controlled according to the invention is a silicone water-dispersed release coating composition, contains organopolysiloxane, organopolysiloxane resin, organo hydrogen polysiloxane and platinum chelate catalyst, and meets the following math figure for peeling force: Peeling Force=a X+b, where a=61.62±3.98, and b=16.43±3.01, X=the content(%) of organopolysiloxane resin in the release coating composition.
摘要翻译：本发明涉及可以控制剥离力的有机硅剥离组合物，以及涂覆有组合物的硅氧烷剥离膜。利用本发明的组合物和涂布有组合物的剥离膜，可以获得具有给定值的可再现的剥离力，并且还可以生产均匀涂布的脱模膜而不排出有害溶剂。这样制造的有机硅剥离膜可以具有受控的剥离力，具有与粘性剂相容的稳定的剥离力特性。为此，本发明的特征在于根据本发明可以控制剥离力的有机硅剥离组合物是硅氧烷水分散剥离涂料组合物，其包含有机聚硅氧烷，有机聚硅氧烷树脂，有机氢聚硅氧烷和铂螯合催化剂，并符合以下剥离力数学：剥离力= a X + b，其中a = 61.62±3.98，b = 16.43±3.01，X =剥离涂料组合物中有机聚硅氧烷树脂的含量（％）。

56. 发明授权

US07202741B2 Highly linear variable gain amplifier 有权
标题翻译：高线性可变增益放大器
公开(公告)号：US07202741B2
公开(公告)日：2007-04-10
申请号：US11066546
申请日：2005-02-28
申请人： Joonbae Park , Seung-Wook Lee , Jeong-Woo Lee , Kyeongho Lee
发明人： Joonbae Park , Seung-Wook Lee , Jeong-Woo Lee , Kyeongho Lee
IPC分类号： H03F3/45
CPC分类号： H03F3/211 , H03F3/45475 , H03F3/45659 , H03F2203/45136 , H03F2203/45138 , H03F2203/45166 , H03F2203/45168 , H03F2203/45434 , H03F2203/45522 , H03F2203/45591
摘要： A variable-gain amplifier circuit uses a pair of single-ended operational amplifiers to amplify complementary portions of a differential input signal. By using two single-ended amplifiers instead of a single differential amplifier, linearity is significantly improved. In addition, common mode feedback circuitry is eliminated along with harmonic distortion and other forms of noise which tend to negative affect the quality of the signal output from the circuit.
摘要翻译：可变增益放大器电路使用一对单端运算放大器来放大差分输入信号的互补部分。通过使用两个单端放大器而不是单个差分放大器，线性度显着提高。此外，消除共模反馈电路以及谐波失真和其他形式的噪声，这些噪声倾向于负面影响从电路输出的信号的质量。

57. 发明申请

US20060081973A1 Integrated circuit package having inductance loop formed from same-pin-to-same-bonding-pad structure 有权
标题翻译：集成电路封装，具有由相同引脚到同一焊盘结构形成的电感环路
公开(公告)号：US20060081973A1
公开(公告)日：2006-04-20
申请号：US11274825
申请日：2005-11-16
申请人： Yido Koo , Hyungki Huh , Kang Lee , Jeong-Woo Lee , Joonbae Park , Kyeongho Lee
发明人： Yido Koo , Hyungki Huh , Kang Lee , Jeong-Woo Lee , Joonbae Park , Kyeongho Lee
IPC分类号： H01L23/52
CPC分类号： H01L23/645 , H01L24/48 , H01L24/49 , H01L2224/48091 , H01L2224/48247 , H01L2224/49111 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01023 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30107 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： An integrated circuit package includes an inductance loop formed from a connection of bonding wires and one or more input/output (I/O) package pins. In one embodiment, the inductance loop is formed from a first wire which connects a bonding pad on the integrated circuit chip to an I/O pin of the package and a second wire which connects the same bonding pad to the same pin. By forming the inductor loop within the limits of the integrated circuit package, a substantial reduction in space requirements is realized, which, in turn, promotes miniaturization.
摘要翻译：集成电路封装包括由接合线和一个或多个输入/输出（I / O）封装引脚的连接形成的电感环路。在一个实施例中，电感环由将集成电路芯片上的焊盘连接到封装的I / O引脚的第一布线和将相同的焊盘连接到同一引脚的第二布线形成。通过在集成电路封装的极限内形成电感器回路，实现了空间要求的显着降低，这反过来促进了小型化。

58. 发明申请

US20060001489A1 Highly linear variable gain amplifier 有权
标题翻译：高线性可变增益放大器
公开(公告)号：US20060001489A1
公开(公告)日：2006-01-05
申请号：US11066546
申请日：2005-02-28
申请人： Joonbae Park , Seung-Wook Lee , Jeong-Woo Lee , Kyeongho Lee
发明人： Joonbae Park , Seung-Wook Lee , Jeong-Woo Lee , Kyeongho Lee
IPC分类号： H03F3/45
CPC分类号： H03F3/211 , H03F3/45475 , H03F3/45659 , H03F2203/45136 , H03F2203/45138 , H03F2203/45166 , H03F2203/45168 , H03F2203/45434 , H03F2203/45522 , H03F2203/45591
摘要： A variable-gain amplifier circuit uses a pair of single-ended operational amplifiers to amplify complementary portions of a differential input signal. By using two single-ended amplifiers instead of a single differential amplifier, linearity is significantly improved. In addition, common mode feedback circuitry is eliminated along with harmonic distortion and other forms of noise which tend to negative affect the quality of the signal output from the circuit.
摘要翻译：可变增益放大器电路使用一对单端运算放大器来放大差分输入信号的互补部分。通过使用两个单端放大器而不是单个差分放大器，线性度显着提高。此外，消除共模反馈电路以及谐波失真和其他形式的噪声，这些噪声倾向于负面影响从电路输出的信号的质量。

59. 发明申请

US20050048928A1 System and method for filtering signals in a transceiver 有权
标题翻译：用于对收发器中的信号进行滤波的系统和方法
公开(公告)号：US20050048928A1
公开(公告)日：2005-03-03
申请号：US10927013
申请日：2004-08-27
申请人： Young-Deuk Jeon , Seung-Wook Lee , Jeong-Woo Lee , Joonbae Park , Kyeongho Lee
发明人： Young-Deuk Jeon , Seung-Wook Lee , Jeong-Woo Lee , Joonbae Park , Kyeongho Lee
IPC分类号： H04B1/38
CPC分类号： H04B1/1027 , H03H11/1252 , H03H11/1291 , H03J1/0008 , H04B1/44
摘要： A system and method for filtering signals in a communications system reduces hardware and chip size requirements by selectively connecting a filter along transmitter and receiver paths of a transceiver. In operation, a controller generated signals for connecting the filter along the transmitter path when the transceiver is in transmitter mode and for connecting the filter along the receiver path when the transmitter is in receiver mode. The controller then generates additional signals for setting one or more parameters of the filter based on the path connected, or put differently based on the operational mode of the transceiver. In a variation, the controller sets the parameters of additional elements coupled to the filter as a way of further controlling processing of the transmitter and receiver signals. The system and method are particularly well suited to controlling the filtering of signals at the front-end of the transceiver having a direct-conversion architecture and in general ones performing time-multiplexing applications.
摘要翻译：用于对通信系统中的信号进行滤波的系统和方法通过沿收发器的发射机和接收机路径选择性地连接滤波器来降低硬件和芯片尺寸的要求。在操作中，当收发器处于发射机模式时，控制器产生用于沿着发射机路径连接滤波器的信号，并且当发射机处于接收机模式时，控制器沿着接收机路径连接滤波器。然后，控制器产生附加信号，用于基于连接的路径设置滤波器的一个或多个参数，或者基于收发器的操作模式进行不同的设置。在一个变型中，控制器设置耦合到滤波器的附加元件的参数作为进一步控制发射机和接收机信号的处理的一种方式。该系统和方法特别适用于控制在具有直接转换架构的收发器的前端处的信号的滤波，并且通常执行时间复用应用。

60. 发明申请

US20050045988A1 Integrated circuit package having inductance loop formed from a bridge interconnect 有权
标题翻译：集成电路封装，其具有由桥互连形成的电感环路
公开(公告)号：US20050045988A1
公开(公告)日：2005-03-03
申请号：US10927152
申请日：2004-08-27
申请人： Yido Koo , Hyungki Huh , Kang Yoon Lee , Jeong-Woo Lee , Joonbae Park , Kyeongho Lee
发明人： Yido Koo , Hyungki Huh , Kang Yoon Lee , Jeong-Woo Lee , Joonbae Park , Kyeongho Lee
IPC分类号： H01L20060101 , H01L23/64 , H01L29/00 , H03B5/12
CPC分类号： H01L23/642 , H01L23/645 , H01L24/48 , H01L24/49 , H01L2223/6611 , H01L2224/48091 , H01L2224/48247 , H01L2224/49113 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15192 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H03B5/1215 , H03B5/1228 , H03B5/1265 , H01L2224/45099 , H01L2224/05599
摘要： An integrated circuit package includes an inductance loop formed from a connection of lead wires and one or more input/output (I/O) package pins. In one embodiment, the inductance loop is formed from a first wire which connects a first bonding pad on the integrated circuit chip to a first I/O pin of the package and a second wire which connects a second bonding pad on the chip to a second I/O pin of the package. To complete the inductor loop, the first and second I/O pins are connected by a conductive bridge between the pins. The bridge may be formed by making the I/O pins have a unitary construction. In another embodiment, the bridge is formed by a metallization layer located either on the surface of the package substrate or within this substrate. The I/O pins are preferably ones which are adjacent one another; however, the loop may be formed from non-adjacent connections of I/O pins based, for example, on loop-length requirements, space considerations, and/or other design or functional factors. By forming the inductor loop within the limits of the integrated circuit package, a substantial reduction in space requirements is realized, which, in turn, promotes miniaturization. Also, the integrated circuit may be implemented in any one of a variety of systems, at least one parameter of which is controlled by the length of the inductor loop of the package.
摘要翻译：集成电路封装包括由引线和一个或多个输入/输出（I / O）封装引脚的连接形成的电感回路。在一个实施例中，电感回路由将集成电路芯片上的第一接合焊盘连接到封装的第一I / O引脚的第一引线和将芯片上的第二接合焊盘连接到第二引线的第二引线形成封装的I / O引脚。为了完成电感环路，第一和第二I / O引脚通过引脚之间的导电桥连接。可以通过使I / O引脚具有单一结构来形成桥。在另一个实施例中，桥由位于封装衬底的表面上或在该衬底内的金属化层形成。 I / O引脚优选为彼此相邻的引脚; 然而，环路可以基于例如环路长度要求，空间考虑和/或其他设计或功能因素的I / O引脚的不相邻连接形成。通过在集成电路封装的极限内形成电感器回路，实现了空间要求的显着降低，这反过来促进了小型化。此外，集成电路可以在各种系统中的任何一个中实现，其中的至少一个参数由封装的电感器环的长度来控制。

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