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    • 51. 发明授权
    • Frame synchronizer and a signal switching apparatus
    • 帧同步器和信号切换装置
    • US5495293A
    • 1996-02-27
    • US305264
    • 1994-09-13
    • Masayuki Ishida
    • Masayuki Ishida
    • H04B3/04H04N5/073H04N7/01H04N7/015
    • H04N7/0122H04N5/0736H04N7/007H04N7/01Y10S348/913
    • An external color frame is synchronized with a local color frame without producing a pixel position error. A frame synchronizer synchronizes a frame from an external television signal with that of a local television signal. A wide screen oriented high definition television signal is used as the external television signal, the image quality of which is improved by adding a support signal to the main screen signal. A memory is provided to receive and store the external television signal and the external signal is read from the memory after a predetermined time passes when the frame difference between the external and local television signals is at least one frame. In this instance, only the support signal in the readout of the external television signal is corrected by a low pass filter in order to match the pixel position of the support signal to that of the main screen signal.
    • 外部颜色框架与局部颜色框架同步而不产生像素位置误差。 帧同步器将来自外部电视信号的帧与本地电视信号的帧同步。 使用宽屏幕高清晰度电视信号作为外部电视信号,通过向主屏幕信号添加支持信号来提高图像质量。 提供存储器以接收和存储外部电视信号,并且当外部和本地电视信号之间的帧差异至少为一帧时,在预定时间过去之后,从存储器读取外部信号。 在这种情况下,仅通过低通滤波器来校正外部电视信号的读出中的支持信号,以便将支持信号的像素位置与主屏幕信号的像素位置相匹配。
    • 52. 发明授权
    • Magnetic recorder/reproducer
    • 磁记录器/再现器
    • US5353290A
    • 1994-10-04
    • US83780
    • 1993-06-30
    • Kazuhito EndoMasayuki IshidaYoshinobu Ishida
    • Kazuhito EndoMasayuki IshidaYoshinobu Ishida
    • G11B20/10G11B20/18G11B5/09
    • G11B20/1876G11B20/10527G11B20/1809
    • A magnetic recorder/reproducer converts two-channel analog signals into digital signals by a sample-and-hold/A-D converter circuit (3) and controls addresses in a memory circuit (4) by a memory address control circuit (5), to distribute the digital signals into odd sample groups and even sample groups per each channel for arraying the odd sample groups and the even sample groups of the same channel in alternate scanning intervals, thereby to write the same in the memory circuit so that the odd samples and the even samples of the same channel are arrayed in positions separated from each other along the direction of scanning by rotary heads (10, 11). The digital signals thus permutated are modulated by a modulation circuit (7), to be recorded in a magnetic tape by the rotary heads. The digital signals reproduced by the rotary heads are demodulated by a demodulation circuit (14), to be stored in a memory circuit (15). A memory address control circuit (16) controls addresses so as to permutate samples of the reproduced digital signals stored in the memory circuit to be in the original array thereof. The reproduced digital signals read from the memory circuit are converted into analog signals by a D-A converter (18), to be outputted through a low-pass filter (19).
    • 磁记录器/再现器通过采样保持/ AD转换器电路(3)将双通道模拟信号转换为数字信号,并通过存储器地址控制电路(5)控制存储器电路(4)中的地址,以分布 每个通道将数字信号转换成奇数采样组和均匀采样组,用于以交替的扫描间隔排列相同通道的奇数采样组和偶采样组,从而将其写入存储电路,以使奇数采样和 相同通道的均匀样品被排列在沿着旋转头(10,11)的扫描方向彼此分开的位置。 这样排列的数字信号由调制电路(7)调制,由旋转磁头记录在磁带中。 由旋转磁头重放的数字信号由解调电路(14)进行解调,存储在存储电路(15)中。 存储器地址控制电路(16)控制地址,以便将存储在存储器电路中的再现的数字信号的采样置换成其原始阵列。 从存储电路读出的再现的数字信号由D-A转换器(18)转换为模拟信号,通过低通滤波器(19)输出。
    • 56. 发明授权
    • Magnetic recorder/reproducer
    • 磁记录器/复印机
    • US5233480A
    • 1993-08-03
    • US941012
    • 1992-09-04
    • Kazuhito EndoMasayuki IshidaYoshinobu Ishida
    • Kazuhito EndoMasayuki IshidaYoshinobu Ishida
    • G11B20/10G11B20/18
    • G11B20/10527G11B20/1809G11B20/1876
    • A magnetic recorder/reproducer converts two-channel analog signals into digital signals by a sample-and-hold/A-D converter circuit (3) and controls addresses in a memory circuit (4) by a memory address control circuit (5), to distribute the digital signals into odd sample groups and even sample groups per each channel for arraying the odd sample groups and the even sample groups of the same channel in alternate scanning intervals, thereby to write the same in the memory circuit so that the odd samples and the even samples of the same channel are arrayed in positions separated from each other along the direction of scanning by rotary heads (10, 11). The digital signals thus permutated are modulated by a modulation circuit (7), to be recorded in a magnetic tape by the rotary heads. The digital signals reproduced by the rotary heads are demodulated by a demodulation circuit (14), to be stored in a memory circuit (15). A memory address control circuit (16) controls addresses so as to permutate samples of the reproduced digital signals stored in the memory circuit to be in the original array thereof. The reproduced digital signals read from the memory circuit are converted into analog signals by a D-A converter (18), to be outputted through a low-pass filter (19).
    • 磁记录器/再现器通过采样保持/ AD转换器电路(3)将双通道模拟信号转换为数字信号,并通过存储器地址控制电路(5)控制存储器电路(4)中的地址,以分布 每个通道将数字信号转换成奇数采样组和均匀采样组,用于以交替扫描间隔排列相同通道的奇数采样组和偶采样组,从而将其写入存储电路,使奇数采样和 相同通道的均匀样品被排列在沿着旋转头(10,11)的扫描方向彼此分开的位置。 这样排列的数字信号由调制电路(7)调制,由旋转磁头记录在磁带中。 由旋转磁头重放的数字信号由解调电路(14)进行解调,存储在存储电路(15)中。 存储器地址控制电路(16)控制地址,以便将存储在存储器电路中的再现的数字信号的采样置换成其原始阵列。 从存储电路读出的再现的数字信号由D-A转换器(18)转换为模拟信号,通过低通滤波器(19)输出。
    • 57. 发明授权
    • Magnetic recorder/reproducer
    • 磁记录器/再现器
    • US5146370A
    • 1992-09-08
    • US732020
    • 1991-07-18
    • Kazuhito EndoMasayuki IshidaYoshinobu Ishida
    • Kazuhito EndoMasayuki IshidaYoshinobu Ishida
    • G11B20/10G11B20/18
    • G11B20/1876G11B20/10527G11B20/1809
    • A magnetic recorder/reproducer converts two-channel analog signals into digital signals by a sample-and-hold/A-D converter circuit (3) and controls addresses in a memory circuit (4) by a memory address control circuit (5), to distribute the digital signals into odd sample groups and even sample groups per each channel for arraying the odd sample groups and the even sample groups of the same channel in alternate scanning intervals, thereby to write the same in the memory circuit so that the odd samples and the even samples of the same channel are arrayed in positions separated from each other along the direction of scanning by rotary heads (10, 11). The digital signals thus permutated are modulated by a modulation circuit (7), to be recorded in a magnetic tape by the rotary heads. The digital signals reproduced by the rotary heads are demodulated by a demodulation circuit (14), to be stored in a memory circuit (15). A memory address control circuit (16) controls addresses so as to permutate samples of the reproduced digital signals stored in the memory circuit to be in the original array thereof. The reproduced digital signals read from the memory circuit are converted into analog signals by a D-A converter (18), to be outputted through a low-pass filter (19).
    • 磁记录器/再现器通过采样保持/ AD转换器电路(3)将双通道模拟信号转换为数字信号,并通过存储器地址控制电路(5)控制存储器电路(4)中的地址,以分布 每个通道将数字信号转换成奇数采样组和均匀采样组,用于以交替扫描间隔排列相同通道的奇数采样组和偶采样组,从而将其写入存储电路,使奇数采样和 相同通道的均匀样品被排列在沿着旋转头(10,11)的扫描方向彼此分开的位置。 这样排列的数字信号由调制电路(7)调制,由旋转磁头记录在磁带中。 由旋转磁头重放的数字信号由解调电路(14)进行解调,存储在存储电路(15)中。 存储器地址控制电路(16)控制地址,以便将存储在存储器电路中的再现的数字信号的采样置换成其原始阵列。 从存储电路读出的再现的数字信号由D-A转换器(18)转换为模拟信号,通过低通滤波器(19)输出。
    • 58. 发明授权
    • Magnetic recorder/reproducer
    • 磁记录器/再现器
    • US4905100A
    • 1990-02-27
    • US214275
    • 1988-06-30
    • Kazuhito EndoMasayuki IshidaYoshinobu Ishida
    • Kazuhito EndoMasayuki IshidaYoshinobu Ishida
    • G11B20/10G11B20/18
    • G11B20/1876G11B20/10527G11B20/1809
    • A magnetic recorder/reproducer converts two-channel analog signals into digital signals by a sample-and-hold/A-D converter circuit (3) and controls addresses in a memory circuit (4) by a memory address control circuit (5), to distribute the digital signals into odd sample groups and even sample groups per each channel for arraying the odd sample groups and the even sample groups of the same channel in alternate scanning intervals, thereby to write the same in the memory circuit so that the odd samples and the even samples of the same channel are arrayed in positions separated from each other along the direction of scanning by rotary heads (10, 11). The digital signals thus permutated are modulated by a modulation circuit (7), to be recorded in a magnetic tape by the rotary heads. The digital signals reproduced by the rotary heads are demodulated by a demodulation circuit (14), to be stored in a memory circuit (15). A memory address control circuit (16) controls addresses so as to permutate samples of the reproduced digital signals stored in the memory circuit to be in the original array thereof. The reproduced digital signals read from the memory circuit are converted into analog signals by a D-A converter (18), to be outputted through a low-pass filter (19).
    • 59. 发明授权
    • Error correcting and controlling system
    • 错误纠正和控制系统
    • US4604747A
    • 1986-08-05
    • US609854
    • 1984-05-14
    • Ken OnishiMasayuki IshidaMasakazu ShirozuToshikatsu TakedomiMakoto NamekawaYukihiko Haikawa
    • Ken OnishiMasayuki IshidaMasakazu ShirozuToshikatsu TakedomiMakoto NamekawaYukihiko Haikawa
    • G11B20/18G06F11/10
    • G11B20/1809G11B20/1876
    • An error correcting and controlling system forms syndromes S.sub.1 and S.sub.2 for each of a set of reproduced, sampled signal words and error correcting words P or Q and also forms a syndrome S.sub.i =S.sub.1 .sym.T.sup.i-7 S.sub.2 by using the result of a CRC check of the set of sampled signal words. An error position i is determined by three zero counters which respectively indicate S.sub.1 .noteq.0, S.sub.2 .noteq.0 and S.sub.i .noteq.0. Alternatively, the system may further include three counters for respectively counting errors developed in the set of sampled signal words, and the error correcting words P and Q, the errors being detected by a CRC check circuit. When any one of the counters counts an error and the remaining counters count no error with S.sub.1 .noteq.0, S.sub.2 .noteq.0 and S.sub.i .noteq.0, a control signal is generated to perform a concealing operation, such as a means value interpolation, etc.
    • 错误校正和控制系统为一组再现的采样信号字和纠错字P或Q中的每一个形成校正子S1和S2,并且还通过使用CRC的结果形成校正子Si = S1(+)Ti-7S2 检查采样信号集的集合。 错误位置i由分别表示S1 NOTEQUAL 0,S2 NOTEQUAL 0和Si NOTEQUAL 0的三个零计数器确定。或者,系统还可以包括三个计数器,用于分别计数在采样信号字集合中产生的误差,并且误差 校正字P和Q,由CRC校验电路检测的误差。 当任何一个计数器计数一个错误,剩余的计数器计数没有错误与S1 NOTEQUAL 0,S2 NOTEQUAL 0和Si NOTEQUAL 0,产生一个控制信号执行隐藏操作,如平均值插值等。
    • 60. 发明授权
    • Address designating method of memory and apparatus therefor
    • 存储器及其设备的地址指定方法
    • US4516219A
    • 1985-05-07
    • US446403
    • 1982-12-02
    • Masayuki Ishida
    • Masayuki Ishida
    • G11B20/18G11B27/10G06F9/32
    • G11B27/102G11B20/1809
    • An address designating method of a memory is performed by dividing the addresses of the memory to row addresses and column addresses. The writing of data in the memory is performed by the following steps. Namely, while the row addressing is maintained in a predetermined value (for example, 7d+1), the column addressing is incremented one by one. When the column addressing reaches 3, the row addressing is decremented by 4d+1. Each time the row addressing is decremented by d, the column addressing is decremented one by one in accord therewith. The reading of the data from the memory is performed by the following steps. Namely, each time the row addressing is incremented by d, the column addressing is also incremented one by one in accord therewith. When the column addressing reaches 3, the row addressing is decremented by 3d+1. With the row addressing kept in 0, the column addressing is decremented one by one.
    • 通过将存储器的地址划分为行地址和列地址来执行存储器的地址指定方法。 通过以下步骤执行数据在存储器中的写入。 也就是说,当行寻址保持在预定值(例如,7d + 1)时,列寻址逐个递增。 当列寻址达到3时,行寻址递减4d + 1。 每次行寻址减去d时,列寻址与之一一递减。 通过以下步骤执行从存储器读取数据。 也就是说,每次行寻址增加d时,列寻址也会逐一递增。 当列寻址达到3时,行寻址递减3d + 1。 在行寻址保持为0的情况下,列寻址逐个递减。