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51. 发明授权

US08344997B2 Method and system for writing data to electromechanical display elements 失效
标题翻译：将数据写入机电显示元件的方法和系统
公开(公告)号：US08344997B2
公开(公告)日：2013-01-01
申请号：US12851523
申请日：2010-08-05
申请人： Clarence Chui , Manish Kothari
发明人： Clarence Chui , Manish Kothari
IPC分类号： G09G3/34
CPC分类号： G09G3/3466 , G09G2300/06 , G09G2310/0245 , G09G2310/0254 , G09G2310/08 , G09G2340/0435
摘要： Methods and devices for applying bias potentials of opposite polarities to columns of electromechanical display elements are described herein. The bias potentials may be applied such that a column and an adjacent column receive bias potentials of opposite polarity. The bias potentials may be applied such that a polarity of bias voltages received by columns of a first set of the display elements is opposite a polarity of bias voltages received by columns of a second set of the display elements.
摘要翻译：本文描述了用于向机电显示元件的列施加相反极性的偏置电位的方法和装置。可以施加偏置电位使得列和相邻列接收相反极性的偏置电位。可以施加偏置电位，使得由第一组显示元件的列接收的偏置电压的极性与第二组显示元件的列接收的偏置电压的极性相反。

52. 发明申请

US20100315398A1 METHOD AND SYSTEM FOR WRITING DATA TO ELECTROMECHANICAL DISPLAY ELEMENTS 失效
标题翻译：将数据写入机电显示元件的方法和系统
公开(公告)号：US20100315398A1
公开(公告)日：2010-12-16
申请号：US12851523
申请日：2010-08-05
申请人： Clarence Chui , Manish Kothari
发明人： Clarence Chui , Manish Kothari
IPC分类号： G09G3/34 , G09G5/00
CPC分类号： G09G3/3466 , G09G2300/06 , G09G2310/0245 , G09G2310/0254 , G09G2310/08 , G09G2340/0435
摘要： Methods and devices for applying bias potentials of opposite polarities to columns of electromechanical display elements are described herein. The bias potentials may be applied such that a column and an adjacent column receive bias potentials of opposite polarity. The bias potentials may be applied such that a polarity of bias voltages received by columns of a first set of the display elements is opposite a polarity of bias voltages received by columns of a second set of the display elements.
摘要翻译：本文描述了用于向机电显示元件的列施加相反极性的偏置电位的方法和装置。可以施加偏置电位使得列和相邻列接收相反极性的偏置电位。可以施加偏置电位，使得由第一组显示元件的列接收的偏置电压的极性与第二组显示元件的列接收的偏置电压的极性相反。

53. 发明申请

US20100149627A1 SUPPORT STRUCTURE FOR MEMS DEVICE AND METHODS THEREFOR 失效
标题翻译： MEMS器件的支持结构及其方法
公开(公告)号：US20100149627A1
公开(公告)日：2010-06-17
申请号：US12711594
申请日：2010-02-24
申请人： Teruo Sasagawa , Clarence Chui , Manish Kothari , SuryaPrakash Ganti , Jeffrey B. Sampsell , Chun-Ming Wang
发明人： Teruo Sasagawa , Clarence Chui , Manish Kothari , SuryaPrakash Ganti , Jeffrey B. Sampsell , Chun-Ming Wang
IPC分类号： G02B26/00 , B05D5/12 , C23F1/00
CPC分类号： G02B26/0841 , B81B2201/042 , B81B2203/0307 , B81C1/00595 , B81C2201/014 , G02B26/001
摘要： A microelectromechanical systems device having support structures formed of sacrificial material surrounded by a protective material. The microelectromechanical systems device includes a substrate having an electrode formed thereon. Another electrode is separated from the first electrode by a cavity and forms a movable layer, which is supported by support structures formed of a sacrificial material.
摘要翻译：具有由保护材料包围的牺牲材料形成的支撑结构的微机电系统装置。微机电系统装置包括其上形成有电极的基板。另一电极通过空腔与第一电极分离，并形成可移动层，该可移动层由牺牲材料形成的支撑结构支撑。

54. 发明授权

US07602375B2 Method and system for writing data to MEMS display elements 失效
标题翻译：将数据写入MEMS显示元件的方法和系统
公开(公告)号：US07602375B2
公开(公告)日：2009-10-13
申请号：US11100762
申请日：2005-04-06
申请人： Clarence Chui , Manish Kothari
发明人： Clarence Chui , Manish Kothari
IPC分类号： G09G3/34
CPC分类号： G09G3/3466 , G09G2300/06 , G09G2310/0245 , G09G2310/0254
摘要： Charge balanced display data writing methods use write and hold cycles of opposite polarity during selected frame update periods. A release cycle may be provided to reduce the chance that a given display element will become stuck in an actuated state.
摘要翻译：电荷平衡显示数据写入方式在选定的帧更新周期内使用相反极性的写和保持周期。可以提供释放循环以减少给定显示元件将被卡在致动状态的机会。

55. 发明授权

US07576901B2 Method and device for selective adjustment of hysteresis window 失效
标题翻译：用于选择性调整滞后窗的方法和装置
公开(公告)号：US07576901B2
公开(公告)日：2009-08-18
申请号：US11958316
申请日：2007-12-17
申请人： Clarence Chui , Manish Kothari
发明人： Clarence Chui , Manish Kothari
IPC分类号： G02B26/00 , H01L29/84
CPC分类号： G02B26/001
摘要： The width and location of a hysteresis window of an interferometric modulator may be altered by adjusting various physical characteristics of the interferometric modulator. Thus, depending on the particular application for which the interferometric modulators are manufactured, the width and location of the hysteresis window may be altered. For example, in some applications, reducing the power required to operate an array of interferometric modulators may be an important consideration. In other applications, the speed of the interferometric modulators may be of more importance, where the speed of an interferometric modulator, as used herein, refers to the speed of actuating and relaxing the moveable mirror. In other applications, the cost and ease of manufacturing may be of most importance. Systems and methods are introduced that allow selection of a width and location of a hysteresis window by adjusting various physical characteristics.
摘要翻译：可以通过调整干涉式调制器的各种物理特性来改变干涉式调制器的滞后窗的宽度和位置。因此，根据制造干涉式调制器的特定应用，可以改变滞后窗口的宽度和位置。例如，在某些应用中，降低操作干涉式调制器阵列所需的功率可能是重要的考虑因素。在其他应用中，干涉式调制器的速度可能更为重要，其中如本文所使用的干涉式调制器的速度是指致动和放松可移动反射镜的速度。在其他应用中，制造的成本和易用性可能是最重要的。引入了通过调整各种物理特性来选择滞后窗口的宽度和位置的系统和方法。

56. 发明申请

US20090068781A1 METHOD OF MANUFACTURE FOR MICROELECTROMECHANICAL DEVICES 有权
标题翻译：微电子设备制造方法
公开(公告)号：US20090068781A1
公开(公告)日：2009-03-12
申请号：US12271793
申请日：2008-11-14
申请人： Ming-Hau Tung , Brian James Gally , Manish Kothari , Clarence Chui , John Batey
发明人： Ming-Hau Tung , Brian James Gally , Manish Kothari , Clarence Chui , John Batey
IPC分类号： H01L21/00
CPC分类号： B81C1/00579 , B81B3/0008 , Y10T428/12542
摘要： A method of manufacturing a microelectromechanical device includes forming at least two conductive layers on a substrate. An isolation layer is formed between the two conductive layers. The conductive layers are electrically coupled together and then the isolation layer is removed to form a gap between the conductive layers. The electrical coupling of the layers mitigates or eliminates the effects of electrostatic charge build up on the device during the removal process.
摘要翻译：一种制造微机电装置的方法包括在基板上形成至少两个导电层。在两个导电层之间形成隔离层。导电层电耦合在一起，然后去除隔离层以在导电层之间形成间隙。这些层的电耦合可减轻或消除在去除过程中静电积累在器件上的影响。

57. 发明授权

US07476327B2 Method of manufacture for microelectromechanical devices 有权
标题翻译：微机电装置的制造方法
公开(公告)号：US07476327B2
公开(公告)日：2009-01-13
申请号：US10839329
申请日：2004-05-04
申请人： Ming-Hau Tung , Brian James Gally , Manish Kothari , Clarence Chui , John Batey
发明人： Ming-Hau Tung , Brian James Gally , Manish Kothari , Clarence Chui , John Batey
IPC分类号： B21D39/00
CPC分类号： B81C1/00579 , B81B3/0008 , Y10T428/12542
摘要： A method of manufacturing a microelectromechanical device includes forming at least two conductive layers on a substrate. An isolation layer is formed between the two conductive layers. The conductive layers are electrically coupled together and then the isolation layer is removed to form a gap between the conductive layers. The electrical coupling of the layers mitigates or eliminates the effects of electrostatic charge build up on the device during the removal process.
摘要翻译：一种制造微机电装置的方法包括在基板上形成至少两个导电层。在两个导电层之间形成隔离层。导电层电耦合在一起，然后去除隔离层以在导电层之间形成间隙。这些层的电耦合可减轻或消除在去除过程中静电积累在器件上的影响。

58. 发明授权

US07424198B2 Method and device for packaging a substrate 失效
标题翻译：包装基材的方法和装置
公开(公告)号：US07424198B2
公开(公告)日：2008-09-09
申请号：US11045738
申请日：2005-01-28
申请人： Lauren Palmateer , William J. Cummings , Brian Gally , Mark Miles , Jeffrey B. Sampsell , Clarence Chui , Manish Kothari
发明人： Lauren Palmateer , William J. Cummings , Brian Gally , Mark Miles , Jeffrey B. Sampsell , Clarence Chui , Manish Kothari
IPC分类号： G02B6/00
CPC分类号： G02B26/007 , B81B2201/047 , B81C1/00285 , B81C1/00333 , B81C2203/0136 , B81C2203/0145 , G02B26/001 , G02B26/0825 , G02B26/0833
摘要： A package structure and method of packaging for an interferometric modulator. A thin film material is deposited over an interferometric modulator and transparent substrate to encapsulate the interferometric modulator. A gap or cavity between the interferometric modulator and the thin film provides a space in which mechanical parts of the interferometric modulator may move. The gap is created by removal of a sacrificial layer that is deposited over the interferometric modulator.
摘要翻译：用于干涉式调制器的封装结构和封装方法。在干涉式调制器和透明衬底上沉积薄膜材料以封装干涉式调制器。干涉式调制器和薄膜之间的间隙或腔提供干涉式调制器的机械部分可以移动的空间。通过去除沉积在干涉式调制器上的牺牲层产生间隙。

59. 发明申请

US20070291347A1 Area array modulation and lead reduction in interferometric modulators 失效
标题翻译：干涉式调制器的面阵阵列调制和引线减少
公开(公告)号：US20070291347A1
公开(公告)日：2007-12-20
申请号：US11649439
申请日：2007-01-03
申请人： Jeffrey Sampsell , Clarence Chui , Manish Kothari
发明人： Jeffrey Sampsell , Clarence Chui , Manish Kothari
IPC分类号： G02B26/00
CPC分类号： G09G3/3466 , G02B26/001 , G09G3/2074 , G09G3/2081 , G09G2300/06 , G09G2310/0267 , G09G2310/0297
摘要： A light modulator is arranged as an array of rows and columns of interferometric display elements. Each element is divided into sub-rows of sub-elements. Array connection lines transmit operating signals to the display elements, with one connection line corresponding to one row of display elements in the array. Sub-array connection lines electrically connect to each array connection line. Switches transmit the operating signals from each array connection line to the sub-rows to effect gray scale modulation.
摘要翻译：光调制器被布置为干涉式显示元件的行和列的阵列。每个元素被划分成子行子元素。阵列连接线将工作信号发送到显示元件，其中一条连接线对应于阵列中的一行显示元件。子阵列连接线电连接到每个阵列连接线。开关将来自每个阵列连接线的操作信号传输到子行以实现灰度调制。

60. 发明申请

US20070177129A1 System and method for providing residual stress test structures 失效
标题翻译：提供残余应力测试结构的系统和方法
公开(公告)号：US20070177129A1
公开(公告)日：2007-08-02
申请号：US11453633
申请日：2006-06-15
申请人： Manish Kothari , Lior Kogut , Clarence Chui
发明人： Manish Kothari , Lior Kogut , Clarence Chui
IPC分类号： G01B11/16 , G02B26/00
CPC分类号： G01L5/0047 , G02B26/001
摘要： The invention comprises systems and methods determining residual stress such as that found in interferometric modulators. In one example, a test unit can be configured to indicate residual stress in a film by interferometrically modulating light indicative of an average residual stress in two orthogonal directions of the substrate. The test unit can include a reflective membrane attached to the substrate where membrane is configured as a parallelogram with at least a portion of each side attached to the substrate, and an interferometric cavity formed between a portion of the membrane and a portion of the substrate, and where the membrane is configured to deform based on the residual stress of in the film and modulate light indicative of the amount of membrane deformation.
摘要翻译：本发明包括确定残余应力的系统和方法，例如在干涉式调制器中发现的。在一个示例中，测试单元可以被配置为通过对指示基板的两个正交方向上的平均残余应力的光进行干涉测量来指示膜中的残余应力。测试单元可以包括附接到基底的反射膜，其中膜被构造为平行四边形，其中每侧的至少一部分附着到基底，以及形成在膜的一部分和基底的一部分之间的干涉腔，并且其中膜被配置为基于膜的残余应力而变形并且调制指示膜变形量的光。

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