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51. 发明授权

US5717650A Row/column decoder circuits for a semiconductor memory device 失效
标题翻译：用于半导体存储器件的行/列解码器电路
公开(公告)号：US5717650A
公开(公告)日：1998-02-10
申请号：US778720
申请日：1996-12-27
申请人： In Sool Chung , Jae Jin Lee
发明人： In Sool Chung , Jae Jin Lee
IPC分类号： G11C11/407 , G11C8/10 , G11C7/00 , G11C8/00
CPC分类号： G11C8/10
摘要： Row/column decoder circuits for a semiconductor memory device. Switching elements are used to separate a main power line from the row decoder circuit to block power from the main power line to the row decoder circuit when a word line is not driven. Therefore, the amount of standby current consumption can be reduced. Also, switching elements are used to separate a main power line from the column decoder circuit to block power from the main power line to the column decoder circuit when a bit line is not selected. Therefore, the amount of standby current consumption can be reduced.
摘要翻译：用于半导体存储器件的行/列解码器电路。当字线不被驱动时，开关元件用于将主电源线与行解码器电路分离以阻断从主电源线到行解码器电路的电力。因此，可以减少待机电流消耗量。此外，当未选择位线时，开关元件用于将主电源线与列解码器电路分离，以阻断从主电源线到列解码器电路的电力。因此，可以减少待机电流消耗量。

52. 发明授权

US09287477B2 Light emitting diode package 有权
标题翻译：发光二极管封装
公开(公告)号：US09287477B2
公开(公告)日：2016-03-15
申请号：US14124974
申请日：2012-02-02
申请人： Jae Jin Lee , Sung Ho Choi , Duk In Kang
发明人： Jae Jin Lee , Sung Ho Choi , Duk In Kang
IPC分类号： H01L27/32 , H01L51/50 , H01L33/62 , H01L33/64
CPC分类号： H01L33/62 , H01L27/32 , H01L33/642 , H01L33/647 , H01L51/50 , H01L2224/48091 , H01L2224/48247 , H01L2924/00014
摘要： An LED package includes a lead frame, a housing part, and a lead heat dissipating part. The lead frame includes a first lead mounting an LED chip and a second lead spaced apart from the first lead. The housing part covers a portion of the lead frame and includes an opening part for exposing the LED chip, a first side corresponding to a support side contacting the first lead and the second lead, and a second side opposite to the first side. The lead heat dissipating part is extended from the first lead and exposed partially to the first side of the housing part. Herein, the first side of the housing part is thicker than the second side.
摘要翻译： LED封装包括引线框架，壳体部分和引线散热部件。引线框架包括安装LED芯片的第一引线和与第一引线间隔开的第二引线。壳体部分覆盖引线框架的一部分并且包括用于暴露LED芯片的开口部分，对应于接触第一引线和第二引线的支撑侧的第一侧和与第一侧相对的第二侧。引线散热部分从第一引线延伸并部分暴露于壳体部分的第一侧。这里，壳体部分的第一侧比第二侧厚。

53. 发明授权

US09070806B2 Self-powered solar tracker 有权
标题翻译：自供电太阳能跟踪器
公开(公告)号：US09070806B2
公开(公告)日：2015-06-30
申请号：US14114884
申请日：2012-08-22
申请人： Jae Jin Lee
发明人： Jae Jin Lee
IPC分类号： H02N6/00 , H01L31/042 , F24J2/38 , F24J2/40 , G01S3/786
CPC分类号： H01L31/042 , F24S30/45 , F24S50/00 , F24S50/20 , G01S3/7861 , H01L25/042 , H02S20/00 , H02S20/32 , Y02E10/47
摘要： Provided is a self-powered solar tracker, which is a solar tracker for adjusting the altitude of and horizontally rotating a solar collector panel such that the solar collector panel on which a plurality of solar cells are provided can face the sun, wherein the self-powered solar tracker comprises: an altitude adjustment optical sensor unit which has one or more first optical sensors formed by being uniformly spaced on the upper side of convex support surfaces to face the sun and one or more second optical sensors formed by being uniformly spaced on the lower side of the convex support surfaces, and which senses the sunlight so as to adjust the altitude of the solar collector panel; a horizontal rotation optical sensor unit which has one or more third optical sensors formed by being uniformly spaced on the left side of the convex support surfaces to face the sun and one or more fourth optical sensors formed by being uniformly spaced on the right side of the convex support surfaces, and which senses sunlight so as to horizontally rotate the solar collector panel; a passive element circuit which has one or more first comparison circuits for comparing the difference in the quantity of output light between the first optical sensors and the second optical sensors and one or more second comparison circuits for comparing the difference in the quantity of output light between the third optical sensors and the fourth optical sensors, and which outputs a driving value for adjusting the altitude of and horizontally rotating the solar collector panel in the direction having a larger light value; an altitude adjustment driving unit for receiving a driving power source from the solar cells of the solar collector panel and for adjusting the altitude of the solar collector panel according to the driving value of the passive element circuit; and a horizontal rotation driving unit for performing the horizontal rotation.
摘要翻译：提供了一种自供电的太阳能跟踪器，其是用于调节太阳能收集器板的高度并水平旋转的太阳能跟踪器，使得其上设置有多个太阳能电池的太阳能收集器面板可面向太阳，其中，具有：高度调节光学传感器单元，其具有一个或多个第一光学传感器，所述第一光学传感器通过在凸起的支撑表面的上侧均匀地间隔开以面对太阳镜，以及一个或多个第二光学传感器，所述第二光学传感器通过在凸起的支撑表面的下侧，并且感测太阳光以调节太阳能收集器板的高度; 水平旋转光学传感器单元，其具有一个或多个第三光学传感器，所述第三光学传感器通过在凸状支撑表面的左侧均匀地隔开以形成以面对太阳，以及一个或多个第四光学传感器，其通过在凸起的支撑表面，并且其感测太阳光以水平地旋转太阳能收集器面板; 无源元件电路，其具有用于比较第一光学传感器和第二光学传感器之间的输出光量的差异的一个或多个第一比较电路和用于比较第一光学传感器和第二光学传感器之间的输出光量差异的一个或多个第二比较电路，第三光传感器和第四光传感器，并且输出用于调节具有较大光值的方向的太阳能收集板的高度和水平旋转的驱动值; 高度调节驱动单元，用于从太阳能收集板的太阳能电池接收驱动电源，并根据无源元件电路的驱动值调节太阳能收集板的高度; 以及水平旋转驱动单元，用于执行水平旋转。

54. 发明授权

US08817866B2 Data equalizing circuit and data equalizing method 有权
标题翻译：数据均衡电路和数据均衡方法
公开(公告)号：US08817866B2
公开(公告)日：2014-08-26
申请号：US13407478
申请日：2012-02-28
申请人： Chun Seok Jeong , Jae Jin Lee , Chang Sik Yoo , Jang Woo Lee , Seok Joon Kang
发明人： Chun Seok Jeong , Jae Jin Lee , Chang Sik Yoo , Jang Woo Lee , Seok Joon Kang
IPC分类号： H03H7/30
CPC分类号： H04L25/03878 , H04L25/03012
摘要： A data equalizing circuit includes an equalizer configured to output data according to a control code; and a detection unit configured to divide the data into N number of calculation periods, count data transition frequencies for the N calculation periods, calculate dispersion values of the data transition frequencies for the N calculation periods, and output the control code corresponding to a largest dispersion value, in response to a counting interruption signal and a counting completion signal, wherein n is equal to or greater than 2, N is greater than n, and the data is divided to n number of unit intervals (UI), andwherein a phase shift of each of the calculation periods with respect to its corresponding UI is different from a phase shift of any of the other calculation periods with respect to its corresponding UI.
摘要翻译：数据均衡电路包括：均衡器，被配置为根据控制码输出数据; 以及检测单元，被配置为将数据划分为N个计算周期，用于N个计算周期的计数数据转换频率，计算N个计算周期的数据转换频率的色散值，并输出与最大色散对应的控制码响应于计数中断信号和计数完成信号，其中n等于或大于2，N大于n，并且数据被划分为n个单位间隔（UI），并且其中相位每个计算周期相对于其对应的UI的移位不同于任何其他计算周期相对于其对应的UI的相移。

55. 发明授权

US08089148B1 Circuit board and semiconductor device having the same 有权
标题翻译：具有相同的电路板和半导体器件
公开(公告)号：US08089148B1
公开(公告)日：2012-01-03
申请号：US12539116
申请日：2009-08-11
申请人： Jun Su Lee , Min Jae Lee , Jae Dong Kim , Jae Jin Lee , Min Yoo , Byung Jun Kim
发明人： Jun Su Lee , Min Jae Lee , Jae Dong Kim , Jae Jin Lee , Min Yoo , Byung Jun Kim
IPC分类号： H01L23/48
CPC分类号： H01L24/81 , H01L24/83 , H01L24/92 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/136 , H01L2224/16225 , H01L2224/26175 , H01L2224/29111 , H01L2224/2919 , H01L2224/73204 , H01L2224/8121 , H01L2224/81815 , H01L2224/83102 , H01L2224/92125 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/014 , H01L2924/0665 , H01L2924/1579 , H01L2924/00014 , H01L2924/00 , H01L2924/01083 , H01L2224/32225 , H01L2924/00012
摘要： A circuit board has an insulative layer including a first surface and a second surface opposite to the first surface. A plurality of electrically conductive patterns is formed on the first surface of the insulative layer. Conductive lands are formed in a die mounting region of the first surface of the insulative layer and electrically connected to one of the plurality of conductive patterns on the first surface. An extending pattern extends from the conductive lands to outside of the mounting region. A protective layer covers the first surface of the insulative layer and the electrically conductive patterns. A trench is formed in the protective layer to expose the conductive lands and the extending patterns.
摘要翻译：电路板具有包括与第一表面相对的第一表面和第二表面的绝缘层。在绝缘层的第一表面上形成多个导电图案。导电焊盘形成在绝缘层的第一表面的管芯安装区域中，并且与第一表面上的多个导电图案之一电连接。延伸图案从导电焊盘延伸到安装区域的外部。保护层覆盖绝缘层的第一表面和导电图案。在保护层中形成沟槽以暴露导电焊盘和延伸图案。

56. 发明授权

US07887489B2 System and method for detecting sleepiness 有权
标题翻译：用于检测嗜睡的系统和方法
公开(公告)号：US07887489B2
公开(公告)日：2011-02-15
申请号：US12520246
申请日：2008-08-29
申请人： Jae Jin Lee , Chung Hwan Kim , Min Gun Kim
发明人： Jae Jin Lee , Chung Hwan Kim , Min Gun Kim
IPC分类号： A61B5/02
CPC分类号： G08B21/06 , A61B5/0205 , A61B5/0402 , A61B5/0507 , A61B5/1102 , A61B5/7455 , A61B2503/22
摘要： The present invention relates to a drowsiness detection method. A heartbeat signal and a breathing signal are detected by exploiting together a scheme and an optical system scheme. The detected signals are applied to respective amplification units, noise signals are eliminated from the detected signals, and noise-free signals are amplified. The amplified signals are applied to a central processing unit, signal processing is processed on the signals, and processed signals are combined. The combined signal is counted, and a warning sound, voice message or vibration is output in a case where a value, obtained by subtracting a counted output value monitored one minute before a current time, from a counted output value monitored two minutes before the current time, falls within a detection range and where, with a passage of time, the value falling within the detection range is successively detected from two to ten times.
摘要翻译：本发明涉及一种嗜睡检测方法。通过一起利用方案和光学系统方案来检测心跳信号和呼吸信号。检测到的信号被施加到各个放大单元，从检测到的信号中消除噪声信号，并且无噪声信号被放大。将放大的信号施加到中央处理单元，对信号进行信号处理，并且处理的信号被组合。对组合的信号进行计数，并且在通过从当前时间之前1分钟监视的计数输出值减去得到的值从在当前的两分钟前监视的计数输出值得到的值的情况下输出警告声音，语音消息或振动时间落在检测范围内，并且随着时间的流逝，落在检测范围内的值被连续地检测到两到十次。

57. 外观设计

USD613259S1 Light emitting diode 有权
公开(公告)号：USD613259S1
公开(公告)日：2010-04-06
申请号：US29329421
申请日：2008-12-15
申请人： Jae Jin Lee , Eun Seok Yeom , Jeong Gyoo Lee
设计人： Jae Jin Lee , Eun Seok Yeom , Jeong Gyoo Lee

58. 发明申请

US20090184737A1 SEMICONDUCTOR DEVICE HAVING INPUT CIRCUIT WITH AUXILIARY CURRENT SINK 失效
标题翻译：具有辅助电流波形的输入电路的半导体器件
公开(公告)号：US20090184737A1
公开(公告)日：2009-07-23
申请号：US12138024
申请日：2008-06-12
申请人： Mi Hye Kim , Jae Jin Lee
发明人： Mi Hye Kim , Jae Jin Lee
IPC分类号： H03B1/00
CPC分类号： H03K19/00323 , G11C7/1078 , G11C7/1084 , H03K19/01721 , H03K19/01742 , H03K19/018528 , H03K19/09429
摘要： A semiconductor device stabilizes an operation of an input buffer. A semiconductor device includes an input potential detection unit outputting a detection signal in response to a level of an input signal. An input buffer buffers the input signal by performing a differential amplifying operation through a first current sink unit. A second current sink unit, sharing an output with the input buffer, differentially amplifies the input signal of the input buffer in response to a level of the detection signal.
摘要翻译：半导体器件稳定输入缓冲器的操作。半导体器件包括输入电位检测单元，其响应于输入信号的电平输出检测信号。输入缓冲器通过执行通过第一电流吸收器单元的差分放大操作来缓冲输入信号。与输入缓冲器共享输出的第二电流宿单元响应于检测信号的电平差分地放大输入缓冲器的输入信号。

59. 发明授权

US07526637B2 Adaptive execution method for multithreaded processor-based parallel system 有权
标题翻译：基于多线程处理器的并行系统的自适应执行方法
公开(公告)号：US07526637B2
公开(公告)日：2009-04-28
申请号：US11453288
申请日：2006-06-15
申请人： Chang Hee Jung , Dae Seob Lim , Jae Jin Lee , Sang Yong Han
发明人： Chang Hee Jung , Dae Seob Lim , Jae Jin Lee , Sang Yong Han
IPC分类号： G06F9/00
CPC分类号： G06F8/456 , G06F9/5066 , G06F11/3404 , G06F2201/88
摘要： Provided is a parallel program execution method in which in order to reflect structural characteristics of a multithreaded processor-based parallel system, performance of the parallel loop is predicted while compiling or executing using a performance prediction model and then the parallel program is executed using an adaptive execution method.The method includes the steps of: generating as many threads as the number of physical processors of the parallel system in order to execute at least one parallel loop contained in the parallel program; by the generated threads, executing at least one single loop of each parallel loop; measuring an execution time, the number of executed instructions, and the number of cache misses for each parallel loop; determining an execution mode of each parallel loop by determining the number of threads used to execute each parallel loop based on the measured values; and allocating the threads to each physical processor according to the result of the determination to execute each parallel loop.The method significantly improves the performance of the parallel program driven in the multithreaded processor-based parallel system.
摘要翻译：提供了一种并行程序执行方法，其中为了反映基于多线程处理器的并行系统的结构特征，在使用性能预测模型编译或执行时预测并行循环的性能，然后使用自适应执行方式。该方法包括以下步骤：生成与并行系统的物理处理器的数量一样多的线程，以便执行并行程序中包含的至少一个并行循环; 通过生成的线程执行每个并行循环的至少一个单个循环; 测量执行时间，执行指令的数量以及每个并行循环的高速缓存未命中数; 通过基于测量值确定用于执行每个并行循环的线程数，确定每个并行循环的执行模式; 以及根据确定的结果将线程分配给每个物理处理器以执行每个并行循环。该方法显着提高了在基于多线程处理器的并行系统中驱动的并行程序的性能。

60. 发明授权

US07126185B2 Charge trap insulator memory device 失效
公开(公告)号：US07126185B2
公开(公告)日：2006-10-24
申请号：US11115135
申请日：2005-04-27
申请人： Hee Bok Kang , Jin Hong Ahn , Jae Jin Lee
发明人： Hee Bok Kang , Jin Hong Ahn , Jae Jin Lee
IPC分类号： H01L29/788
CPC分类号： G11C16/0483 , G11C16/0466 , H01L27/115 , H01L27/11568 , H01L29/7881 , H01L29/792 , H01L29/8616
摘要： A charge trap insulator memory device comprises a plurality of memory cells connected serially, a first switching device, and a second switching device. In the plurality of memory cells, data applied through a bit line depending on potentials applied to a top word line and a bottom word line are stored in a charge trap insulator or the data stored in the charge trap insulator are outputted to the bit line. The first switching element selectively connects the plurality of memory cells to the bit line in response to a first selecting signal. The second switching element selectively connects the plurality of memory cells to a sensing line in response to a second selecting signal.

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