专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

51. 发明授权

US07764556B2 Semiconductor storage device including counter noise generator and method of controlling the same 失效
标题翻译：半导体存储装置，包括反噪声发生器及其控制方法
公开(公告)号：US07764556B2
公开(公告)日：2010-07-27
申请号：US12232190
申请日：2008-09-12
申请人： Hiroyuki Takahashi
发明人： Hiroyuki Takahashi
IPC分类号： G11C7/02
CPC分类号： G11C7/02 , G11C11/4074
摘要： A semiconductor storage device according to one aspect of the present invention includes a reference voltage source connected to a capacitor of a cell included in a memory, a buffer circuit holding data to be written in the cell, and a counter noise generator outputting a counter noise current canceling a noise current generated by rewriting the data in the cell to the reference voltage source according to the data held in the buffer circuit.
摘要翻译：根据本发明的一个方面的半导体存储装置包括：连接到包含在存储器中的单元的电容器的基准电压源，保持要写入单元的数据的缓冲电路;以及反相噪声发生器，根据保存在缓冲电路中的数据，将通过将单元中的数据重写到参考电压源而产生的噪声电流消除。

52. 发明授权

US07764085B2 Buffer circuit, buffer tree, and semiconductor device 失效
标题翻译：缓冲电路，缓冲树和半导体器件
公开(公告)号：US07764085B2
公开(公告)日：2010-07-27
申请号：US11097844
申请日：2005-04-01
申请人： Hiroyuki Takahashi , Hiroyuki Satake
发明人： Hiroyuki Takahashi , Hiroyuki Satake
IPC分类号： H03K19/175
CPC分类号： H03K5/086 , H03K5/1515 , H03K19/0013 , H03K2005/00136
摘要： A buffer circuit includes first and second transistors which are connected in series between first and second power supplies and which are controlled to be on/off based on values of signals at their control terminals are provided, in which a connection point between the two transistors is connected to an output terminal (OUT) and a control terminal of the first transistor is connected to an input terminal (IN), and a control circuit for performing on/off control over the second transistor based on an input signal from the input terminal (IN). The control circuit performs control so that when the input signal is at a second logic level corresponding to the second power supply, the second transistor is turned off, when the input signal goes to a first logic level corresponding to the first power supply, the second transistor is turned on to cause the output terminal (OUT) to a second power supply voltage, next, when the second transistor is turned off and then the input signal undergoes a transition from the first logic level to the second logic level and the first transistor switches from off to on, with the second transistor being kept off. A flip-flop is connected to the output terminal (OUT).
摘要翻译：缓冲电路包括串联连接在第一和第二电源之间的第一和第二晶体管，并且根据控制端的信号值将其控制为导通/截止，其中两个晶体管之间的连接点为连接到输出端子（OUT），并且第一晶体管的控制端子连接到输入端子（IN），以及控制电路，用于基于来自输入端子的输入信号来对第二晶体管进行导通/关断控制在）。控制电路进行控制，使得当输入信号处于与第二电源相对应的第二逻辑电平时，第二晶体管截止，当输入信号变为对应于第一电源的第一逻辑电平时，第二晶体管晶体管导通以使输出端（OUT）达到第二电源电压，接下来，当第二晶体管截止，然后输入信号经历从第一逻辑电平转换到第二逻辑电平时，第一晶体管从第二个晶体管关闭，从断开到关闭。触发器连接到输出端（OUT）。

53. 发明授权

US07749240B2 Ultrasonic surgical system 有权
标题翻译：超声波手术系统
公开(公告)号：US07749240B2
公开(公告)日：2010-07-06
申请号：US10900810
申请日：2004-07-28
申请人： Hiroyuki Takahashi , Eiji Murakami
发明人： Hiroyuki Takahashi , Eiji Murakami
IPC分类号： A61B17/32 , A61B17/20
CPC分类号： A61B17/320068 , A61B17/320092 , A61B90/11 , A61B90/90 , A61B2017/00017 , A61B2017/0003 , A61B2017/00464 , A61B2017/00482
摘要： An ultrasonic surgical system includes a handpiece including an ultrasonic transducer and a first storage unit; a probe connected to the ultrasonic transducer; a calculation unit; and a control unit. The first storage unit stores a first parameter relating to control of the ultrasonic transducer. The probe transmits ultrasonic vibrations output from the ultrasonic transducer to a treatment target, and includes a second storage unit storing a second parameter relating to control of the ultrasonic transducer. The calculation unit calculates a control parameter for controlling the ultrasonic transducer, based on both the first parameter and the second parameter. The control unit controls the ultrasonic transducer based on the control parameter.
摘要翻译：超声波手术系统包括：手持件，其包括超声换能器和第一存储单元; 连接到超声波换能器的探针; 计算单位和控制单元。第一存储单元存储与超声波换能器的控制有关的第一参数。探针将从超声换能器输出的超声波振动传递到治疗目标，并且包括存储与超声波换能器的控制有关的第二参数的第二存储单元。计算单元基于第一参数和第二参数来计算用于控制超声换能器的控制参数。控制单元根据控制参数控制超声波换能器。

54. 发明授权

US07746141B2 Delay circuit 失效
标题翻译：延时电路
公开(公告)号：US07746141B2
公开(公告)日：2010-06-29
申请号：US11759309
申请日：2007-06-07
申请人： Hiroyuki Takahashi
发明人： Hiroyuki Takahashi
IPC分类号： H03H11/26
CPC分类号： H03H11/265 , H03K5/133 , H03K2005/0013 , H03K2005/00143 , H03K2005/00195
摘要： A delay circuit includes a delay time setting circuit to set a delay time of an output signal with respect to an input signal, a first transistor connected to an input terminal of the delay time setting circuit and configured to set a first voltage to the input terminal of the delay time setting circuit and a second transistor connected to an output terminal of the delay time setting circuit and configured to reset the output terminal of the delay time setting circuit to a second voltage and clear the reset of the output terminal of the delay time setting circuit after the first voltage is set.
摘要翻译：延迟电路包括：延迟时间设定电路，用于设定输出信号相对于输入信号的延迟时间，第一晶体管连接到所述延迟时间设定电路的输入端子，并且被配置为将第一电压设置到所述输入端子和延迟时间设定电路的输出端子连接的第二晶体管，并且将延迟时间设定电路的输出端子复位为第二电压，并将延迟时间的输出端子的复位清零第一个电压设置后设置电路。

55. 发明授权

US07740097B2 Hood airbag device for use in a vehicle 有权
标题翻译：用于车辆的安全气囊装置
公开(公告)号：US07740097B2
公开(公告)日：2010-06-22
申请号：US12223252
申请日：2007-01-04
申请人： Hiroyuki Takahashi , Takayuki Takimoto
发明人： Hiroyuki Takahashi , Takayuki Takimoto
IPC分类号： B60K28/10
CPC分类号： B60R21/36
摘要： A vehicle hood airbag device in which an in-hood reinforcement (28) is arranged in a hood width direction at a rear end portion of an inner hood panel (20). The in-hood reinforcement (28) has longitudinal opposite end portions coupled to left and right hood hinge reinforcements (40) that are disposed on the respective lateral sides of the inner hood-panel (20) to increase the rigidity of the inner hood panel (20). Further, by fixing the airbag case (46) to the in-hood reinforcement (28), the rigidity of the inner hood panel (20) is further increased.
摘要翻译：一种车辆罩安全气囊装置，其中，在内罩板（20）的后端部处，在发动机罩宽度方向上配置有机罩内加强件（28）。机罩内加强件（28）具有连接到左和右发动机罩铰链加强件（40）的纵向相对端部，其布置在内部发动机罩板（20）的相应横向侧上，以增加内部发动机罩板（20）。此外，通过将安全气囊（46）固定在机罩内加强件（28）上，内罩板（20）的刚性进一步提高。

56. 发明授权

US07724386B2 Image formation system 有权
标题翻译：图像形成系统
公开(公告)号：US07724386B2
公开(公告)日：2010-05-25
申请号：US10795321
申请日：2004-03-09
申请人： Hiroyuki Takahashi
发明人： Hiroyuki Takahashi
IPC分类号： G06F15/00 , G06F15/173
CPC分类号： H04N1/00366 , G03G15/5087 , G03G15/6538 , G03G2215/00021 , G03G2215/00109 , H04N1/00371 , H04N1/00408 , H04N1/00477 , H04N1/00641 , H04N1/00968 , H04N1/32502 , H04N1/32529 , H04N2201/0094 , H04N2201/0098
摘要： A method and apparatus are provided for printing using mixed printing devices. Images are formed by separating jobs, in a predetermined page order of the job, with color pages printed by a color MFP and black/white pages are printed by a black/white MFP. Thereafter, it is displayed that each sheaf of sheets is set in which bin of a collator. The collator mixes color pages with black/white pages. Further, each MFP prints bar codes representing job information. The collator reads the bar codes to mix the color pages with the black/white pages. Further, in mixing sheets corresponding to different plural jobs into one group, images outputted from a computer are printed by an MFP and images outputted from another computer are printed by another MFP. The collator reads the bar codes and mixes sheaves of the printed images into a group of the sheets.
摘要翻译：提供了一种用于使用混合打印装置进行打印的方法和装置。通过以预定的作业顺序分离作业，通过彩色MFP打印的彩色页面分离作业形成图像，并且由黑/白MFP打印黑/白页。此后，显示每张纸张被设置在整理机的哪一个箱中。整理机将彩色页面与黑色/白色页面混合。此外，每个MFP打印表示作业信息的条形码。整理器读取条形码以将彩色页面与黑白页面混合。此外，在将与不同的多个作业相对应的片材混合成一组时，由MFP打印从计算机输出的图像，并且由另一个MFP打印从另一个计算机输出的图像。整理机读取条形码并将印刷图像的滑轮混合成一组纸张。

57. 发明授权

US07688636B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07688636B2
公开(公告)日：2010-03-30
申请号：US11942742
申请日：2007-11-20
申请人： Hiroyuki Takahashi
发明人： Hiroyuki Takahashi
IPC分类号： G11C16/06
CPC分类号： G11C11/005 , G11C7/065 , G11C8/16 , G11C11/4091 , G11C11/413
摘要： A semiconductor device comprises a first memory cell comprising more than seven transistors and storing data in a latch circuit; and a second memory cell storing data in a capacitor; a sense amplifier having about the same circuit configuration of the first memory cell and detecting data stored in the second memory cell.
摘要翻译：一种半导体器件包括：第一存储单元，包括多于七个晶体管，并将数据存储在锁存电路中; 以及存储电容器中的数据的第二存储单元; 读出放大器，其具有与第一存储单元大致相同的电路配置，并检测存储在第二存储单元中的数据。

58. 发明申请

US20100066398A1 TEMPERATURE CONTROL DEVICE AND TEMPERATURE CONTROL METHOD 失效
标题翻译：温度控制装置和温度控制方法
公开(公告)号：US20100066398A1
公开(公告)日：2010-03-18
申请号：US12575815
申请日：2009-10-08
申请人： Masakazu ANDO , Hiroyuki Takahashi , Tsuyoshi Yamashita , Takashi Hashimoto
发明人： Masakazu ANDO , Hiroyuki Takahashi , Tsuyoshi Yamashita , Takashi Hashimoto
IPC分类号： G01R31/02
CPC分类号： G01R31/2874 , G01R31/2891 , G01R31/31905 , H01L2924/0002 , H01L2924/00
摘要： Pressing an electronic device (2) to be tested to contact terminals (132a and 132b) while bringing a heater (112) having equal or close temperature change characteristics to those of the electronic device to be tested by a test pattern, transmitting a test pattern to the electronic device to be tested in this state, and controlling a power consumption of a heater so that total power of a power consumption of the electronic device to be tested by the test pattern and a power consumption of the heater becomes a constant value.
摘要翻译：按照要测试的电子设备（2）接触端子（132a和132b），同时将具有相同或接近的温度变化特性的加热器（112）与被测试的电子设备的测试图案相连，并且控制加热器的功率消耗，使得由测试图案测试的电子设备的功耗和加热器的功率消耗的总功率变为恒定值。

59. 发明申请

US20100024981A1 SUBSTRATE SUPPORT FOR HIGH THROUGHPUT CHEMICAL TREATMENT SYSTEM 有权
标题翻译：用于高通量化学处理系统的基板支撑
公开(公告)号：US20100024981A1
公开(公告)日：2010-02-04
申请号：US12183694
申请日：2008-07-31
申请人： Jay R. Wallace , Hiroyuki Takahashi
发明人： Jay R. Wallace , Hiroyuki Takahashi
IPC分类号： C23F1/08
CPC分类号： H01L21/67754 , H01L21/67109 , H01L21/67248 , H01L21/67742 , H01L21/68742
摘要： A high throughput chemical treatment system for processing a plurality of substrates is described. The chemical treatment system is configured to chemically treat a plurality of substrates in a dry, non-plasma environment. A substrate support in the chemical treatment system is configured to support a plurality of substrates.
摘要翻译：描述了用于处理多个基板的高通量化学处理系统。化学处理系统被配置为在干燥的非等离子体环境中化学处理多个衬底。化学处理系统中的衬底支撑件被配置为支撑多个衬底。

60. 发明授权

US07570535B2 Semiconductor integrated circuit device having memory macros and logic cores on board 有权
标题翻译：半导体集成电路器件具有存储器宏和逻辑核心
公开(公告)号：US07570535B2
公开(公告)日：2009-08-04
申请号：US11043165
申请日：2005-01-27
申请人： Hiroyuki Takahashi
发明人： Hiroyuki Takahashi
IPC分类号： G11C7/00
CPC分类号： G11C11/40603 , G11C8/16 , G11C11/405 , G11C11/406 , G11C2207/104
摘要： A semiconductor integrated circuit device has memory macros and logic cores. The memory macro is composed of a dynamic memory including an access port and a refresh port. The semiconductor integrated circuit device also has a refresh control circuit common for a plurality of the memory macros. The refresh control circuit has a refresh address generation circuit which generates a refresh address for a memory macro having the largest capacity, supplies the refresh address to the memory macro, and supplies given top bits of the refresh address as a refresh address to another memory macro having a smaller capacity.
摘要翻译：半导体集成电路器件具有存储器宏和逻辑核。存储器宏由包括访问端口和刷新端口的动态存储器组成。半导体集成电路器件还具有多个存储器宏共用的刷新控制电路。刷新控制电路具有产生具有最大容量的存储器宏的刷新地址的刷新地址产生电路，将刷新地址提供给存储器宏，并将刷新地址的给定顶部位作为刷新地址提供给另一个存储器宏具有较小的容量。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式