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    • 51. 发明申请
    • Light-Emitting Device and Lighting Device
    • 发光装置和照明装置
    • US20130032841A1
    • 2013-02-07
    • US13560046
    • 2012-07-27
    • Yasuhiro JinboKensuke Yoshizumi
    • Yasuhiro JinboKensuke Yoshizumi
    • H01L33/58
    • H01L51/5265H01L51/504H01L51/5212H01L51/5275H01L2251/5361
    • A light-emitting device which has various emission colors and can be manufactured efficiently and easily is provided. A first conductive layer formed of a semi-transmissive and semi-reflective conductive film is provided in a first light-emitting element region, so that the intensity of light in a specific wavelength region is increased with a cavity effect. As a result, the light-emitting device as a whole can emit desired light. When the first conductive layer is formed using a material with low electric resistance, voltage drop in a transparent conductive layer in the light-emitting device can be prevented. Accordingly, a light-emitting device with less emission unevenness can be manufactured. By applying such a structure to a white-light-emitting device, desired white light emission or white light emission with an excellent color rendering property can be obtained. Further, a large-area lighting device including a white-light-emitting device with less emission unevenness can be provided.
    • 提供具有各种发光颜色并且可以有效且容易地制造的发光装置。 由半透射半导体膜形成的第一导电层设置在第一发光元件区域中,使得特定波长区域中的光的强度随腔效应而增加。 结果,整个发光装置可以发出所需的光。 当使用具有低电阻的材料形成第一导电层时,可以防止发光器件中的透明导电层中的电压降。 因此,可以制造发光不均匀性较差的发光元件。 通过将这种结构应用于白色发光元件,可以获得具有优异显色特性的期望的白色发光或白色发光。 此外,可以提供包括具有较少发射不均匀性的白光发射装置的大面积照明装置。
    • 52. 发明授权
    • Thin film transistor and display device including thin film transistor
    • 薄膜晶体管和显示装置包括薄膜晶体管
    • US08039842B2
    • 2011-10-18
    • US12467048
    • 2009-05-15
    • Yasuhiro Jinbo
    • Yasuhiro Jinbo
    • H01L29/786H01L33/00
    • H01L27/1288H01L27/1214H01L29/04H01L29/66765H01L29/78696
    • A thin film transistor with favorable electric characteristics is provided, which includes a gate electrode layer; a first insulating layer covering the gate electrode layer; a pair of impurity semiconductor layers forming source and drain regions, which are provided with a distance therebetween and at least partly overlap with the gate electrode layer; a microcrystalline semiconductor layer which is provided over the first insulating layer in part of a channel formation region, and at least partly overlaps with the gate electrode layer and does not overlap with at least one of the pair of impurity semiconductor layers; a second insulating layer between and in contact with the first insulating layer and the microcrystalline semiconductor layer; and an amorphous semiconductor layer over the first insulating layer, covering the second insulating layer and the microcrystalline semiconductor layer. The first insulating layer is a silicon nitride layer and the second insulating layer is a silicon oxynitride layer.
    • 提供具有良好电特性的薄膜晶体管,其包括栅电极层; 覆盖所述栅电极层的第一绝缘层; 形成源区和漏区的一对杂质半导体层,其间设置有与栅电极层至少部分重叠的距离; 微晶半导体层,其设置在所述第一绝缘层的一部分沟道形成区域中,并且与所述栅电极层至少部分重叠,并且不与所述一对杂质半导体层中的至少一个重叠; 在第一绝缘层和微晶半导体层之间并与之接触的第二绝缘层; 以及在所述第一绝缘层上方的覆盖所述第二绝缘层和所述微晶半导体层的非晶半导体层。 第一绝缘层是氮化硅层,第二绝缘层是氮氧化硅层。
    • 53. 发明授权
    • Thin film transistor
    • 薄膜晶体管
    • US07821012B2
    • 2010-10-26
    • US12397460
    • 2009-03-04
    • Yasuhiro Jinbo
    • Yasuhiro Jinbo
    • H01L33/00
    • H01L29/66765H01L29/42384H01L29/4908H01L29/78618H01L29/78669
    • A thin film transistor includes a first insulating layer covering the gate electrode layer; source and drain regions which at least partly overlaps with the gate electrode layer; a pair of second insulating layers which is provided apart from each other in a channel length direction over the first insulating layer and which at least partly overlaps with the gate electrode layer and the pair of impurity semiconductor layers; a pair of microcrystalline semiconductor layers provided apart from each other on and in contact with the second insulating layers; and an amorphous semiconductor layer covering the first insulating layer, the pair of second insulating layers, and the pair of microcrystalline semiconductor layers and which extends to exist between the pair of microcrystalline semiconductor layers. The first insulating layer is a silicon nitride layer and each of the pair of the second insulating layers is a silicon oxynitride layer.
    • 薄膜晶体管包括覆盖栅电极层的第一绝缘层; 源极和漏极区域,其至少部分地与栅电极层重叠; 一对第二绝缘层,其在所述第一绝缘层上在沟道长度方向上彼此分开设置,并且至少部分地与所述栅电极层和所述一对杂质半导体层重叠; 一对微晶半导体层,其彼此分开设置在第二绝缘层上并与第二绝缘层接触; 以及覆盖所述第一绝缘层,所述一对第二绝缘层和所述一对微晶半导体层并且延伸以存在于所述一对微晶半导体层之间的非晶半导体层。 第一绝缘层是氮化硅层,一对第二绝缘层中的每一个都是氮氧化硅层。
    • 54. 发明申请
    • Manufacturing method of semiconductor device
    • 半导体器件的制造方法
    • US20060051914A1
    • 2006-03-09
    • US11218329
    • 2005-09-02
    • Tetsuya KakehataYuuichi TakeharaYasuhiro Jinbo
    • Tetsuya KakehataYuuichi TakeharaYasuhiro Jinbo
    • H01L21/8234H01L21/336
    • H01L21/02672H01L21/2022H01L27/12H01L27/1266H01L27/1277H01L27/1292H01L29/66765
    • An amorphous semiconductor film and a semiconductor film including an element selected from Group 15 of the periodic table are formed over a substrate. An island-shaped region including an island-shaped amorphous semiconductor film and an island-shaped semiconductor film is formed. A source electrode and a drain electrode are formed over the island-shaped region. The island-shaped semiconductor film that is not covered by the source electrode and the drain electrode is removed using the source electrode and the drain electrode as a mask. At this time, the thickness of the island-shaped amorphous semiconductor film is reduced, and a portion of the island-shaped amorphous semiconductor film is exposed. A catalytic element promoting crystallization is added into a region in which the island-shaped amorphous semiconductor film is exposed. By a heat treatment, the island-shaped amorphous semiconductor film is crystallized and the catalytic element is gettered.
    • 在衬底上形成非晶半导体膜和包含选自元素周期表第15族的元素的半导体膜。 形成包括岛状非晶半导体膜和岛状半导体膜的岛状区域。 源极电极和漏电极形成在岛状区域上。 使用源电极和漏极作为掩模去除未被源电极和漏电极覆盖的岛状半导体膜。 此时,岛状非晶半导体膜的厚度减小,并且一部分岛状非晶半导体膜露出。 将促进结晶的催化元素加入其中暴露岛状非晶半导体膜的区域。 通过热处理,岛状非晶半导体膜结晶化,催化元素被吸收。