专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

51. 发明申请

US20060221969A1 System and method for computing a blind checksum in a host ethernet adapter (HEA) 失效
公开(公告)号：US20060221969A1
公开(公告)日：2006-10-05
申请号：US11097430
申请日：2005-04-01
申请人： Claude Basso , Jean Calvignac , Chih-jen Chang , Philippe Damon , Ronald Fuhs , Natarajan Vaidhyanathan , Fabrice Verplanken , Colin Verrilli , Scott Willenborg
发明人： Claude Basso , Jean Calvignac , Chih-jen Chang , Philippe Damon , Ronald Fuhs , Natarajan Vaidhyanathan , Fabrice Verplanken , Colin Verrilli , Scott Willenborg
IPC分类号： H04L12/28
CPC分类号： H04L69/16 , H04L69/161
摘要： A system and method for computing a blind checksum includes a host Ethernet adapter (HEA) with a system for receiving a packet. The system determines whether or not the packet is in Internet protocol version four (IPv4). If the packet is not in IPv4, the system computes the checksum of the packet. If the packet is in IPv4, the system determines whether the packet is in transmission control protocol (TCP) or user datagram protocol (UDP). If the packet is not in either of TCP or UDP the system attaches a pseudo-header to the packet and computes the checksum of the packet based on the pseudo-header and the IPv4 standard.

52. 发明申请

US20060221961A1 Network communications for operating system partitions 有权
标题翻译：操作系统分区的网络通信
公开(公告)号：US20060221961A1
公开(公告)日：2006-10-05
申请号：US11097051
申请日：2005-04-01
申请人： Claude Basso , Jean Calvignac , Chih-Jen Chang , Philippe Damon , Ronald Fuhs , Natarajan Vaidhyanathan , Fabrice Verplanken , Colin Verrilli , Scott Willenborg
发明人： Claude Basso , Jean Calvignac , Chih-Jen Chang , Philippe Damon , Ronald Fuhs , Natarajan Vaidhyanathan , Fabrice Verplanken , Colin Verrilli , Scott Willenborg
IPC分类号： H04L12/56 , H04L12/28
CPC分类号： H04L29/06 , H04L49/90 , H04L69/32
摘要： Providing communications between operating system partitions and a computer network. In one aspect, an apparatus for distributing network communications among multiple operating system partitions includes a physical port allowing communications between the network and the computer system, and logical ports associated with the physical port, where each logical port is associated with one of the operating system partitions. Each of the logical ports enables communication between a physical port and the associated operating system partition and allows configurability of network resources of the system. Other aspects include a logical switch for logical and physical ports, and packet queues for each connection and for each logical port.
摘要翻译：提供操作系统分区与计算机网络之间的通信。一方面，一种用于在多个操作系统分区之间分配网络通信的装置包括允许网络和计算机系统之间的通信的物理端口以及与物理端口相关联的逻辑端口，其中每个逻辑端口与操作系统之一相关联分区。每个逻辑端口实现物理端口与相关联的操作系统分区之间的通信，并允许系统的网络资源的可配置性。其他方面包括用于逻辑和物理端口的逻辑交换机，以及每个连接和每个逻辑端口的分组队列。

53. 发明申请

US20060221952A1 System and method for parsing, filtering, and computing the checksum in a host ethernet adapter (HEA) 有权
标题翻译：在主机以太网适配器（HEA）中解析，过滤和计算校验和的系统和方法
公开(公告)号：US20060221952A1
公开(公告)日：2006-10-05
申请号：US11096365
申请日：2005-04-01
申请人： Claude Basso , Jean Calvignac , Chih-Jen Chang , Philippe Damon , Natarajan Vaidhyanathan , Fabrice Verplanken , Colin Verrilli
发明人： Claude Basso , Jean Calvignac , Chih-Jen Chang , Philippe Damon , Natarajan Vaidhyanathan , Fabrice Verplanken , Colin Verrilli
IPC分类号： H04J3/24 , H04L12/56 , H04L12/28
CPC分类号： H04L1/0052 , H04L1/0061
摘要： A system and method for parsing, filtering, and computing the checksum in a host Ethernet adapter (HEA) that is coupled to a host. The method includes receiving a part of a frame, wherein a plurality of parts of a frame constitute a entire frame. Next, parse the part of a frame before receiving the entire frame. The HEA computes a checksum of the part of a frame. The HEA filters the part of a frame based on a logical, port-specific policy and transmits the checksum to the host.
摘要翻译：用于在耦合到主机的主机以太网适配器（HEA）中解析，过滤和计算校验和的系统和方法。该方法包括接收帧的一部分，其中帧的多个部分构成整个帧。接下来，在接收整个帧之前解析帧的一部分。 HEA计算帧的一部分的校验和。 HEA基于逻辑，端口特定策略过滤帧的一部分，并将校验和传送到主机。

54. 发明申请

US20050259659A1 Method for prevention of out-of-order delivery of data 失效
标题翻译：防止数据乱序传送的方法
公开(公告)号：US20050259659A1
公开(公告)日：2005-11-24
申请号：US10850296
申请日：2004-05-20
申请人： Claude Basso , Jean Calvignac , Natarajan Vaidhyanathan , Fabrice Verplanken
发明人： Claude Basso , Jean Calvignac , Natarajan Vaidhyanathan , Fabrice Verplanken
IPC分类号： H04L12/56 , H04L29/06
CPC分类号： H04L69/166 , H04L29/06 , H04L69/16
摘要： A method for sequencing delivery of information packets from a router having several processing elements to a receiving processing installation, wherein delivery of the packets must be completed in the order the packets arrive at the router. A linked list of packets is formed in the order they are received at the router, and each packet fragmented into successive fragments. Each fragment is processed at the router. The last fragment of each packet in each linked list is labeled with the sequence in which the packet was received, and enqueued in the order labeled for each last fragment on each linked list. Each fragment of each packet is delivered as processed, except the last fragment of each packet on its linked list to the receiving processor installation, and thereafter, transmitting the final fragment of each packet after processing only if that fragment is at the head of the queue.
摘要翻译：一种用于将信息分组从具有多个处理元件的路由器传送到接收处理设备的方法，其中分组的传送必须按分组到达路由器的顺序完成。分组的链表以它们在路由器处接收的顺序形成，并且每个分组被分段成连续的片段。每个片段在路由器处理。每个链表中每个数据包的最后一个片段都标有接收数据包的顺序，并按照每个链表上每个最后一个片段标记的顺序排队。每个分组的每个片段被处理，除了其链接列表上的每个分组的最后片段到接收处理器安装，然后在处理之后仅在该片段位于队列的头部时发送每个分组的最后片段。

55. 发明授权

US06675221B1 Method and apparatus for customizing and fowarding parameters in a network processor 有权
标题翻译：在网络处理器中定制和退出参数的方法和装置
公开(公告)号：US06675221B1
公开(公告)日：2004-01-06
申请号：US09544588
申请日：2000-04-06
申请人： Claude Basso , Natarajan Vaidhyanathan , Gail Irene Woodland
发明人： Claude Basso , Natarajan Vaidhyanathan , Gail Irene Woodland
IPC分类号： G06F1516
CPC分类号： H04L41/0806
摘要： In a distributed networking environment employing several general purpose processors (i.e., control point processors) for controlling one or more network processor devices, a mechanism for distributing processing across several general purpose processors and interface for configuring a network processor so that specific general purpose processors handle specific operations in a large networking environment, thus, reducing requirement for provisioning a plurality of protocol stacks on each general purpose processor.
摘要翻译：在采用几个用于控制一个或多个网络处理器设备的通用处理器（即，控制点处理器）的分布式网络环境中，用于在多个通用处理器之间分配处理的机制以及用于配置网络处理器的接口，使得特定的通用处理器处理在大型联网环境中的特定操作，从而减少在每个通用处理器上配置多个协议栈的需求。

56. 发明授权

US08861400B2 Requesting multicast membership information in a distributed switch in response to a miss event 有权
标题翻译：在分布式交换机中响应未命中事件请求组播成员资格信息
公开(公告)号：US08861400B2
公开(公告)日：2014-10-14
申请号：US13352952
申请日：2012-01-18
申请人： Debra L. Angst , Claude Basso , Josep Cors , Todd A. Greenfield , Natarajan Vaidhyanathan
发明人： Debra L. Angst , Claude Basso , Josep Cors , Todd A. Greenfield , Natarajan Vaidhyanathan
IPC分类号： H04L12/28 , H04L12/18 , H04L12/751 , H04L12/24 , H04L12/721
CPC分类号： H04L12/185 , H04L41/12 , H04L45/02 , H04L45/16 , H04L45/44
摘要： Apparatuses and methods to request multicast membership information in a distributed switch are provided. A particular method may include requesting multicast membership information of a group identified by a multicast destination address in a distributed switch. The distributed switch may include a plurality of distributed switch elements with a plurality of switch forwarding units. The method may generate a miss event indicating that the multicast destination address is unregistered in a switch forwarding unit of a distributed switch element and there is a need for the multicast membership information. The method may also request the multicast membership information of the multicast destination address in response to the miss event. The method may further initiate a query for the multicast membership information of the multicast destination address in response to the request.
摘要翻译：提供了在分布式交换机中请求组播成员资格信息的设备和方法。特定方法可以包括在分布式交换机中请求由组播目的地地址标识的组的组播成员关系信息。分布式交换机可以包括具有多个交换机转发单元的多个分布式交换单元。该方法可以产生指示在分布式交换单元的交换机转发单元中组播目的地地址未注册的未命中事件，并且需要组播成员资格信息。该方法还可以响应于未命中事件来请求组播目的地地址的组播成员关系信息。该方法可以响应于该请求，进一步发起针对组播目的地地址的组播成员关系信息的查询。

57. 发明申请

US20130308653A1 Techniques for Connecting an External Network Coprocessor to a Network Processor Packet Parser 有权
标题翻译：将外部网络协处理器连接到网络处理器数据包解析器的技术
公开(公告)号：US20130308653A1
公开(公告)日：2013-11-21
申请号：US13884664
申请日：2011-12-19
申请人： Claude Basso , Jean L. Calvignac , Chih-Jen Chang , Damon Philippe , Natarajan Vaidhyanathan , Colin B. Verrilli , Fabrice Jean Verplanken
发明人： Claude Basso , Jean L. Calvignac , Chih-Jen Chang , Damon Philippe , Natarajan Vaidhyanathan , Colin B. Verrilli , Fabrice Jean Verplanken
IPC分类号： H04L29/06
CPC分类号： H04L29/0653 , G06F9/3877 , G06F9/544 , G06F13/385 , G06F15/163 , H04L69/22
摘要： A network processor includes first communication protocol ports that each support ‘M’ minimum size packet data path traffic on ‘N’ lanes at ‘S’ Gigabits per second (Gbps) and traffic with different communication protocol units on ‘n’ additional lanes at ‘s’ Gbps. The first communication protocol ports support access to an external coprocessor using parsing logic located in each of the first communication protocol ports. The parsing logic, during a parsing period, is configured to send a request to the external coprocessor at reception of a ‘M’ size packet and to receive a response from the external coprocessor. The parsing logic sends a request maximum ‘m’ size byte word to the external coprocessor on one of the additional lanes and receives a response maximum ‘m’ size byte word from the external coprocessor on the one of the additional lanes while complying with the equation N×S/M=
摘要翻译：网络处理器包括第一通信协议端口，每个端口以“S”千兆位/秒（Gbps）在“N”通道上支持“M”个最小尺寸分组数据路径业务，并且在“n”个附加车道上以不同的通信协议单元的流量“ s Gbps 第一通信协议端口支持使用位于每个第一通信协议端口中的解析逻辑来访问外部协处理器。解析逻辑在解析周期期间被配置为在接收到“M”大小的分组时向外部协处理器发送请求并且从外部协处理器接收响应。解析逻辑在附加通道之一上向外部协处理器发送请求最大“m”字节字，并在附加通道之一上从外部协处理器接收响应最大“m”字节字，同时遵循等式 N×S / M =

58. 发明授权

US08576864B2 Host ethernet adapter for handling both endpoint and network node communications 失效
标题翻译：主机以太网适配器，用于处理端点和网络节点通信
公开(公告)号：US08576864B2
公开(公告)日：2013-11-05
申请号：US13011663
申请日：2011-01-21
申请人： Claude Basso , Jean L. Calvignac , Chih-jen Chang , Philippe Damon , Natarajan Vaidhyanathan , Fabrice J. Verplanken , Colin B. Verrilli
发明人： Claude Basso , Jean L. Calvignac , Chih-jen Chang , Philippe Damon , Natarajan Vaidhyanathan , Fabrice J. Verplanken , Colin B. Verrilli
IPC分类号： H04L12/28 , H04J1/16
CPC分类号： G06F15/1735
摘要： A host Ethernet adapter (HEA) and method of managing network communications is provided. The HEA includes a host interface configured for communication with a multi-core processor over a processor bus. The host interface comprises a receive processing element including a receive processor, a receive buffer and a scheduler for dispatching packets from the receive buffer to the receive processor; a send processing element including a send processor and a send buffer; and a completion queue scheduler (CQS) for dispatching completion queue elements (CQE) from the head of the completion queue (CQ) to threads of the multi-core processor in a network node mode. The method comprises operatively coupling an Ethernet adapter to a multi-core processor system via a processor bus, selectively assigning a first plurality of packets to a first queue pair for servicing in an endpoint mode, running a device driver on the multi-core processing system, the device driver controlling the servicing of the first queue pair by dispatching the first plurality of packets to only one processor core of the multi-core processor system, selectively assigning a second plurality of packets to a second queue pair for servicing in a network node mode; and the Ethernet adapter controlling the servicing of the second queue pair by dispatching the second plurality of packets to multiple processor threads.
摘要翻译：提供主机以太网适配器（HEA）和管理网络通信的方法。 HEA包括被配置为通过处理器总线与多核处理器进行通信的主机接口。所述主机接口包括接收处理元件，所述接收处理元件包括接收处理器，接收缓冲器和用于从所述接收缓冲器向所述接收处理器分发分组的调度器; 包括发送处理器和发送缓冲器的发送处理元件; 以及用于从完成队列（CQ）的头部将网络节点模式中的多核处理器的线程调度完成队列元素（CQE）的完成队列调度器（CQS）。该方法包括经由处理器总线可操作地将以太网适配器耦合到多核处理器系统，选择性地将第一多个分组分配到第一队列对以在端点模式下进行服务，在多核处理系统上运行设备驱动程序所述设备驱动程序通过将所述第一多个分组分派到所述多核处理器系统的一个处理器核心来控制所述第一队列对的服务，选择性地将第二多个分组分配给第二队列对以在网络节点中进行服务模式; 以及所述以太网适配器通过将所述第二多个分组分派到多个处理器线程来控制所述第二队列对的服务。

59. 发明申请

US20130182706A1 REQUESTING MULTICAST MEMBERSHIP INFORMATION IN A DISTRIBUTED SWITCH IN RESPONSE TO A MISS EVENT 有权
标题翻译：要求分配的交换机中的多播会议信息响应失败事件
公开(公告)号：US20130182706A1
公开(公告)日：2013-07-18
申请号：US13352952
申请日：2012-01-18
申请人： Debra L. Angst , Claude Basso , Josep Cors , Todd A. Greenfield , Natarajan Vaidhyanathan
发明人： Debra L. Angst , Claude Basso , Josep Cors , Todd A. Greenfield , Natarajan Vaidhyanathan
IPC分类号： H04L12/56
CPC分类号： H04L12/185 , H04L41/12 , H04L45/02 , H04L45/16 , H04L45/44
摘要： Apparatuses and methods to request multicast membership information in a distributed switch are provided. A particular method may include requesting multicast membership information of a group identified by a multicast destination address in a distributed switch. The distributed switch may include a plurality of distributed switch elements with a plurality of switch forwarding units. The method may generate a miss event indicating that the multicast destination address is unregistered in a switch forwarding unit of a distributed switch element and there is a need for the multicast membership information. The method may also request the multicast membership information of the multicast destination address in response to the miss event. The method may further initiate a query for the multicast membership information of the multicast destination address in response to the request.
摘要翻译：提供了在分布式交换机中请求组播成员资格信息的设备和方法。特定方法可以包括在分布式交换机中请求由组播目的地地址标识的组的组播成员关系信息。分布式交换机可以包括具有多个交换机转发单元的多个分布式交换单元。该方法可以产生指示在分布式交换单元的交换机转发单元中组播目的地地址未注册的未命中事件，并且需要组播成员资格信息。该方法还可以响应于未命中事件来请求组播目的地地址的组播成员关系信息。该方法可以响应于该请求，进一步发起针对组播目的地地址的组播成员关系信息的查询。

60. 发明授权

US08468546B2 Merging result from a parser in a network processor with result from an external coprocessor 失效
公开(公告)号：US08468546B2
公开(公告)日：2013-06-18
申请号：US13365778
申请日：2012-02-03
申请人： Claude Basso , Jean L. Calvignac , Chih-jen Chang , Philippe Damon , Natarajan Vaidhyanathan , Fabrice J. Verplanken , Colin B. Verrilli
发明人： Claude Basso , Jean L. Calvignac , Chih-jen Chang , Philippe Damon , Natarajan Vaidhyanathan , Fabrice J. Verplanken , Colin B. Verrilli
IPC分类号： G06F3/00
CPC分类号： G06F9/546 , G06F9/544
摘要： A mechanism is provided for merging in a network processor results from a parser and results from an external coprocessor providing processing support requested by said parser. The mechanism enqueues in a result queue both parser results needing to be merged with a coprocessor result and parser results which have no need to be merged with a coprocessor result. An additional queue is used to enqueue the addresses of the result queue where the parser results are stored. The result from the coprocessor is received in a simple response register. The coprocessor result is read by the result queue management logic from the response register and merged to the corresponding incomplete parser result read in the result queue at the address enqueued in the additional queue.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式