专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

51. 外观设计

USD597991S1 Mobile phone 有权
公开(公告)号：USD597991S1
公开(公告)日：2009-08-11
申请号：US29320913
申请日：2008-07-08
申请人： Wen-Ze Liu , Chih-Chiang Chang , Tao Su
设计人： Wen-Ze Liu , Chih-Chiang Chang , Tao Su

52. 外观设计

USD589955S1 Portable electronic device 有权
标题翻译：便携式电子设备
公开(公告)号：USD589955S1
公开(公告)日：2009-04-07
申请号：US29280192
申请日：2007-05-21
申请人： Zheng Shi , Chih-Chiang Chang
设计人： Zheng Shi , Chih-Chiang Chang

53. 外观设计

USD563410S1 Portable electronic device 有权
公开(公告)号：USD563410S1
公开(公告)日：2008-03-04
申请号：US29280629
申请日：2007-06-04
申请人： Zheng Shi , Chih-Chiang Chang
设计人： Zheng Shi , Chih-Chiang Chang

54. 发明申请

US20070189430A1 Phase-locked loop circuit with a mixed mode loop filter 失效
标题翻译：具有混合模式环路滤波器的锁相环电路
公开(公告)号：US20070189430A1
公开(公告)日：2007-08-16
申请号：US11354764
申请日：2006-02-14
申请人： Chih-Chiang Chang
发明人： Chih-Chiang Chang
IPC分类号： H03D3/24
CPC分类号： H03L7/093
摘要： A phase-locked loop circuit includes a phase and frequency detector receiving a reference signal and an output signal of the phase-locked loop circuit for generating a detected signal representing a frequency or phase difference therebetween. A digital charge pump coupled to the phase and frequency detector generates a charge control signal in response to the detected signal. A mixed mode loop filter coupled to the digital charge pump filters the charge control signal and generates an oscillation control signal. A voltage controlled oscillator is coupled to the mixed mode loop filter for generating the output signal of the phase-locked loop circuit by adjusting its oscillation frequency in response to the oscillation control signal. The mixed mode loop filter has both digital and analog characteristics in carrying out filtering the charge control signal, thereby reducing a layout area for the same to be implemented on a semiconductor substrate.
摘要翻译：锁相环电路包括相位和频率检测器，其接收参考信号和锁相环电路的输出信号，用于产生表示其间的频率或相位差的检测信号。耦合到相位和频率检测器的数字电荷泵响应于检测到的信号产生充电控制信号。耦合到数字电荷泵的混合模式环路滤波器对充电控制信号进行滤波并产生振荡控制信号。压控振荡器耦合到混合模式环路滤波器，用于通过响应于振荡控制信号调整其振荡频率来产生锁相环电路的输出信号。混合模式环路滤波器在进行充电控制信号的滤波时具有数字和模拟特性，从而减少了要在半导体衬底上实现的布局面积。

55. 发明申请

US20070134137A1 Carrier gas recycling system 有权
标题翻译：载气回收系统
公开(公告)号：US20070134137A1
公开(公告)日：2007-06-14
申请号：US11417115
申请日：2006-05-04
申请人： Chih-Chiang Chang , Cha-Yu Chang , Ji-Chern Lin
发明人： Chih-Chiang Chang , Cha-Yu Chang , Ji-Chern Lin
IPC分类号： F27B15/00
CPC分类号： F23C10/18 , C10B49/10 , C10J3/463 , C10J3/723 , C10J3/82 , C10J2300/1823 , C10K1/024 , F23C2900/10002 , F23G2203/50
摘要： A carrier gas recycling system is designed according to the procedures in which a carrier gas passes through a reactor, such as a fluidized bed reactor, so as to purify and recycle gas generated in the reaction to substitute for the carrier gas externally applied to the reactor. The carrier gas recycling system includes an oil-water separation chamber to separate and purify carrier gas, and a liquid-sealed constant pressure tank to reduce carrier gas pressure fluctuation and expel extra reaction-generated gas. The carrier gas recycling system also controls the carrier gas flow by controlling the rotating speed of a blower for transferring the carrier gas, and utilizes a heat supply device used in the reaction process to preheat the carrier gas.
摘要翻译：载气回收系统根据载气如流化床反应器等反应器的流程设计，以净化和再循环反应中产生的气体替代外部施加到反应器的载气。载气回收系统包括分离和净化载气的油水分离室，以及液体密封的恒压罐，以减少载气压力波动并排出额外的反应生成气体。载气回收系统还通过控制用于转移载气的鼓风机的转速来控制载气流动，并利用在反应过程中使用的供热装置预热载气。

56. 发明授权

US09547734B2 Array modeling for one or more analog devices 有权
标题翻译：一个或多个模拟设备的阵列建模
公开(公告)号：US09547734B2
公开(公告)日：2017-01-17
申请号：US13596214
申请日：2012-08-28
申请人： Yang Chung-Chieh , Chih-Chiang Chang , Chung-Ting Lu
发明人： Yang Chung-Chieh , Chih-Chiang Chang , Chung-Ting Lu
IPC分类号： G06F17/50
CPC分类号： G06F17/5036 , G06F17/5063 , G06F17/5068
摘要： Among other things, one or more techniques for creating an array model for analog device modeling are provided. In an embodiment, the array model represents a mean value or a standard deviation value of an analog device characteristic for an analog device based on a physical location of the analog device within a circuit layout, where the physical location is identified using a physical set of coordinates. The physical set of coordinates maps to an array set of coordinates of the array model. In this manner, a mean value and a standard deviation value are obtainable from the array model using the array set of coordinates. The mean value and the standard deviation value are usable to model the analog device, and thus a circuit within which the analog device is used, to obtain a more accurate or realistic prediction of operation or behavior, for example.
摘要翻译：提供了一种或多种用于创建用于模拟设备建模的阵列模型的技术。在一个实施例中，阵列模型表示基于电路布局内的模拟设备的物理位置的模拟设备的模拟设备特性的平均值或标准偏差值，其中使用物理位置坐标物理坐标系映射到数组模型的坐标数组。以这种方式，可以使用阵列坐标系从阵列模型中获得平均值和标准偏差值。平均值和标准偏差值可用于对模拟装置进行建模，并因此对使用模拟装置的电路进行建模，以获得例如操作或行为的更准确或更现实的预测。

57. 发明授权

US08659072B2 Series FinFET implementation schemes 有权
标题翻译： FinFET系列实施方案
公开(公告)号：US08659072B2
公开(公告)日：2014-02-25
申请号：US12890084
申请日：2010-09-24
申请人： Chiung-Ting Ou , Chih-Chiang Chang
发明人： Chiung-Ting Ou , Chih-Chiang Chang
IPC分类号： H01L29/732
CPC分类号： H01L27/0886 , H01L27/1211
摘要： A device includes a first semiconductor fin, and a second semiconductor fin parallel to the first semiconductor fin. A straight gate electrode is formed over the first and the second semiconductor fins, and forms a first fin field-effect transistor (FinFET) and a second FinFET with the first and the second semiconductor fins, respectively, wherein the first and the second FinFETs are of a same conductivity type. A first electrical connection is formed on a side of the straight gate electrode and coupling a first source/drain of the first FinFET to a first source/drain of the second FinFET, wherein a second source/drain of the first FinFET is not connected to a second source/drain of the second FinFET.
摘要翻译：器件包括第一半导体鳍片和平行于第一半导体鳍片的第二半导体鳍片。在第一和第二半导体鳍片之上形成直栅电极，分别与第一和第二半导体鳍片分别形成第一鳍状场效应晶体管（FinFET）和第二FinFET，其中第一和第二鳍片FET 具有相同的导电类型。第一电连接形成在直栅电极的一侧并将第一FinFET的第一源极/漏极耦合到第二FinFET的第一源极/漏极，其中第一FinFET的第二源极/漏极未连接到第二个FinFET的第二个源极/漏极。

58. 发明申请

US20130244346A1 Packaging Methods, Material Dispensing Methods and Apparatuses, and Automated Measurement Systems 有权
标题翻译：包装方法，材料分配方法和装置以及自动测量系统
公开(公告)号：US20130244346A1
公开(公告)日：2013-09-19
申请号：US13420383
申请日：2012-03-14
申请人： Chien Rhone Wang , Chih-Wei Lai , Chih-Chiang Chang , Kewei Zuo , Jing-Cheng Lin
发明人： Chien Rhone Wang , Chih-Wei Lai , Chih-Chiang Chang , Kewei Zuo , Jing-Cheng Lin
IPC分类号： H01L21/66 , G06F17/00
CPC分类号： G06F17/00 , H01L22/12 , H01L22/20 , H01L24/94 , H01L24/97 , H01L25/0652 , H01L2224/13025 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/17181 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/83951 , H01L2224/92125 , H01L2224/94 , H01L2224/97 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2924/181 , H01L2224/81 , H01L2924/00012 , H01L2924/00
摘要： Packaging methods, material dispensing methods and apparatuses, and automatic measurement systems are disclosed. In one embodiment, a method of packaging semiconductor devices includes coupling a second die to a top surface of a first die, dispensing a first amount of underfill material between the first die and the second die, and capturing an image of the underfill material. Based on the image captured, a second amount or no additional amount of underfill material is dispensed between the first die and the second die.
摘要翻译：公开了包装方法，材料分配方法和装置以及自动测量系统。在一个实施例中，包装半导体器件的方法包括将第二管芯耦合到第一管芯的顶表面，在第一管芯和第二管芯之间分配第一量的底部填充材料，以及捕获底部填充材料的图像。基于所捕获的图像，在第一模具和第二模具之间分配第二量或不需要额外量的底部填充材料。

59. 发明授权

US08455778B2 Side key assembly for portable electronic device 失效
标题翻译：便携式电子设备的侧面按键组件
公开(公告)号：US08455778B2
公开(公告)日：2013-06-04
申请号：US12484322
申请日：2009-06-15
申请人： Mu-Wen Yang , Chih-Chiang Chang
发明人： Mu-Wen Yang , Chih-Chiang Chang
IPC分类号： H01H5/18
CPC分类号： H01H13/83 , H01H2215/004 , H01H2221/002 , H01H2227/036 , H01H2229/046 , H04M1/236 , Y10T428/24736
摘要： A side key assembly includes a metallic dome, an insulating layer and a decorative layer. The insulating layer is laminated on the dome. The decorative layer is laminated on the insulating layer.
摘要翻译：侧键组件包括金属圆顶，绝缘层和装饰层。绝缘层层叠在圆顶上。装饰层层叠在绝缘层上。

60. 发明授权

US08344273B2 Keyboard structure and electronic device using the same 失效
标题翻译：键盘结构和电子设备使用相同
公开(公告)号：US08344273B2
公开(公告)日：2013-01-01
申请号：US12467377
申请日：2009-05-18
申请人： Zheng Shi , Chih-Chiang Chang
发明人： Zheng Shi , Chih-Chiang Chang
IPC分类号： H01H9/26
CPC分类号： H01H13/86 , H01H2223/034 , H01H2223/056 , H01H2231/022
摘要： A keyboard structure includes a housing having at least one post, a key assembly, and at least one connecting part. The key assembly includes a number of keypads and a keymat, the keymat defining a first through hole, a second through hole and a groove. The connecting part includes a ring, a protruding post and a connecting portion connecting the protruding post to the ring, the connecting part received in the first through hole, the second through hole and the groove, and then fixed on the keymat. The post passes through the key assembly and the ring coils around the post to connect the key assembly to the housing.
摘要翻译：键盘结构包括具有至少一个支柱，键组件和至少一个连接部分的壳体。键组件包括多个键盘和键盘，键盘定义第一通孔，第二通孔和凹槽。连接部分包括环，突出柱和将突出柱连接到环的连接部分，所述连接部分容纳在第一通孔，第二通孔和凹槽中，然后固定在键槽上。该柱通过钥匙组件和围绕柱的环形线圈将钥匙组件连接到壳体。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式