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51. 发明授权

US06526655B2 Angled flying lead wire bonding process 有权
标题翻译：垂直引线接合工艺
公开(公告)号：US06526655B2
公开(公告)日：2003-03-04
申请号：US09871536
申请日：2001-05-31
申请人： Brian Samuel Beaman , Keith Edward Fogel , Paul Alfred Lauro , Da-Yuan Shih
发明人： Brian Samuel Beaman , Keith Edward Fogel , Paul Alfred Lauro , Da-Yuan Shih
IPC分类号： H01R900
CPC分类号： B23K20/007 , B23K20/004 , B23K2101/40 , G01R1/06711 , G01R1/0675 , G01R1/07307 , G01R1/07371 , G01R3/00 , H01L21/4853 , H01L21/4896 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/45 , H01L24/78 , H01L24/85 , H01L2224/0401 , H01L2224/0603 , H01L2224/1134 , H01L2224/13016 , H01L2224/1403 , H01L2224/16 , H01L2224/45015 , H01L2224/45144 , H01L2224/78301 , H01L2224/7855 , H01L2224/85205 , H01L2924/00013 , H01L2924/00014 , H01L2924/01006 , H01L2924/01014 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01042 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01075 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , Y10T29/49144 , Y10T29/49149 , Y10T29/49174 , Y10T29/49179 , Y10T29/49194 , Y10T29/4921 , H01L2224/13099 , H01L2224/48 , H01L2924/00 , H01L2924/20755 , H01L2924/20756 , H01L2924/20757 , H01L2924/2075 , H01L2924/20754 , H01L2924/00012
摘要： A method is described having the steps of providing a surface having a plurality of wire bondable locations; wire bonding a wire to each of the wire bondable locations using a wire capillary tool; controlling the position of the capillary tool with respect to the substrate; after forming a wire bond of the wire to the wire bondable location moving the capillary tool relative to the surface as the capillary tool is moved away from the surface to form a wire having a predetermined shape.
摘要翻译：描述了一种方法，其具有提供具有多个可焊接位置的表面的步骤; 使用电线毛细管工具将导线接合到每个可焊接位置; 控制毛细管工具相对于基底的位置; 在将导线形成线接合位置之后，当毛细管工具远离表面移动毛细管工具相对于表面移动时，形成具有预定形状的导线。

52. 发明授权

US06300780B1 High density integrated circuit apparatus, test probe and methods of use thereof 失效
标题翻译：高密度集成电路设备，测试探针及其使用方法
公开(公告)号：US06300780B1
公开(公告)日：2001-10-09
申请号：US09088394
申请日：1998-06-01
申请人： Brian Samuel Beaman , Keith Edward Fogel , Paul Alfred Lauro , Maurice Heathcote Norcott , Da-Yuan Shih , George Frederick Walker
发明人： Brian Samuel Beaman , Keith Edward Fogel , Paul Alfred Lauro , Maurice Heathcote Norcott , Da-Yuan Shih , George Frederick Walker
IPC分类号： G01R3102
CPC分类号： G01R1/07371 , G01R1/06711 , G01R1/0675 , G01R1/07307 , G01R1/07314 , G01R1/07342 , G01R1/07378 , G01R3/00 , G01R31/2886 , H01L23/49827 , H01L23/5384 , H01L24/45 , H01L24/48 , H01L25/0652 , H01L2224/1134 , H01L2224/13099 , H01L2224/16 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/45155 , H01L2224/45164 , H01L2224/48091 , H01L2224/48227 , H01L2224/78301 , H01L2224/85205 , H01L2224/85214 , H01L2924/00013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/15192 , H01L2924/1627 , H01L2924/181 , H01L2924/19107 , H01L2924/3011 , Y10S29/029 , Y10T29/49004 , Y10T29/49126 , Y10T29/49147 , Y10T29/49149 , Y10T29/49158 , Y10T29/49162 , Y10T29/49192 , Y10T29/53174 , H01L2924/00 , H01L2924/00014 , H01L2924/20752 , H01L2924/20753 , H01L2924/20754 , H01L2924/20755 , H01L2924/20756 , H01L2924/20757 , H01L2924/20758 , H01L2924/20759 , H01L2924/2076
摘要： A high density test probe for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transfer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer. The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.
摘要翻译：用于测试晶圆形式的高密度和高性能集成电路或分立芯片的高密度测试探头。测试探针由嵌入柔性或高模量弹性体材料的细长电导体的密集阵列形成。使用陶瓷集成电路芯片封装基板等标准封装基板来提供空间变压器。电线被连接到空间变压器表面上的接触焊盘阵列。由多层集成电路芯片封装基板形成的空间传输。电线与接触位置阵列一样密集。围绕着向外突出的线的阵列设置模具。液体弹性体设置在模具中以填充电线之间的空间。弹性体被固化并且模具被去除，留下布置在弹性体中并与空间变压器电接触的线阵列。空间变压器可以具有一个引脚阵列，它们在空间变压器的与细长导体所接合的相反的表面上。这些销插入第二空间变压器（例如印刷电路板）上的插座中以形成探针组件。或者，插入器电连接器可以设置在第一和第二空间变压器之间。

53. 发明授权

US06295729B1 Angled flying lead wire bonding process 有权
公开(公告)号：US06295729B1
公开(公告)日：2001-10-02
申请号：US09164470
申请日：1998-10-01
申请人： Brian Samuel Beaman , Keith Edward Fogel , Paul Alfred Lauro , Da-Yuan Shih
发明人： Brian Samuel Beaman , Keith Edward Fogel , Paul Alfred Lauro , Da-Yuan Shih
IPC分类号： H01R900
CPC分类号： B23K20/007 , B23K20/004 , B23K2101/40 , G01R1/06711 , G01R1/0675 , G01R1/07307 , G01R1/07371 , G01R3/00 , H01L21/4853 , H01L21/4896 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/45 , H01L24/78 , H01L24/85 , H01L2224/0401 , H01L2224/0603 , H01L2224/1134 , H01L2224/13016 , H01L2224/1403 , H01L2224/16 , H01L2224/45015 , H01L2224/45144 , H01L2224/78301 , H01L2224/7855 , H01L2224/85205 , H01L2924/00013 , H01L2924/00014 , H01L2924/01006 , H01L2924/01014 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01042 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01075 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , Y10T29/49144 , Y10T29/49149 , Y10T29/49174 , Y10T29/49179 , Y10T29/49194 , Y10T29/4921 , H01L2224/13099 , H01L2224/48 , H01L2924/00 , H01L2924/20755 , H01L2924/20756 , H01L2924/20757 , H01L2924/2075 , H01L2924/20754 , H01L2924/00012
摘要： A method is described having the steps of providing a surface having a plurality of wire bondable locations; wire bonding a wire to each of the wire bondable locations using a wire capillary tool; controlling the position of the capillary tool with respect to the substrate; after forming a wire bond of the wire to the wire bondable location moving the capillary tool relative to the surface as the capillary tool is moved away from the surface to form a wire having a predetermined shape.

54. 发明授权

US06206273B1 Structures and processes to create a desired probetip contact geometry on a wafer test probe 失效
标题翻译：在晶圆测试探针上创建所需的先天触点几何形状的结构和过程
公开(公告)号：US06206273B1
公开(公告)日：2001-03-27
申请号：US09251864
申请日：1999-02-17
申请人： Brian Samuel Beaman , Keith Edward Fogel , Paul Alfred Lauro , Da-Yuan Shih
发明人： Brian Samuel Beaman , Keith Edward Fogel , Paul Alfred Lauro , Da-Yuan Shih
IPC分类号： B23K3100
CPC分类号： G01R1/0675 , G01R1/07314 , G01R3/00 , Y10T29/4914
摘要： The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are formed by cutting with one or more blades. The shape of the blades determines the shape of the probetips. The probetips can be coated with other conductive materials to enhance the hardness and profile of protuberances formed at the probetip ends by the blade-cutting process. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer. The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.
摘要翻译：本发明涉及一种高密度测试探针，其提供用于测试晶片形式的高密度和高性能集成电路或作为离散芯片的装置。测试探针由细长电导体的密集阵列形成，其通过用一个或多个刀片切割形成。叶片的形状决定了先兆的形状。可以使用其他导电材料涂覆先知，以通过叶片切割工艺增强在突齿端部处形成的突起的硬度和轮廓。电线与接触位置阵列一样密集。围绕着向外突出的线的阵列设置模具。液体弹性体设置在模具中以填充电线之间的空间。弹性体被固化并且模具被去除，留下布置在弹性体中并与空间变压器电接触的线阵列。空间变压器可以具有一个引脚阵列，它们在空间变压器的与细长导体所接合的相反的表面上。这些销插入第二空间变压器（例如印刷电路板）上的插座中以形成探针组件。或者，插入器电连接器可以设置在第一和第二空间变压器之间。

55. 发明授权

US5756021A Electronic devices comprising dielectric foamed polymers 失效
标题翻译：包括电介质发泡聚合物的电子器件
公开(公告)号：US5756021A
公开(公告)日：1998-05-26
申请号：US625789
申请日：1996-03-29
申请人： James Lupton Hedrick , Da-Yuan Shih
发明人： James Lupton Hedrick , Da-Yuan Shih
IPC分类号： C08J9/28 , C04B41/50 , G01R1/073 , G01R3/00 , H01B3/18 , H01B13/00 , H01R13/24 , H01R43/00 , H01B7/02
CPC分类号： H01R13/2414 , C04B41/5025 , G01R1/07307 , G01R3/00 , H01R12/52
摘要： The present invention relates to an electronic device for distributing electrical signals between electronic elements comprising a dielectric foamed thermoset polymer having a plurality of electrical circuits.
摘要翻译：电子设备技术领域本发明涉及一种用于在电子元件之间分配电信号的电子设备，包括具有多个电路的电介质泡沫热固性聚合物。

56. 发明授权

US09343423B2 No flow underfill or wafer level underfill and solder columns 有权
标题翻译：无流动底部填充或晶圆级底部填充和焊料柱
公开(公告)号：US09343423B2
公开(公告)日：2016-05-17
申请号：US14526268
申请日：2014-10-28
申请人： Claudius Ferger , Michael A. Gaynes , Jae-Woong Nah , Da-Yuan Shih
发明人： Claudius Ferger , Michael A. Gaynes , Jae-Woong Nah , Da-Yuan Shih
IPC分类号： H01L21/50 , H01L21/48 , H01L23/00 , H01L23/498 , H01L21/463 , H01L23/544
CPC分类号： H01L24/81 , H01L21/463 , H01L21/563 , H01L23/49816 , H01L23/544 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/743 , H01L24/83 , H01L24/92 , H01L2223/54426 , H01L2223/54473 , H01L2223/54486 , H01L2224/11462 , H01L2224/13082 , H01L2224/13147 , H01L2224/1605 , H01L2224/16225 , H01L2224/16227 , H01L2224/16238 , H01L2224/2741 , H01L2224/32225 , H01L2224/73104 , H01L2224/73204 , H01L2224/8113 , H01L2224/81132 , H01L2224/81192 , H01L2224/81193 , H01L2224/81203 , H01L2224/814 , H01L2224/81801 , H01L2224/81815 , H01L2224/83192 , H01L2224/83856 , H01L2224/9211 , H01L2224/94 , H01L2924/01029 , H01L2924/10253 , H01L2924/1461 , H01L2924/00 , H01L2924/00014 , H01L2924/00012 , H01L2924/014 , H01L2224/11 , H01L2224/27 , H01L2224/81 , H01L2224/83
摘要： A preassembly semiconductor device comprises chip soldering structures on a semiconductor chip and substrate soldering structures on a substrate corresponding to the chip soldering structures. The substrate soldering structures extend toward the chip soldering structures for forming solder connections with the chip soldering structures. The chip and the substrate are in preassembly positions relative to one another. The height of the substrate soldering structures is greater than the height of the chip soldering structures. A pre-applied underfill is contiguous with the substrate and is sufficiently thick so as to extend substantially no further than the full height of the substrate soldering structures. In another embodiment the height of the chip soldering structures is greater than the height of the substrate soldering structures and the pre-applied underfill is contiguous with the semiconductor chip and sufficiently thick so as to extend substantially no further than the full height of the chip soldering structures. A process comprises manufacturing semiconductor assemblies from these devices by soldering the chip and the substrate to one another.
摘要翻译：预组装半导体器件包括半导体芯片上的芯片焊接结构和对应于芯片焊接结构的衬底上的衬底焊接结构。衬底焊接结构朝着芯片焊接结构延伸，以形成与芯片焊接结构的焊接连接。芯片和衬底相对于彼此处于预组装位置。基板焊接结构的高度大于芯片焊接结构的高度。预先施加的底部填充物与基底相邻并且足够厚以便基本上不超过基底焊接结构的全高度延伸。在另一个实施例中，芯片焊接结构的高度大于衬底焊接结构的高度，并且预先施加的底部填充物与半导体芯片邻接并且足够厚以便基本上不超过芯片焊接的全部高度结构。一种方法包括通过将芯片和衬底彼此焊接来从这些器件制造半导体组件。

57. 发明申请

US20150147851A1 NO FLOW UNDERFILL OR WAFER LEVEL UNDERFILL AND SOLDER COLUMNS 有权
公开(公告)号：US20150147851A1
公开(公告)日：2015-05-28
申请号：US14526268
申请日：2014-10-28
申请人： Claudius Feger , Michael A. Gaynes , Jae-Woong Nah , Da-Yuan Shih
发明人： Claudius Feger , Michael A. Gaynes , Jae-Woong Nah , Da-Yuan Shih
IPC分类号： H01L23/00 , H01L21/56
CPC分类号： H01L24/81 , H01L21/463 , H01L21/563 , H01L23/49816 , H01L23/544 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/743 , H01L24/83 , H01L24/92 , H01L2223/54426 , H01L2223/54473 , H01L2223/54486 , H01L2224/11462 , H01L2224/13082 , H01L2224/13147 , H01L2224/1605 , H01L2224/16225 , H01L2224/16227 , H01L2224/16238 , H01L2224/2741 , H01L2224/32225 , H01L2224/73104 , H01L2224/73204 , H01L2224/8113 , H01L2224/81132 , H01L2224/81192 , H01L2224/81193 , H01L2224/81203 , H01L2224/814 , H01L2224/81801 , H01L2224/81815 , H01L2224/83192 , H01L2224/83856 , H01L2224/9211 , H01L2224/94 , H01L2924/01029 , H01L2924/10253 , H01L2924/1461 , H01L2924/00 , H01L2924/00014 , H01L2924/00012 , H01L2924/014 , H01L2224/11 , H01L2224/27 , H01L2224/81 , H01L2224/83
摘要： A preassembly semiconductor device comprises chip soldering structures on a semiconductor chip and substrate soldering structures on a substrate corresponding to the chip soldering structures. The substrate soldering structures extend toward the chip soldering structures for forming solder connections with the chip soldering structures. The chip and the substrate are in preassembly positions relative to one another. The height of the substrate soldering structures is greater than the height of the chip soldering structures. A pre-applied underfill is contiguous with the substrate and is sufficiently thick so as to extend substantially no further than the full height of the substrate soldering structures. In another embodiment the height of the chip soldering structures is greater than the height of the substrate soldering structures and the pre-applied underfill is contiguous with the semiconductor chip and sufficiently thick so as to extend substantially no further than the full height of the chip soldering structures. A process comprises manufacturing semiconductor assemblies from these devices by soldering the chip and the substrate to one another

58. 发明授权

US08963340B2 No flow underfill or wafer level underfill and solder columns 有权
标题翻译：无流动底部填充或晶圆级底部填充和焊料柱
公开(公告)号：US08963340B2
公开(公告)日：2015-02-24
申请号：US13231594
申请日：2011-09-13
申请人： Claudius Feger , Michael A. Gaynes , Jae-Woong Nah , Da-Yuan Shih
发明人： Claudius Feger , Michael A. Gaynes , Jae-Woong Nah , Da-Yuan Shih
IPC分类号： H01L23/52 , H01L23/48 , H01L27/146 , H01L23/498 , H01L21/56 , H01L23/544 , H01L23/00
CPC分类号： H01L24/81 , H01L21/463 , H01L21/563 , H01L23/49816 , H01L23/544 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/743 , H01L24/83 , H01L24/92 , H01L2223/54426 , H01L2223/54473 , H01L2223/54486 , H01L2224/11462 , H01L2224/13082 , H01L2224/13147 , H01L2224/1605 , H01L2224/16225 , H01L2224/16227 , H01L2224/16238 , H01L2224/2741 , H01L2224/32225 , H01L2224/73104 , H01L2224/73204 , H01L2224/8113 , H01L2224/81132 , H01L2224/81192 , H01L2224/81193 , H01L2224/81203 , H01L2224/814 , H01L2224/81801 , H01L2224/81815 , H01L2224/83192 , H01L2224/83856 , H01L2224/9211 , H01L2224/94 , H01L2924/01029 , H01L2924/10253 , H01L2924/1461 , H01L2924/00 , H01L2924/00014 , H01L2924/00012 , H01L2924/014 , H01L2224/11 , H01L2224/27 , H01L2224/81 , H01L2224/83
摘要： A preassembly semiconductor device comprises substrate soldering structures extending toward chip soldering structures for forming solder connections with the chip soldering structures, i.e., the chip and the substrate are in preassembly positions relative to one another. The height of the substrate soldering structures is greater than the height of the chip soldering structures. A pre-applied underfill is contiguous with the substrate and is sufficiently thick so as to extend substantially no further than the full height of the substrate soldering structures. In another embodiment the height of the chip soldering structures is greater than the height of the substrate soldering structures and the pre-applied underfill is contiguous with the semiconductor chip and sufficiently thick so as to extend substantially no further than the full height of the chip soldering structures. A process comprises manufacturing semiconductor assemblies from these devices by soldering the semiconductor chip and the substrate to one another.
摘要翻译：预组装半导体器件包括朝向芯片焊接结构延伸的衬底焊接结构，用于形成与芯片焊接结构的焊接连接，即，芯片和衬底相对于彼此处于预组装位置。基板焊接结构的高度大于芯片焊接结构的高度。预先施加的底部填充物与基底相邻并且足够厚以便基本上不超过基底焊接结构的全高度延伸。在另一个实施例中，芯片焊接结构的高度大于衬底焊接结构的高度，并且预先施加的底部填充物与半导体芯片邻接并且足够厚以便基本上不超过芯片焊接的全部高度结构。一种方法包括通过将半导体芯片和衬底相互焊接来从这些器件制造半导体组件。

59. 发明授权

US08803333B2 Three-dimensional chip stack and method of forming the same 有权
标题翻译：三维芯片堆叠及其形成方法
公开(公告)号：US08803333B2
公开(公告)日：2014-08-12
申请号：US13544746
申请日：2012-07-09
申请人： Chen-Hua Yu , Da-Yuan Shih , Chih-Hang Tung
发明人： Chen-Hua Yu , Da-Yuan Shih , Chih-Hang Tung
IPC分类号： H01L29/40 , H01L23/48 , H01L23/52 , H01L23/488
CPC分类号： H01L23/48 , H01L23/3185 , H01L23/3192 , H01L23/488 , H01L23/52 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/81 , H01L25/0657 , H01L2224/0401 , H01L2224/05124 , H01L2224/05147 , H01L2224/05572 , H01L2224/05582 , H01L2224/05583 , H01L2224/05611 , H01L2224/05618 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05666 , H01L2224/05669 , H01L2224/05676 , H01L2224/05681 , H01L2224/1134 , H01L2224/1146 , H01L2224/11466 , H01L2224/11823 , H01L2224/11825 , H01L2224/1184 , H01L2224/13005 , H01L2224/13019 , H01L2224/13147 , H01L2224/13562 , H01L2224/13582 , H01L2224/13611 , H01L2224/13618 , H01L2224/13639 , H01L2224/13644 , H01L2224/13647 , H01L2224/13655 , H01L2224/13664 , H01L2224/13669 , H01L2224/13673 , H01L2224/13676 , H01L2224/29011 , H01L2224/29035 , H01L2224/2919 , H01L2224/73103 , H01L2224/73203 , H01L2224/81193 , H01L2224/81205 , H01L2224/8183 , H01L2224/81895 , H01L2224/83191 , H01L2224/83193 , H01L2224/94 , H01L2924/00014 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/014 , H01L2924/01029 , H01L2924/206 , H01L2224/81 , H01L2924/0665 , H01L2924/00012 , H01L2924/00 , H01L2224/05552
摘要： A three dimensional (3D) chip stack includes a first chip bonded to a second chip. The first chip includes a first bump structure overlying the first substrate, and the second chip includes a second bump structure overlying the second substrate. The first bump structure is attached to the second bump structure, and a joining region is formed between the first bump structure and the second bump structure. The joining region is a solderless region which includes a noble metal.
摘要翻译：三维（3D）芯片堆叠包括结合到第二芯片的第一芯片。第一芯片包括覆盖第一基板的第一凸块结构，并且第二芯片包括覆盖第二基板的第二凸块结构。第一凸块结构附接到第二凸块结构，并且在第一凸块结构和第二凸块结构之间形成接合区域。接合区域是包括贵金属的无焊区域。

60. 发明申请

US20130207239A1 Interconnect Crack Arrestor Structure and Methods 有权
标题翻译：互连断裂器结构与方法
公开(公告)号：US20130207239A1
公开(公告)日：2013-08-15
申请号：US13370127
申请日：2012-02-09
申请人： Chen-Hua Yu , Da-Yuan Shih
发明人： Chen-Hua Yu , Da-Yuan Shih
IPC分类号： H01L29/02
CPC分类号： H01L23/562 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/45 , H01L24/49 , H01L24/81 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/0347 , H01L2224/0361 , H01L2224/0401 , H01L2224/05012 , H01L2224/05013 , H01L2224/05014 , H01L2224/05015 , H01L2224/05022 , H01L2224/05124 , H01L2224/05147 , H01L2224/05583 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05671 , H01L2224/1131 , H01L2224/1134 , H01L2224/114 , H01L2224/1145 , H01L2224/1146 , H01L2224/11462 , H01L2224/1147 , H01L2224/1161 , H01L2224/11616 , H01L2224/11825 , H01L2224/11849 , H01L2224/13011 , H01L2224/13012 , H01L2224/13014 , H01L2224/13076 , H01L2224/13078 , H01L2224/13111 , H01L2224/13124 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/1357 , H01L2224/13582 , H01L2224/13644 , H01L2224/13655 , H01L2224/13657 , H01L2224/13664 , H01L2224/13671 , H01L2224/13672 , H01L2224/1601 , H01L2224/16237 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/4554 , H01L2224/81191 , H01L2224/81193 , H01L2224/81444 , H01L2224/81447 , H01L2224/81455 , H01L2224/81815 , H01L2924/15787 , H01L2924/3512 , H01L2924/00014 , H01L2924/01029 , H01L2924/01074 , H01L2924/00012 , H01L2224/10125 , H01L2224/10155 , H01L2924/00
摘要： A system and method for preventing cracks is provided. An embodiment comprises placing crack stoppers into a connection between a semiconductor die and a substrate. The crack stoppers may be in the shape of hollow or solid cylinders and may be placed so as to prevent any cracks from propagating through the crack stoppers.
摘要翻译：提供一种用于防止裂纹的系统和方法。一个实施例包括将裂缝塞子放置在半导体管芯和衬底之间的连接中。裂缝止动器可以是中空或实心圆筒的形状，并且可以放置成防止任何裂纹通过裂缝塞子传播。

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