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    • 52. 发明申请
    • Information recording device and method, and computer program
    • 信息记录装置和方法以及计算机程序
    • US20070064560A1
    • 2007-03-22
    • US10553872
    • 2004-12-20
    • Eiji MuramatsuKazuo KurodaShoji TaniguchiMasahiro KatoKunihiko Horikawa
    • Eiji MuramatsuKazuo KurodaShoji TaniguchiMasahiro KatoKunihiko Horikawa
    • G11B7/12
    • G11B7/1267G11B2007/0013
    • An information recording device comprising a recording unit that records recording information by applying a laser beam to an information recording medium having a first recording layer for recording recording information by being irradiated with a laser beam and a second recording layer for recording recording information by irradiating with a laser beam via the first recording layer, a calculating unit that calculates an optimum laser beam power when, by using the recording means, trial-recording trial information is recorded by irradiating the second recording layer with a laser beam via a recording-information-unrecorded recording area in the first recording layer and recording information is recorded by irradiating the second recording layer with a laser beam via a recording-information-recorded recording area in the first recording layer, and a control unit that controls the recording unit.
    • 一种信息记录装置,包括记录单元,该记录单元通过将激光束施加到具有用于通过照射激光束来记录记录信息的第一记录层的信息记录介质和用于通过照射用于记录记录信息的第二记录层 通过第一记录层的激光束,计算单元,通过使用记录装置,通过记录信息记录试验信息通过用激光束照射第二记录层来记录试验记录试验信息,计算最佳的激光束功率, 通过经由第一记录层中的记录信息记录记录区域的激光束照射第二记录层来记录第一记录层中的未记录记录区域和记录信息,以及控制记录单元的控制单元。
    • 57. 发明授权
    • Semiconductor device and portable terminal equipment
    • 半导体器件和便携式终端设备
    • US06803810B2
    • 2004-10-12
    • US10300592
    • 2002-11-21
    • Yoshikazu YamadaKoichi KuroiwaShoji TaniguchiTakanobu Kashiwagi
    • Yoshikazu YamadaKoichi KuroiwaShoji TaniguchiTakanobu Kashiwagi
    • G05F110
    • H04B1/40H04W52/028Y02D70/24Y02D70/40
    • A proposed semiconductor device is directed to making unnecessary circuit operation inactive to reduce power consumption because of leakage current. The device is functionally divided into blocks. The power supply systems of the blocks are divided into a non-controlled power supply group in which power is always on and controlled power supply groups in each of which groups a supply of power can be turned on/off independently. When a power supply system control part of the non-controlled power supply group outputs a control signal for power on, a power switch part turns on to release the controlled power supply group from the sleep mode, so that the first processing part starts intermittent operation. Only when it is determined that a first next-processing necessity determining part determines necessity of the next processing, a control signal is generated to activate the next power supply group. The blocks unnecessary for processing are not supplied with power, so that no leakage current flows and power consumption because thereof can be reduced.
    • 所提出的半导体器件旨在使不必要的电路操作无效以便由于泄漏电流而降低功耗。 该设备在功能上划分为块。 块的电源系统分为电源始终接通的非受控电源组,每个组中的电源组可独立接通/断开。 当非受控电源组的电源系统控制部分输出用于接通电源的控制信号时,电源开关部分接通以将受控电源组从睡眠模式释放,使得第一处理部分开始间歇操作 。 只有当确定第一下一个处理必要性确定部分确定下一个处理的必要性时,才产生控制信号以激活下一个电源组。 不需要处理的块被供电,所以不会有泄漏电流流动,因此可以减少功耗。
    • 60. 发明授权
    • Adder circuit, integrating circuit which uses the adder circuit, and synchronism detection circuit which uses the integrating circuit
    • 加法器电路,使用加法器电路的积分电路和使用积分电路的同步检测电路
    • US06647405B1
    • 2003-11-11
    • US09522404
    • 2000-03-09
    • Koichi KuroiwaShoji TaniguchiMasami KanasugiMahiro Hikita
    • Koichi KuroiwaShoji TaniguchiMasami KanasugiMahiro Hikita
    • G06F750
    • G06F7/5052
    • An adding circuit which receives addend data and augend data, each of which consists of a plurality of bits, and sums the addend and augend data, comprises: a plurality of addition blocks, each of which is used to add a predetermined number of bits of the addend data to a like number of bits of the augend data, and for outputting both the result obtained by adding the predetermined number of bits and a carry-out signal, wherein, when a carry-out occurs for one of the addition blocks, in accordance with a carry-out signal from a lower rank and a set comprising the addend data and the augend data, the pertinent addition block responds to the pertinent carry-out, and wherein, when a carry-out does not occur for the addition block in accordance with the set comprising the addend data and the augend data, the pertinent addition block responds to the carry-out and generates a block addition end signal which indicates that the addition performed by the addition block has been completed.
    • 一种附加电路,其接收加数据和加数数据,每个数据包括多个比特,并且加法和加数数据相加,包括:多个加法块,每个加法块用于将预定数量的比特 将加数数据加到类似数量的加法数据位,并输出通过相加预定位数和执行输出信号而获得的结果,其中当对于一个加法块发生进位输出时, 根据来自下级的进位信号和包括加法数据和加数数据的集合,相关的加法块响应相关的进位输出,并且其中当不进行加法运算时 根据包括加数数据和加数数据的集合,相关附加块响应进位输出,并产生指示由加法块执行的相加已经完成的块加法结束信号。