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    • 57. 发明授权
    • Analog switch
    • US11016524B2
    • 2021-05-25
    • US17061874
    • 2020-10-02
    • ABLIC Inc.
    • Eiki Imaizumi
    • G06F1/08H03K17/687
    • The analog switch includes: a clock generation circuit configured to generate a first clock and a second clock; a transfer circuit including an NMOS transistor having a source and a back gate connected to each other, and a PMOS transistor having a source and a back gate connected to each other, one of which has a drain connected to the source of the other, and a source connected to a signal input terminal, and the other of which has a drain connected to a signal output terminal; a first control signal generation circuit configured to generate a control signal for switching the PMOS transistor based on a voltage at the signal input terminal and the first clock; and a second control signal generation circuit configured to generate a control signal for switching the NMOS transistor based on the voltage at the signal input terminal and the second clock.