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    • 42. 发明授权
    • Frequency ratio indicating circuit arrangements
    • 频率指示电路布置
    • US3909707A
    • 1975-09-30
    • US46902074
    • 1974-05-10
    • FERRANTI LTD
    • CHADWICK PETER
    • G01R23/02G01R27/12H03K5/26G01P3/56G01R23/14G08B21/00
    • H03K5/26G01R23/02G01R27/12
    • A frequency ratio indicating circuit arrangement, operable to indicate within which one of a number of ranges lies the ratio of pulse repetition frequencies of two pulse trains, comprises a series of J-K bistable devices which are primed by individual bistable latches to produce an output indication signal when triggered in accordance with whether the latches are in a SET or RESET state. Each latch is SET by a pulse, passed by a combination of logic gates, from a resettable counter of input pulses of one pulse train, the series of logic gates opening at various stages in the count in accordance with their interconnection pattern with the counter. The SET and RESET inputs of adjacent latches are connected in parallel such that as the count proceeds, each latch is SET in turn with the previously SET latch being RESET. Pulses of the other train are counted and at every tenth pulse cause the J-K bistable devices to be triggered and, subsequently, the counter and latches to be RESET. Whichever J-K device is primed at the time of the trigger pulse provides an indication signal to show in which range of ratios, that is, between which stages of count for which the appropriate latch is SET, the trigger pulse occurs.
    • 频率比指示电路装置,可操作以指示多个范围中的哪一个位于两个脉冲串的脉冲重复频率的比率中的哪一个包括由单个双稳态锁存器引导以产生输出指示信号的一系列JK双稳态器件 根据锁存器是否处于SET或RESET状态触发。 每个锁存器由来自一个脉冲串的输入脉冲的可复位计数器的逻辑门组合的脉冲设置,该逻辑门系列根据它们与计数器的互连图案在计数中的各个阶段打开。 相邻锁存器的SET和RESET输入并联连接,使得当计数继续时,每个锁存器依次被SET设置锁存器复位。 对其他列车的脉冲进行计数,并在每十分之一次的脉冲下使J-K双稳态器件触发,随后计数器和锁存器被复位。 在触发脉冲时,无论哪个J-K器件被引脚提供指示信号,以显示哪个比率范围,即适当锁存器被设置在哪个级数之间,触发脉冲发生。
    • 48. 发明授权
    • Frequency detector
    • 频率检测器
    • US2995707A
    • 1961-08-08
    • US76407358
    • 1958-09-29
    • PHILIPS CORP
    • DE JAGER FRANKGERWEN PETRUS JOSEPHUS VAN
    • G01R23/00G01R27/12G10L25/00
    • G01R27/12G01R23/00G10L25/00
    • 844,561. Frequency discriminators. PHILIPS ELECTRICAL INDUSTRIES Ltd. Oct. 10, 1958 [Oct. 14, 1957], No. 32423/58. Class 40(5). [Also in Group XXXVI] In a frequency detector for the detection of the variation of a characteristic speech frequency situated within a speech sub-band, the speech sub-band, which is selected by means of a filter 4, is supplied to two channels 6, 7 connected in parallel, the channel 6 comprising a differentiating network 8 and a rectifier 9 and the second a rectifier 11, the output voltages from the channel being fed to a ratio meter 13 the output voltage of which is the ratio of the amplitudes of the channel output voltages and a measure of the frequency. Low-pass filters 10 and 12 are included in branches 6, 7 respectively, and, if the input voltage of rectifier 11 is a (t) at a certain instant that to rectifier 9 is #a(t), so that the ratio of the output voltages of filters 10 and 12 is proportional to awdt/adt and therefore to the frequency. In the embodiment shown, the output direct voltages of filters 10, 12 are converted into alternating voltages of frequencies fi f 2 , corresponding in amplitude to the direct voltages, by means of amplitude modulators 15, 16, carrier wave oscillators 17, 18 of frequencies f 1 f 2 and output filters 19, 20, the outputs of the oscillators and filters being connected through attenuators 21, 22 to adjust the strength ratio of the carrierwave oscillations. A ratio meter for use in the detector is shown in Fig. 4. The alternating voltage derived from channel 6 of frequency f 1 and amplitude-modulated by the rectified differentiated input signal is applied to the grid of a pentode 25 through a resistor 23, the alternating voltage derived from channel 7 of frequency f 2 and amplitude modulated by the rectified input signal being applied to the grid through a resistor 26. Slope control is provided for the pentode 25 and the amplitude of oscillations at frequency f 2 at the output of pentode 25 is therefore kept constant, so that the slope of the pentode 25 varies inversely as the amplitude of the input voltage at frequency f 2 . The voltage at frequency fi is selected by a filter 30 and rectified, the output at 38, 39 being a direct voltage proportional to the amplitude ratio between the output voltages of channels 6 and 7. In the embodiment of Fig. 5, the ratio is determined by amplitude limitation instead of slope control. An amplitude limiter comprising rectifiers 45, 46 has an output consisting of a voltage of frequency f 2 modulated by the voltage of frequency f 1 the frequency deviation of said f.m. voltage being proportional to f 1 : f 2 , the amplitude of f 1